diff options
| author | Philip Chen <philipchen@google.com> | 2017-08-10 19:55:21 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-08-17 20:41:54 -0700 |
| commit | add041bd7c86e6c3d1f60caeae78af2250e825a5 (patch) | |
| tree | 4cf87cf0558b93097a01d49fd04a193aab09356f | |
| parent | c556e8b3e21edd6150feb41e2a69701b49254899 (diff) | |
| download | chrome-ec-add041bd7c86e6c3d1f60caeae78af2250e825a5.tar.gz | |
scarlet: Make AP_CORE_PG a non-INT pin
AP_EC_S3_S0_L and AP_CORE_PG can't be INT pins
at the same time.
BUG=b:64528567
BRANCH=none
TEST=boot scarlet rev1
Change-Id: I3e70d2ef2a1f78c0661c8c4d40db32f22dff616f
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/611650
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
| -rw-r--r-- | board/scarlet/gpio.inc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/board/scarlet/gpio.inc b/board/scarlet/gpio.inc index 66a9de7ca1..4cb2272c0f 100644 --- a/board/scarlet/gpio.inc +++ b/board/scarlet/gpio.inc @@ -26,8 +26,6 @@ GPIO_INT(PP900_S0_PG, PIN(D, 9), GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt) GPIO_INT(AP_EC_S3_S0_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_PULL_DOWN, power_signal_interrupt) -GPIO_INT(AP_CORE_PG, PIN(D, 7), GPIO_INT_BOTH | GPIO_PULL_UP, - power_signal_interrupt) GPIO_INT(WARM_RESET_REQ, PIN(E, 1), GPIO_INT_RISING | GPIO_PULL_DOWN, warm_reset_request_interrupt) GPIO_INT(AP_OVERTEMP, PIN(E, 4), GPIO_INT_RISING | GPIO_PULL_DOWN, @@ -76,6 +74,10 @@ GPIO(CCD_MODE_ODL, PIN(C, 5), GPIO_INPUT | GPIO_PULL_UP) GPIO(CHARGER_INT_L, PIN(E, 6), GPIO_INPUT | GPIO_PULL_UP) /* TODO(b:63773130): Add an interrupt handler for battery gauge max17055 */ GPIO(BATTERY_INT_L, PIN(A, 12), GPIO_INPUT | GPIO_PULL_UP) +/* Non-INT power signal pin */ +GPIO(AP_CORE_PG, PIN(D, 7), GPIO_INPUT | GPIO_PULL_UP) + + /* Other output pins */ GPIO(ENTERING_RW, PIN(C, 6), GPIO_ODR_HIGH) |