diff options
| author | Wealian Liao <whliao@nuvoton.corp-partner.google.com> | 2021-04-20 10:14:44 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-04-21 17:42:33 +0000 |
| commit | f79ac11c5d3e0b79f1012eaf97d201706ec80c23 (patch) | |
| tree | a7ca42665fe7723bb68cd0da59790f8630b2a599 | |
| parent | 793c8e2f1245e34c2eb7fd787ad517868cd61cf9 (diff) | |
| download | chrome-ec-f79ac11c5d3e0b79f1012eaf97d201706ec80c23.tar.gz | |
zephyr: volteer: Set LED PWM clock source to LFCLK
NPCX PWM default clock is set to APB2 which doesn't work in NPCX deep
sleep power state. Originally, volteer uses PWM_CONFIG_DSLEEP flag
which sets the clock source to LFCLK. Zephyr volteer project hasn't set
LED PWM clock source to LFCLK. Setting LED PWM clock source to LFCLK
lets LEDs work correctly in NPCX deep sleep power state.
BUG=b:184653704
BRANCH=none
TEST=System enters s0ix & ec enters deep sleep. Check led is on for 1
second, and off for 3 seconds correctly.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: Idffcd6428d83049812ab9bbac1f7187a2e6a62c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2839048
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
| -rw-r--r-- | zephyr/projects/volteer/volteer/pwm.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/zephyr/projects/volteer/volteer/pwm.dts b/zephyr/projects/volteer/volteer/pwm.dts index 0e02a2f74d..35836c2a4c 100644 --- a/zephyr/projects/volteer/volteer/pwm.dts +++ b/zephyr/projects/volteer/volteer/pwm.dts @@ -43,16 +43,19 @@ /* Green LED */ &pwm0 { status = "okay"; + clocks = <&pcc NPCX_CLOCK_BUS_LFCLK NPCX_PWDWN_CTL2 0>; }; /* Red LED */ &pwm1 { status = "okay"; + clocks = <&pcc NPCX_CLOCK_BUS_LFCLK NPCX_PWDWN_CTL2 1>; }; /* Blue LED */ &pwm2 { status = "okay"; + clocks = <&pcc NPCX_CLOCK_BUS_LFCLK NPCX_PWDWN_CTL2 2>; }; /* Keyboard backlight */ @@ -68,4 +71,5 @@ /* Side selection LED */ &pwm7 { status = "okay"; + clocks = <&pcc NPCX_CLOCK_BUS_LFCLK NPCX_PWDWN_CTL2 7>; }; |