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author | Wai-Hong Tam <waihong@google.com> | 2021-06-21 15:32:21 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-06-22 01:11:07 +0000 |
commit | 52d234a3451310ce1f67e6d75cc3e39736c1c8ab (patch) | |
tree | c6769fa9e3feb26ec5bd35fc02e940f9282a2151 | |
parent | 7afb9fa93b6bc5c9bc34b2fe991235db417e61c7 (diff) | |
download | chrome-ec-52d234a3451310ce1f67e6d75cc3e39736c1c8ab.tar.gz |
qcom: Enable AP_RST_L interrupt on sysjump to RW
The AP_RST_L interrupt is default disabled. It avoids unnecessary power
signal messages in G3/S5 as the signal is floating (no power). The
interrupt is then enabled during S5->S3 and disabled during S3->S5.
However, when sysjump to RW, the interrupt is back to default disabled.
This causes the `apreset` command fails to sample the AP_RST_L signal
and forces to execute a cold reboot sequence.
We should enable AP_RST_L interrupt when the initial power state is S0,
the sysjump to RW scenario.
BRANCH=Trogdor
BUG=b:185551931
TEST=Tested on Coachz, reboot EC, sysjump to RW, perform `apreset` which
executes a warm AP reboot.
Change-Id: I7eae5f2bcacfebeeee529aa7ad96409cfe9122e9
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977573
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
-rw-r--r-- | power/qcom.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/power/qcom.c b/power/qcom.c index bae5679a2b..c6a87c9b92 100644 --- a/power/qcom.c +++ b/power/qcom.c @@ -552,6 +552,14 @@ enum power_state power_chipset_init(void) if (power_get_signals() & IN_POWER_GOOD) { CPRINTS("SOC ON"); init_power_state = POWER_S0; + + /* + * Reenable the power signal AP_RST_L interrupt, which + * should be enabled during S5->S3 but sysjump makes + * it back to default, disabled. + */ + power_signal_enable_interrupt(GPIO_AP_RST_L); + /* Disable idle task deep sleep when in S0 */ disable_sleep(SLEEP_MASK_AP_RUN); } else { |