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authorVincent Palatin <vpalatin@chromium.org>2018-05-24 17:40:00 +0200
committerchrome-bot <chrome-bot@chromium.org>2018-06-18 05:24:10 -0700
commit12f949ce832da4b9ffd1f3111fcaa7f9103ca3ea (patch)
treef081643db04e8bee1f8fdd7b557915e75013d457
parent966802817aeb59a32dc72d5330252881a06010ce (diff)
downloadchrome-ec-12f949ce832da4b9ffd1f3111fcaa7f9103ca3ea.tar.gz
nocturne_fp: update flash_fp_mcu
Update the board-specific parameters for the new Nocturne board. Add both configurations in the script, so it's convenient to carry around. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:79666174 TEST=On Nocturne, run './flash_fp_mcu ec.bin'. TEST=On Meowth, run './flash_fp_mcu ec.bin'. Change-Id: Ic84f679c02cc03266a6469fbe898c47e4c66c11c Reviewed-on: https://chromium-review.googlesource.com/1071787 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
-rwxr-xr-xboard/meowth_fp/flash_fp_mcu35
1 files changed, 22 insertions, 13 deletions
diff --git a/board/meowth_fp/flash_fp_mcu b/board/meowth_fp/flash_fp_mcu
index 2a6722076e..251860d7bd 100755
--- a/board/meowth_fp/flash_fp_mcu
+++ b/board/meowth_fp/flash_fp_mcu
@@ -3,25 +3,34 @@
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
-# Meowth configuration
-SPIDEV="/dev/spidev1.0"
-# Cannonlake PCH GPIOs
-GPIOCHIP="gpiochip268"
# GSPI1 ACPI device for FP MCU
SPIID="spi-PRP0001:01"
-# FPMCU RST_ODL is on GPP_A23 = 268 + 23 = 291
-GPIO_NRST=291
-# FPMCU BOOT0 is on GPP_A21 = 268 + 21 = 289
-GPIO_BOOT0=289
-if [ ! -e "/sys/class/gpio/${GPIOCHIP}" ]
-then
- echo "Cannot find the GPIO chip. Are your running on Meowth ?"
+# Cannonlake PCH GPIOs
+CNL_GPIOCHIP="gpiochip268"
+# Kabylake PCH GPIOs
+KBL_GPIOCHIP="gpiochip360"
+
+if [ -e "/sys/class/gpio/${CNL_GPIOCHIP}" ]; then
+ # Meowth configuration
+ SPIDEV="/dev/spidev1.0"
+ # FPMCU RST_ODL is on GPP_A23 = 268 + 23 = 291
+ GPIO_NRST=291
+ # FPMCU BOOT0 is on GPP_A21 = 268 + 21 = 289
+ GPIO_BOOT0=289
+elif [ -e "/sys/class/gpio/${KBL_GPIOCHIP}" ]; then
+ # Nocturne configuration
+ SPIDEV="/dev/spidev32765.0"
+ # FPMCU RST_ODL is on GPP_C10 = 360 + 58 = 418
+ GPIO_NRST=418
+ # FPMCU BOOT0 is on GPP_C8 = 360 + 56 = 416
+ GPIO_BOOT0=416
+else
+ echo "Cannot find a known GPIO chip."
exit 1
fi
-if [ ! -f "$1" ]
-then
+if [ ! -f "$1" ]; then
echo "Invalid image file: $1"
echo "Usage: $0 ec.bin"
exit 1