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authorVijay Hiremath <vijay.p.hiremath@intel.com>2019-10-25 04:15:38 -0700
committerCommit Bot <commit-bot@chromium.org>2019-11-01 02:46:02 +0000
commitfc8aa25ddec6c139cf04db1311395294e26897b2 (patch)
treec4de3f3385710a2fd18dd2fc36ba8e9fb9fb0e89
parent3b390264a415ce121a8c6f8db9fa9c42c647aaec (diff)
downloadchrome-ec-fc8aa25ddec6c139cf04db1311395294e26897b2.tar.gz
tglrvp: Correct GPIO alternate function parameter
Modified the gpio.inc file to reflect the new changes done for the alternate function parameter. BUG=b:139427854 BRANCH=none TEST=make buildall -j Change-Id: I3eed1b825f390581975d44734b62b7a73a2acb98 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880975 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r--board/tglrvpu_ite/gpio.inc22
1 files changed, 11 insertions, 11 deletions
diff --git a/board/tglrvpu_ite/gpio.inc b/board/tglrvpu_ite/gpio.inc
index 25fb2c58a7..d7acc76b92 100644
--- a/board/tglrvpu_ite/gpio.inc
+++ b/board/tglrvpu_ite/gpio.inc
@@ -186,20 +186,20 @@ GPIO(I2C_F_SCL, PIN(A, 4), GPIO_INPUT)
GPIO(I2C_F_SDA, PIN(A, 5), GPIO_INPUT)
/* Alternate pins for I2C */
-ALTERNATE(PIN_MASK(A, BIT(4) | BIT(5)), 0, MODULE_I2C, 0) /* I2C F SCL/SDA A4/A5 */
-ALTERNATE(PIN_MASK(B, BIT(3) | BIT(4)), 0, MODULE_I2C, 0) /* I2C A SCL/SDA B3/B4 */
-ALTERNATE(PIN_MASK(C, BIT(1) | BIT(2)), 0, MODULE_I2C, 0) /* I2C B SCL/SDA C1/C2 */
-ALTERNATE(PIN_MASK(E, BIT(0) | BIT(7)), 0, MODULE_I2C, 0) /* I2C E SCL/SDA E0/E7 */
-ALTERNATE(PIN_MASK(C, BIT(7)), 0, MODULE_I2C, 0) /* I2C C SCL C7 */
-ALTERNATE(PIN_MASK(F, BIT(7)), 0, MODULE_I2C, 0) /* I2C C SDA F7 */
+ALTERNATE(PIN_MASK(A, BIT(4) | BIT(5)), GPIO_ALT_FUNC_DEFAULT, MODULE_I2C, GPIO_FLAG_NONE) /* I2C F SCL/SDA A4/A5 */
+ALTERNATE(PIN_MASK(B, BIT(3) | BIT(4)), GPIO_ALT_FUNC_DEFAULT, MODULE_I2C, GPIO_FLAG_NONE) /* I2C A SCL/SDA B3/B4 */
+ALTERNATE(PIN_MASK(C, BIT(1) | BIT(2)), GPIO_ALT_FUNC_DEFAULT, MODULE_I2C, GPIO_FLAG_NONE) /* I2C B SCL/SDA C1/C2 */
+ALTERNATE(PIN_MASK(E, BIT(0) | BIT(7)), GPIO_ALT_FUNC_DEFAULT, MODULE_I2C, GPIO_FLAG_NONE) /* I2C E SCL/SDA E0/E7 */
+ALTERNATE(PIN_MASK(C, BIT(7)), GPIO_ALT_FUNC_DEFAULT, MODULE_I2C, GPIO_FLAG_NONE) /* I2C C SCL C7 */
+ALTERNATE(PIN_MASK(F, BIT(7)), GPIO_ALT_FUNC_DEFAULT, MODULE_I2C, GPIO_FLAG_NONE) /* I2C C SDA F7 */
/* Alternate pins for UART */
-ALTERNATE(PIN_MASK(B, BIT(0) | BIT(1)), 0, MODULE_UART, GPIO_PULL_UP) /* UART1 B0/B1 */
+ALTERNATE(PIN_MASK(B, BIT(0) | BIT(1)), GPIO_ALT_FUNC_DEFAULT, MODULE_UART, GPIO_PULL_UP) /* UART1 B0/B1 */
/* Alternate pins for ADC */
-ALTERNATE(PIN_MASK(I, BIT(1) | BIT(6)), 0, MODULE_ADC, 0) /* ADC 1,6 -> I1,I6 */
-ALTERNATE(PIN_MASK(L, BIT(0) | BIT(2)), 0, MODULE_ADC, 0) /* ADC 13,15 -> L0,L2 */
+ALTERNATE(PIN_MASK(I, BIT(1) | BIT(6)), GPIO_ALT_FUNC_DEFAULT, MODULE_ADC, GPIO_FLAG_NONE) /* ADC 1,6 -> I1,I6 */
+ALTERNATE(PIN_MASK(L, BIT(0) | BIT(2)), GPIO_ALT_FUNC_DEFAULT, MODULE_ADC, GPIO_FLAG_NONE) /* ADC 13,15 -> L0,L2 */
/* Alternate pins for FAN */
-ALTERNATE(PIN_MASK(A, BIT(2)), 0, MODULE_PWM, 0) /* PWM2 A2 */
-ALTERNATE(PIN_MASK(D, BIT(7)), 0, MODULE_PWM, 0) /* TACH1A D7 */
+ALTERNATE(PIN_MASK(A, BIT(2)), GPIO_ALT_FUNC_DEFAULT, MODULE_PWM, GPIO_FLAG_NONE) /* PWM2 A2 */
+ALTERNATE(PIN_MASK(D, BIT(7)), GPIO_ALT_FUNC_DEFAULT, MODULE_PWM, GPIO_FLAG_NONE) /* TACH1A D7 */