diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-07-30 21:06:48 -0500 |
|---|---|---|
| committer | ChromeBot <chrome-bot@google.com> | 2013-08-01 00:30:24 -0700 |
| commit | 706f1211468ebfcd0fc9890b83f8443994a9f7f0 (patch) | |
| tree | 5990c04e4fcc655698021119181765cabd3cfa01 | |
| parent | 86bef29c3d1411c5dd9c3717432cd0bebb4fe45f (diff) | |
| download | chrome-ec-706f1211468ebfcd0fc9890b83f8443994a9f7f0.tar.gz | |
bolt: force SYS_PWROK and PP3300_DSW_GATED_EN to 0 in forcing G3 path
The following signals were not being initialized properly in the
forcing G3 path:
- GPIO_SYS_PWROK
- GPIO_PP3300_DSW_GATED_EN
This lead to the EC RW sysjump, but the boards wouldn't reboot
on the x86 side. Sadly, without this change, the board I have
works. However, those signals need to be driven low.
BUG=chrome-os-partner:20372
BRANCH=None
TEST=Willis tested on boards that previously didn't work.
Change-Id: I1771881485bc5be73ed2b08da91fddff9ab09167
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63845
Reviewed-by: Randall Spangler <rspangler@chromium.org>
| -rw-r--r-- | board/bolt/power_sequence.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/board/bolt/power_sequence.c b/board/bolt/power_sequence.c index bca948a596..ba5e70589c 100644 --- a/board/bolt/power_sequence.c +++ b/board/bolt/power_sequence.c @@ -127,11 +127,13 @@ enum x86_state x86_chipset_init(void) /* Force all signals to their G3 states */ CPRINTF("[%T x86 forcing G3]\n"); gpio_set_level(GPIO_PCH_PWROK, 0); + gpio_set_level(GPIO_SYS_PWROK, 0); gpio_set_level(GPIO_VCORE_EN, 0); gpio_set_level(GPIO_PP1050_EN, 0); gpio_set_level(GPIO_PP1350_EN, 0); gpio_set_level(GPIO_EC_EDP_VDD_EN, 0); gpio_set_level(GPIO_PP3300_DX_EN, 0); + gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 0); gpio_set_level(GPIO_PP5000_EN, 0); gpio_set_level(GPIO_PCH_DPWROK, 0); wireless_enable(0); |