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| author | Alexandru M Stan <amstan@chromium.org> | 2015-01-22 16:56:16 -0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-02-18 23:52:44 +0000 |
| commit | 3ae7240410e1bbdca9c0da49d23a8d8349eb2ef4 (patch) | |
| tree | 6f933d72daeefd28e300f1867ce72c450cbc4361 | |
| parent | 59e366ef6348ba6a3b03dbbe09b5b218210f733c (diff) | |
| download | chrome-ec-3ae7240410e1bbdca9c0da49d23a8d8349eb2ef4.tar.gz | |
hwtimer/hwtimer32: Remove task_resched_if_needed from watchdog help
Remove task_resched_if_needed, since we don't do any task scheduling
modifications. Just return instead.
This makes it work on F0 as well, where we don't have task_resched_if_needed
BUG=None
TEST=With series, see watchdog help work on any veyron
BRANCH=veyron
Change-Id: I93cce722b6d53008b015c7cdd56b7e77dc07bbff
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/242713
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 8363dfb14cb36fca412132ab14d2c9451de7d94e)
Reviewed-on: https://chromium-review.googlesource.com/250671
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
| -rw-r--r-- | chip/stm32/hwtimer.c | 6 | ||||
| -rw-r--r-- | chip/stm32/hwtimer32.c | 6 |
2 files changed, 4 insertions, 8 deletions
diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c index 9e8f959553..a1053e28c8 100644 --- a/chip/stm32/hwtimer.c +++ b/chip/stm32/hwtimer.c @@ -389,12 +389,10 @@ void IRQ_HANDLER(IRQ_WD)(void) asm volatile("mov r0, lr\n" "mov r1, sp\n" /* Must push registers in pairs to keep 64-bit aligned - * stack for ARM EABI. This also conveninently saves - * R0=LR so we can pass it to task_resched_if_needed. */ + * stack for ARM EABI. */ "push {r0, lr}\n" "bl watchdog_check\n" - "pop {r0, lr}\n" - "b task_resched_if_needed\n"); + "pop {r0,pc}\n"); } const struct irq_priority IRQ_PRIORITY(IRQ_WD) __attribute__((section(".rodata.irqprio"))) diff --git a/chip/stm32/hwtimer32.c b/chip/stm32/hwtimer32.c index 691e2f90f7..e04f540d04 100644 --- a/chip/stm32/hwtimer32.c +++ b/chip/stm32/hwtimer32.c @@ -204,12 +204,10 @@ void IRQ_HANDLER(IRQ_WD)(void) asm volatile("mov r0, lr\n" "mov r1, sp\n" /* Must push registers in pairs to keep 64-bit aligned - * stack for ARM EABI. This also conveninently saves - * R0=LR so we can pass it to task_resched_if_needed. */ + * stack for ARM EABI. */ "push {r0, lr}\n" "bl watchdog_check\n" - "pop {r0, lr}\n" - "b task_resched_if_needed\n"); + "pop {r0,pc}\n"); } const struct irq_priority IRQ_PRIORITY(IRQ_WD) __attribute__((section(".rodata.irqprio"))) |