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| author | David Hendricks <dhendrix@chromium.org> | 2016-08-02 16:37:08 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2016-11-22 22:41:30 +0000 |
| commit | 69c40b8315a393afd5046cbaba4c5fdecc7b1c77 (patch) | |
| tree | 5f6738416958baba9ee9925e15096b194732e982 | |
| parent | 6cfc0d0dd030b8b0334f99e99950a52fcf8267af (diff) | |
| download | chrome-ec-69c40b8315a393afd5046cbaba4c5fdecc7b1c77.tar.gz | |
spi_flash: Add GD25LQ40 write-protect support
This adds support for the GD25LQ40 NOR flash chip which is identical
to W25Q40 for the purposes of write-protection support for the ranges
that we care about.
BUG=chrome-os-partner:57015
BRANCH=none
TEST=Verify protect regs set appropriately with subsequent commit.
Change-Id: I09ad02e04fab4c539b9558180d73bf6c31da6aed
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/413227
Tested-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
| -rw-r--r-- | common/spi_flash_reg.c | 9 | ||||
| -rw-r--r-- | include/config.h | 3 |
2 files changed, 8 insertions, 4 deletions
diff --git a/common/spi_flash_reg.c b/common/spi_flash_reg.c index f3c372c838..547fe06d6c 100644 --- a/common/spi_flash_reg.c +++ b/common/spi_flash_reg.c @@ -44,15 +44,16 @@ static const struct protect_range spi_flash_protect_ranges[] = { { X, X, 1, { 0, 1, 0 }, 0, 0x20000 }, /* Lower 1/4 */ }; -#elif defined(CONFIG_SPI_FLASH_W25Q40) +#elif defined(CONFIG_SPI_FLASH_W25Q40) || defined(CONFIG_SPI_FLASH_GD25LQ40) /* Verified for W25Q40BV and W25Q40EW */ +/* For GD25LQ40, BP3 and BP4 have same meaning as TB and SEC */ static const struct protect_range spi_flash_protect_ranges[] = { /* CMP = 0 */ { 0, X, X, { 0, 0, 0 }, 0, 0 }, /* No protection */ - { 0, 0, 1, { 0, 1, 0 }, 0, 0x1ffff }, /* Lower 1/4 */ - { 0, 0, 1, { 0, 1, 1 }, 0, 0x3ffff }, /* Lower 1/2 */ + { 0, 0, 1, { 0, 1, 0 }, 0, 0x20000 }, /* Lower 1/4 */ + { 0, 0, 1, { 0, 1, 1 }, 0, 0x40000 }, /* Lower 1/2 */ /* CMP = 1 */ - { 1, 0, 0, { 0, 1, 1 }, 0, 0x3ffff }, /* Lower 1/2 */ + { 1, 0, 0, { 0, 1, 1 }, 0, 0x40000 }, /* Lower 1/2 */ { 1, 0, X, { 1, X, X }, 0, 0 }, /* None (W25Q40EW only) */ }; diff --git a/include/config.h b/include/config.h index 5621c4ae7b..d47eb2c67f 100644 --- a/include/config.h +++ b/include/config.h @@ -1715,6 +1715,9 @@ /* Support W25X40 SPI flash */ #undef CONFIG_SPI_FLASH_W25X40 +/* Support GD25Q40 SPI flash */ +#undef CONFIG_SPI_FLASH_GD25LQ40 + /* Support GD25Q41B SPI flash */ #undef CONFIG_SPI_FLASH_GD25Q41B |