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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2016-10-19 14:57:18 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2016-10-26 22:01:48 +0000 |
| commit | 7bd8d80c3886cab7c80e72158911f70b91baaa97 (patch) | |
| tree | 63959ada20859df2e3a6353e15341dc585d3dd0d | |
| parent | ed3ff076bbcd8f15c81ac5f97f496ba017bc5d74 (diff) | |
| download | chrome-ec-7bd8d80c3886cab7c80e72158911f70b91baaa97.tar.gz | |
power: rk3399: Adjust power-down sequencing delays
BUG=chrome-os-partner:58474
BRANCH=gru
TEST=suspend_stress_test on kevin for 50 cycles.
Change-Id: Ice721e04c6d4389520f40c4ca72f5bec0e1bdb5b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/399992
Reviewed-by: Douglas Anderson <dianders@chromium.org>
| -rw-r--r-- | power/rk3399.c | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/power/rk3399.c b/power/rk3399.c index eb0080f083..2dc2575678 100644 --- a/power/rk3399.c +++ b/power/rk3399.c @@ -282,34 +282,32 @@ enum power_state power_handle_state(enum power_state state) hook_notify(HOOK_CHIPSET_SUSPEND); CHECK_ABORTED_SUSPEND(); - msleep(10); + msleep(20); CHECK_ABORTED_SUSPEND(); gpio_set_level(GPIO_PP1800_SENSOR_EN_L, 1); gpio_set_level(GPIO_PP1800_SIXAXIS_EN_L, 1); gpio_set_level(GPIO_PP3300_S0_EN_L, 1); - msleep(10); + msleep(20); CHECK_ABORTED_SUSPEND(); gpio_set_level(GPIO_PP1800_S0_EN_L, 1); - msleep(10); + msleep(1); CHECK_ABORTED_SUSPEND(); gpio_set_level(GPIO_AP_CORE_EN, 0); - msleep(10); + msleep(20); CHECK_ABORTED_SUSPEND(); gpio_set_level(GPIO_PP1800_AP_AVDD_EN_L, 1); - msleep(10); + msleep(1); CHECK_ABORTED_SUSPEND(); gpio_set_level(GPIO_PP900_DDRPLL_EN, 0); - msleep(10); + msleep(1); CHECK_ABORTED_SUSPEND(); gpio_set_level(GPIO_PPVAR_CLOGIC_EN, 0); - msleep(10); - CHECK_ABORTED_SUSPEND(); /* * Enable idle task deep sleep. Allow the low power idle task @@ -336,17 +334,17 @@ enum power_state power_handle_state(enum power_state state) gpio_set_level(GPIO_PP3300_TRACKPAD_EN_L, 1); gpio_set_level(GPIO_PP5000_EN, 0); gpio_set_level(GPIO_PP3300_USB_EN_L, 1); - msleep(10); + msleep(20); gpio_set_level(GPIO_PP1800_USB_EN_L, 1); - msleep(2); + msleep(10); gpio_set_level(GPIO_LPDDR_PWR_EN, 0); - msleep(2); + msleep(20); gpio_set_level(GPIO_PP1800_PMU_EN_L, 1); msleep(2); gpio_set_level(GPIO_PP900_USB_EN, 0); gpio_set_level(GPIO_PP900_PLL_EN, 0); gpio_set_level(GPIO_PP900_PMU_EN, 0); - msleep(2); + msleep(6); gpio_set_level(GPIO_PP900_PCIE_EN, 0); gpio_set_level(GPIO_PP900_AP_EN, 0); gpio_set_level(GPIO_PPVAR_LOGIC_EN, 0); |