nuc: Fixed flash layout issue for npcx

Fixed flash layout issue for npcx

Modified drivers:
1. config_flash_layout.h: Fixed layout issue for npcx
2. flash_ec: add flashrom support for boards without JTAG in servo
connector

BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none

Change-Id: I0b9b679c52b8a8e2a26c278b5024d0350fb77338
Reviewed-on: https://chromium-review.googlesource.com/300392
Commit-Ready: Mulin Chao <mlchao@nuvoton.com>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Shawn N <shawnn@chromium.org>

6 files changed, 98 insertions, 55 deletions

diff --git a/chip/npcx/config_flash_layout.h b/chip/npcx/config_flash_layout.h
index 5d296c4836..60e9795890 100644
--- a/chip/npcx/config_flash_layout.h
+++ b/chip/npcx/config_flash_layout.h
@@ -45,14 +45,14 @@
 #define CONFIG_WP_STORAGE_SIZE	CONFIG_EC_PROTECTED_STORAGE_SIZE
 
 /* RO firmware offset in flash */
-#define CONFIG_RO_MEM_OFF	CONFIG_RO_HDR_SIZE
-#define CONFIG_RO_SIZE		CONFIG_FW_IMAGE_SIZE
+#define CONFIG_RO_MEM_OFF	0
+#define CONFIG_RO_SIZE		CONFIG_FW_IMAGE_SIZE    /* 96KB for RW FW */
 
 /* RW firmware offset in flash */
 #define CONFIG_RW_MEM_OFF	CONFIG_RW_STORAGE_OFF
-#define CONFIG_RW_SIZE		CONFIG_FW_IMAGE_SIZE
+#define CONFIG_RW_SIZE		CONFIG_FW_IMAGE_SIZE    /* 96KB for RW FW */
 
-/* The storage offset of ec.R*.flat which is used for CONFIG_CDRAM_ARCH */
+/* The storage offset of ec.R*.flat which is used for firmware_image.lds */
 #define CONFIG_RO_STORAGE_OFF	CONFIG_RO_HDR_SIZE
 #define CONFIG_RW_STORAGE_OFF	0
 
diff --git a/chip/npcx/spiflashfw/ec_npcxflash.c b/chip/npcx/spiflashfw/ec_npcxflash.c
index ef62ac97dc..6f46a4374a 100644
--- a/chip/npcx/spiflashfw/ec_npcxflash.c
+++ b/chip/npcx/spiflashfw/ec_npcxflash.c
@@ -220,7 +220,7 @@ int sspi_flash_verify(int offset, int size, const char *data)
 	uint8_t		*ptr_flash;
 	uint8_t		*ptr_mram;
 
-	ptr_flash = (uint8_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
+	ptr_flash = (uint8_t *)(CONFIG_MAPPED_STORAGE_BASE + offset);
 	ptr_mram  = (uint8_t *)data;
 	result = 1;
 
diff --git a/chip/npcx/system.c b/chip/npcx/system.c
index b6c23396b2..b1ef8a62b0 100644
--- a/chip/npcx/system.c
+++ b/chip/npcx/system.c
@@ -700,10 +700,12 @@ void system_jump_to_booter(void)
 
 	/* RO region FW */
 	if (IS_BIT_SET(NPCX_FWCTRL, NPCX_FWCTRL_RO_REGION)) {
-		flash_offset = CONFIG_RO_MEM_OFF;
+		flash_offset = CONFIG_EC_PROTECTED_STORAGE_OFF +
+				CONFIG_RO_STORAGE_OFF;
 		flash_used = CONFIG_RO_SIZE;
 	} else { /* RW region FW */
-		flash_offset = CONFIG_RW_MEM_OFF;
+		flash_offset = CONFIG_EC_WRITABLE_STORAGE_OFF +
+				CONFIG_RW_STORAGE_OFF;
 		flash_used = CONFIG_RW_SIZE;
 	}
 
diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S
index 0ed3fd6563..3104f41c64 100644
--- a/common/firmware_image.lds.S
+++ b/common/firmware_image.lds.S
@@ -14,7 +14,14 @@ MEMORY
 SECTIONS
 {
     . = ALIGN(CONFIG_FLASH_BANK_SIZE);
+#if defined(NPCX_RO_HEADER)
+/* Replace *_MEM_OFF with *_STORAGE_OFF to indicate flat file contains header
+ * or some struture which doesn't belong to FW */
+    .image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_EC_PROTECTED_STORAGE_OFF\
+     ) {
+#else
     .image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) {
+#endif
         *(.image.RO)
     } > FLASH =0xff
     . = ALIGN(CONFIG_FLASH_BANK_SIZE);
@@ -25,7 +32,12 @@ SECTIONS
     } > FLASH =0xff
     . = ALIGN(CONFIG_FLASH_BANK_SIZE);
 #endif
-#ifdef CONFIG_EXTERNAL_STORAGE
+
+#if defined(NPCX_RO_HEADER)
+    /* npcx uses *STORAGE_OFF to plan the layout of flash image */
+    .image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_EC_WRITABLE_STORAGE_OFF \
+     + CONFIG_RW_STORAGE_OFF) {
+#elif (CONFIG_RO_MEM_OFF == CONFIG_RW_MEM_OFF)
 /* This is applicable to ECs in which RO and RW execution is
 mapped to the same location but we still have to generate an ec.bin with RO
 and RW images at different Flash offset */
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S
index 7fcf6f0adc..7ce1e27d2f 100644
--- a/core/cortex-m/ec.lds.S
+++ b/core/cortex-m/ec.lds.S
@@ -25,11 +25,15 @@ MEMORY
      * by booter.
      */
     FLASH_HDR (rx) : ORIGIN = FW_OFF(RO_HDR), LENGTH = FW_SIZE(RO_HDR)
+    FLASH (rx) : ORIGIN = FW_OFF(SECTION) + FW_SIZE(RO_HDR), \
+                 LENGTH = FW_SIZE(SECTION)
+#else
+    FLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION)
 #endif
 #ifdef CONFIG_SHAREDLIB
     SHARED_LIB (rx) : ORIGIN = FW_OFF(SHAREDLIB), LENGTH = FW_SIZE_(SHAREDLIB)
 #endif
-    FLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION)
+
     IRAM (rw)  : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE
 #ifdef CONFIG_EXTERNAL_STORAGE
    CDRAM (rx) : \
diff --git a/util/flash_ec b/util/flash_ec
index 96bdb85fbc..d45cd6913b 100755
--- a/util/flash_ec
+++ b/util/flash_ec
@@ -81,11 +81,15 @@ BOARDS_STM32_DFU=(
 	twinkie
 )
 
-BOARDS_NPCX=(
+BOARDS_NPCX_JTAG=(
 	npcx_evb
 	npcx_evb_arm
 )
 
+BOARDS_NPCX_SPI=(
+	wheatley
+)
+
 BOARDS_NRF51=(
 	hadoken
 )
@@ -341,6 +345,62 @@ function flash_openocd() {
 	die "Failed to program ${IMG}"
 }
 
+# helper function for using servo v2/3 with flashrom
+function flash_flashrom() {
+	TOOL_PATH="${EC_DIR}/build/${BOARD}/util:/usr/sbin/:$PATH"
+	FLASHROM=$(PATH="${TOOL_PATH}" which flashrom)
+	FLASHROM_PARAM="-p ft2232_spi:type=servo-v2,port=B"
+
+	if [ ! -x "$FLASHROM" ]; then
+		die "no flashrom util found."
+	fi
+
+	SERIALNAME=$(${DUT_CONTROL_CMD} serialname | cut -d: -f2)
+	if [[ "$SERIALNAME" != "" ]] ; then
+		FLASHROM_PARAM="${FLASHROM_PARAM},serial=${SERIALNAME}"
+	fi
+
+	dut_control cold_reset:on
+
+	# Turn on SPI1 interface on servo for 3.3V SPI Flash Chip
+	dut_control spi1_vref:pp3300 spi1_buf_en:on spi1_buf_on_flex_en:on
+
+	SPI_SIZE=$(sudo ${FLASHROM} ${FLASHROM_PARAM} --get-size 2>/dev/null | tail -n 1)
+	IMG_SIZE=$(stat -c%s "$IMG")
+	PATCH_SIZE=$((${SPI_SIZE} - ${IMG_SIZE}))
+
+	# Temp image
+	T=/tmp/flash_spi_$$
+
+if $(in_array "${BOARDS_NPCX_SPI[@]}" "${BOARD}"); then
+	{	# Patch temp image up to SPI_SIZE
+		cat $IMG
+		if [[ ${IMG_SIZE} -lt ${SPI_SIZE} ]] ; then
+			dd if=/dev/zero bs=${PATCH_SIZE} count=1 | tr '\0' '\377'
+		fi
+	} > $T
+else
+	{	# Patch temp image up to SPI_SIZE
+		if [[ ${IMG_SIZE} -lt ${SPI_SIZE} ]] ; then
+			dd if=/dev/zero bs=${PATCH_SIZE} count=1 | tr '\0' '\377'
+		fi
+		cat $IMG
+	} > $T
+fi
+
+
+	sudo timeout -k 10 -s 9 "${FLAGS_timeout}" \
+		${FLASHROM} ${FLASHROM_PARAM} -w "${T}"
+
+	rm $T
+
+	# Turn off SPI1 interface on servo
+	dut_control spi1_vref:off spi1_buf_en:off spi1_buf_on_flex_en:off
+
+	# Do not save/restore servo settings
+	save=
+}
+
 function flash_stm32() {
 	TOOL_PATH="${EC_DIR}/build/${BOARD}/util:$PATH"
 	STM32MON=$(PATH="${TOOL_PATH}" which stm32mon)
@@ -418,7 +478,7 @@ function flash_nrf51() {
 	dut_control swd_reset:on swd_reset:off
 }
 
-function flash_npcx() {
+function flash_npcx_jtag() {
 	IMG_PATH="${EC_DIR}/build/${BOARD}"
 	OCD_CHIP_CFG="npcx_chip.cfg"
 	if [ "${FLAGS_ro}" = ${FLAGS_TRUE} ] ; then
@@ -435,49 +495,12 @@ function flash_npcx() {
 	flash_openocd
 }
 
-function flash_mec1322() {
-	TOOL_PATH="${EC_DIR}/build/${BOARD}/util:/usr/sbin/:$PATH"
-	FLASHROM=$(PATH="${TOOL_PATH}" which flashrom)
-	FLASHROM_PARAM="-p ft2232_spi:type=servo-v2,port=B"
-
-	if [ ! -x "$FLASHROM" ]; then
-		die "no flashrom util found."
-	fi
-
-	SERIALNAME=$(${DUT_CONTROL_CMD} serialname | cut -d: -f2)
-	if [[ "$SERIALNAME" != "" ]] ; then
-		FLASHROM_PARAM="${FLASHROM_PARAM},serial=${SERIALNAME}"
-	fi
-
-	dut_control cold_reset:on
-
-	# Turn on SPI1 interface on servo for 3.3V SPI Flash Chip
-	dut_control spi1_vref:pp3300 spi1_buf_en:on spi1_buf_on_flex_en:on
-
-	SPI_SIZE=$(sudo ${FLASHROM} ${FLASHROM_PARAM} --get-size 2>/dev/null | tail -n 1)
-	IMG_SIZE=$(stat -c%s "$IMG")
-	PATCH_SIZE=$((${SPI_SIZE} - ${IMG_SIZE}))
-
-	# Temp image
-	T=/tmp/flash_mec_$$
-
-	{	# Patch temp image up to SPI_SIZE
-		if [[ ${IMG_SIZE} -lt ${SPI_SIZE} ]] ; then
-			dd if=/dev/zero bs=${PATCH_SIZE} count=1 | tr '\0' '\377'
-		fi
-		cat $IMG
-	} > $T
-
-	sudo timeout -k 10 -s 9 "${FLAGS_timeout}" \
-		${FLASHROM} ${FLASHROM_PARAM} -w "${T}"
-
-	rm $T
-
-	# Turn off SPI1 interface on servo
-	dut_control spi1_vref:off spi1_buf_en:off spi1_buf_on_flex_en:off
+function flash_npcx_spi() {
+	flash_flashrom
+}
 
-	# Do not save/restore servo settings
-	save=
+function flash_mec1322() {
+	flash_flashrom
 }
 
 if dut_control boot_mode 2>/dev/null ; then
@@ -502,8 +525,10 @@ elif $(in_array "${BOARDS_STM32[@]}" "${BOARD}"); then
 	CHIP="stm32"
 elif $(in_array "${BOARDS_STM32_DFU[@]}" "${BOARD}"); then
 	CHIP="stm32_dfu"
-elif $(in_array "${BOARDS_NPCX[@]}" "${BOARD}"); then
-	CHIP="npcx"
+elif $(in_array "${BOARDS_NPCX_JTAG[@]}" "${BOARD}"); then
+	CHIP="npcx_jtag"
+elif $(in_array "${BOARDS_NPCX_SPI[@]}" "${BOARD}"); then
+	CHIP="npcx_spi"
 elif $(in_array "${BOARDS_NRF51[@]}" "${BOARD}"); then
 	CHIP="nrf51"
 elif $(in_array "${BOARDS_MEC1322[@]}" "${BOARD}"); then