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authorAaron Durbin <adurbin@chromium.org>2018-04-24 12:49:59 -0600
committerchrome-bot <chrome-bot@chromium.org>2018-04-25 14:40:42 -0700
commite889631f56776391fdd099e52d4f3f3e4ae1e66a (patch)
tree2ae3f07751b952aa5fb86d1d41486812b4619f05
parentb73bede72dd6c176040d71cceedd58100569d444 (diff)
downloadchrome-ec-e889631f56776391fdd099e52d4f3f3e4ae1e66a.tar.gz
board/yorp: fix PMIC_EN gpio
Apparently the symbol in the yorp schematic is incorrect for our part. The PMIC_EN signal on ball H6 is actually GPIO72 -- not GPIOD7. Adjust the gpio used for PMIC_EN. Note: GPIO72 needs to be put in gpio mode since it defaults to PWRGD functionality. However, gpio_pre_init() in chip/npcx/gpio.c enables gpio functionality by default. If that changes, the board options will need to change as well. BUG=b:78352179 TEST=Built. Booted. PMIC_EN goes up and down as expected. BRANCH=none Change-Id: I955f9a24e0fbecb0cda1380c237fa44c9a575e45 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1026375 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
-rw-r--r--board/yorp/gpio.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc
index e77dc29cc3..83c83a731b 100644
--- a/board/yorp/gpio.inc
+++ b/board/yorp/gpio.inc
@@ -56,7 +56,7 @@ GPIO(PP5000_PG, PIN(C, 0), GPIO_INPUT) /* PP5000_PG_OD */
GPIO(EN_P3300_TRACKPAD_ODL, PIN(3, 3), GPIO_ODR_HIGH)
GPIO(EN_PP3300, PIN(D, 4), GPIO_OUT_LOW) /* EN_PP3300_A */
GPIO(PP3300_PG, PIN(6, 0), GPIO_INPUT) /* PP3300_PG_OD */
-GPIO(PMIC_EN, PIN(D, 7), GPIO_OUT_LOW) /* Enable A Rails via PMIC */
+GPIO(PMIC_EN, PIN(7, 2), GPIO_OUT_LOW) /* Enable A Rails via PMIC */
GPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC. All _A rails now up. */
GPIO(PCH_SYS_PWROK, PIN(B, 7), GPIO_OUT_LOW) /* EC_PCH_PWROK. All S0 rails now up. */