diff options
| author | Dino Li <Dino.Li@ite.com.tw> | 2018-06-20 12:28:05 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-21 04:45:57 -0700 |
| commit | 794e0117d9930d57bf032b1eee2bfc180413a172 (patch) | |
| tree | 20642a5bf12481156925e15e81313d8b6514c95c | |
| parent | dcec7f8a88c9522e45eab1539d3dd5edb53fae83 (diff) | |
| download | chrome-ec-794e0117d9930d57bf032b1eee2bfc180413a172.tar.gz | |
it83xx: gpio: disable default pull-down of USB controller
At default, there is a 15K pull-down resistor on both D-/D+
pins(GPH5/GPH6).
We disable these two pull-down resistors so these two pins will work
properly in GPIO mode.
BRANCH=none
BUG=b:110237505
TEST=on EVB, add a 100K pull-up resistor on GPH5 and measuring the
voltage is around 3.3V if this pin is configured as input.
Change-Id: I5fe3599eff3ea458cd964c95386f922cf2d3bcee
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1105689
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
| -rw-r--r-- | chip/it83xx/gpio.c | 8 | ||||
| -rw-r--r-- | chip/it83xx/registers.h | 7 |
2 files changed, 14 insertions, 1 deletions
diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c index 134d5b3472..8cd80a1d94 100644 --- a/chip/it83xx/gpio.c +++ b/chip/it83xx/gpio.c @@ -464,6 +464,14 @@ void gpio_pre_init(void) } #endif +#ifndef CONFIG_USB + /* + * Disable default pull-down of USB controller (GPH5 and GPH6) if we + * don't use this module. + */ + IT83XX_USB_P0MCR &= ~USB_DP_DM_PULL_DOWN_EN; +#endif + for (i = 0; i < GPIO_COUNT; i++, g++) { flags = g->flags; diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index 4b6a702d15..e66aee6a22 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -1300,6 +1300,12 @@ enum usbpd_port { /* PUT_OOB data byte 0 - 79 */ #define IT83XX_ESPI_QUEUE_PUT_OOB(i) REG8(IT83XX_ESPI_QUEUE_BASE+0x80+(i)) +/* USB Controller */ +#define IT83XX_USB_BASE 0x00F02F00 + +#define IT83XX_USB_P0MCR REG8(IT83XX_USB_BASE+0xE4) +#define USB_DP_DM_PULL_DOWN_EN (1 << 4) + /* Wake pin definitions, defined at board-level */ extern const enum gpio_signal hibernate_wake_pins[]; extern const int hibernate_wake_pins_used; @@ -1313,6 +1319,5 @@ extern const int hibernate_wake_pins_used; #define IT83XX_DBGR_BASE 0x00F02500 #define IT83XX_OW_BASE 0x00F02A00 #define IT83XX_CEC_BASE 0x00F02E00 -#define IT83XX_USB_BASE 0x00F02F00 #endif /* __CROS_EC_REGISTERS_H */ |