diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2018-05-29 12:29:33 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-05 02:15:32 -0700 |
| commit | 0988c5875f92c38e560ecd4c6889167c738f66a8 (patch) | |
| tree | a697477f2d6aee3db7c8e8d5c84ef633e48fb367 | |
| parent | 8f21950cc04811865383f25c24557226568e3c70 (diff) | |
| download | chrome-ec-0988c5875f92c38e560ecd4c6889167c738f66a8.tar.gz | |
Nami: Toggle Anx7447 reset line at start-up
This patch configures the GPIO pin connected to the reset pin of
Anx7447 as push-pull low. When the EC start up from reset, it
pulls it high, waits for 1 msec, then pulls it low. This allows the
tcpc to recover from a hang and guarantees it to start from a known
state.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:79868559
BRANCH=none
TEST=Verify Anx7447 port charges on Nami with a rework.
Change-Id: Ib7683e20160edf0f320a8c6af25f5f74d4f74538
Reviewed-on: https://chromium-review.googlesource.com/1077015
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
| -rw-r--r-- | board/nami/board.c | 12 | ||||
| -rw-r--r-- | board/nami/gpio.inc | 2 |
2 files changed, 8 insertions, 6 deletions
diff --git a/board/nami/board.c b/board/nami/board.c index afc3d802ed..b6d35d29c1 100644 --- a/board/nami/board.c +++ b/board/nami/board.c @@ -77,7 +77,7 @@ static void tcpc_alert_event(enum gpio_signal signal) !gpio_get_level(GPIO_USB_C0_PD_RST_L)) return; else if ((signal == GPIO_USB_C1_PD_INT_ODL) && - !gpio_get_level(GPIO_USB_C1_PD_RST_L)) + gpio_get_level(GPIO_USB_C1_PD_RST)) return; #ifdef HAS_TASK_PDCMD @@ -241,10 +241,13 @@ void board_reset_pd_mcu(void) /* Assert reset */ gpio_set_level(GPIO_USB_C0_PD_RST_L, 0); - gpio_set_level(GPIO_USB_C1_PD_RST_L, 0); + gpio_set_level(GPIO_USB_C1_PD_RST, 1); msleep(1); gpio_set_level(GPIO_USB_C0_PD_RST_L, 1); - gpio_set_level(GPIO_USB_C1_PD_RST_L, 1); + gpio_set_level(GPIO_USB_C1_PD_RST, 0); + /* After TEST_R release, anx7447/3447 needs 2ms to finish eFuse + * loading. */ + msleep(2); } void board_tcpc_init(void) @@ -265,7 +268,6 @@ void board_tcpc_init(void) */ for (port = 0; port < CONFIG_USB_PD_PORT_COUNT; port++) { const struct usb_mux *mux = &usb_muxes[port]; - mux->hpd_update(port, 0, 0); } } @@ -281,7 +283,7 @@ uint16_t tcpc_get_alert_status(void) } if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) { - if (gpio_get_level(GPIO_USB_C1_PD_RST_L)) + if (!gpio_get_level(GPIO_USB_C1_PD_RST)) status |= PD_STATUS_TCPC_ALERT_1; } diff --git a/board/nami/gpio.inc b/board/nami/gpio.inc index 586c776de0..a96ea1263c 100644 --- a/board/nami/gpio.inc +++ b/board/nami/gpio.inc @@ -83,7 +83,7 @@ GPIO(USB_C1_5V_EN, PIN(3, 3), GPIO_OUT_LOW) /* C1 5V Enable */ GPIO(USB_C1_3A_EN, PIN(6, 6), GPIO_OUT_LOW) /* C1 3A Enable */ GPIO(USB_C1_CHARGE_L, PIN(C, 3), GPIO_OUT_LOW) /* C1 Charge enable. Active low. */ GPIO(USB_C0_PD_RST_L, PIN(C, 6), GPIO_ODR_HIGH) /* C0 PD Reset */ -GPIO(USB_C1_PD_RST_L, PIN(0, 0), GPIO_ODR_HIGH) /* C1 PD Reset */ +GPIO(USB_C1_PD_RST, PIN(0, 0), GPIO_OUT_LOW) /* C1 PD Reset */ GPIO(USB_C0_DP_HPD, PIN(9, 4), GPIO_INPUT) /* C0 DP Hotplug Detect */ GPIO(USB_C1_DP_HPD, PIN(A, 5), GPIO_INPUT) /* C1 DP Hotplug Detect */ GPIO(USB_PP3300_USB_PD, PIN(8, 4), GPIO_INPUT) /* Reserved. Currently, has no effect. */ |