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| author | Rajesh Kumar <rajesh3.kumar@intel.com> | 2022-10-07 15:32:24 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-10-11 16:04:03 +0000 |
| commit | 5bcd282988e01f335385ae5969d4cd942a83cee3 (patch) | |
| tree | 242ea896ebb57fe753743dd8dd32145ae2100d8b | |
| parent | 96372252d10684672ac32218f4f613ceb93cc932 (diff) | |
| download | chrome-ec-5bcd282988e01f335385ae5969d4cd942a83cee3.tar.gz | |
Zephyr: mtlrvpp_npcx: Correct the debounce delay for SYS_RESET_L signal
RVP uses MAX6818 to digitize the apreset physical button.
The EC SYS_RESET_L is connected to input of the digitizer.
From MAX6818 Data sheet, range of 'Debounce Duration' is
Minimum - 20 ms, Typical - 40 ms, Maximum - 80 ms.
Hence, configured appropriate sys-reset-delay in dts configuration.
BUG=none
BRANCH=none
TEST=zmake build mtlrvpp_npcx
EC console command 'apreset' is working and triggers a warm reboot.
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I7530aa6c3933ac26b59770b6b0db7e3f305dc00f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3939619
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Brandon Breitenstein <brandon.breitenstein@intel.corp-partner.google.com>
Reviewed-by: Al Semjonovs <asemjonovs@google.com>
| -rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts index 42745d328b..3c270d296f 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts @@ -13,6 +13,7 @@ sys-pwrok-delay = <3>; all-sys-pwrgd-timeout = <20>; + sys-reset-delay = <60>; }; pwr-en-pp3300-s5 { |