diff options
| author | Jes B. Klinke <jbk@chromium.org> | 2022-12-02 22:00:37 -0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-12-09 07:00:12 +0000 |
| commit | 85efd4a09df4d1ffab74f39cde6e27c14c73b3cd (patch) | |
| tree | 7f7633658d9899db48fb185ab6b7d68c5f93bb1e | |
| parent | 96747f3dc04518ce0d06c429fa5009f96fbe6294 (diff) | |
| download | chrome-ec-85efd4a09df4d1ffab74f39cde6e27c14c73b3cd.tar.gz | |
chips/stm32/usb_spi: Allow boards to handle non-standard SPI busses
The STM32L5 series has a special "OctoSPI" controller, which differs
from the standard spi controllers in capabilities and means of
programming. Rather than adding drivers for OctoSPI to the common EC
code, this change allows special-purpose drivers for HyperDebug to be
implemented in its board directory.
BUG=b:192262089
TEST=Observed HyperDebug forwarding to OctoSPI controller
Change-Id: Ia31eefcb53b08cc23aa0f14a8899bc227a88ea0c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4077429
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Tested-by: Jes Klinke <jbk@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Jes Klinke <jbk@chromium.org>
| -rw-r--r-- | chip/stm32/usb_spi.c | 14 | ||||
| -rw-r--r-- | chip/stm32/usb_spi.h | 14 |
2 files changed, 27 insertions, 1 deletions
diff --git a/chip/stm32/usb_spi.c b/chip/stm32/usb_spi.c index 35bd07d103..555e201b0b 100644 --- a/chip/stm32/usb_spi.c +++ b/chip/stm32/usb_spi.c @@ -426,6 +426,8 @@ void usb_spi_deferred(struct usb_spi_config const *config) if (config->state->mode == USB_SPI_MODE_START_SPI) { const struct spi_device_t *current_device = &spi_devices[config->state->current_spi_device_idx]; + bool custom_board_driver = current_device->usb_flags & + USB_SPI_CUSTOM_SPI_DEVICE; uint16_t status_code; int read_count = config->state->spi_read_ctx.transfer_size; #ifndef CONFIG_SPI_HALFDUPLEX @@ -439,7 +441,9 @@ void usb_spi_deferred(struct usb_spi_config const *config) read_count = SPI_READBACK_ALL; } #endif - status_code = spi_transaction( + + status_code = (custom_board_driver ? usb_spi_board_transaction : + spi_transaction)( current_device, config->state->spi_write_ctx.buffer, config->state->spi_write_ctx.transfer_size, config->state->spi_read_ctx.buffer, read_count); @@ -662,3 +666,11 @@ int usb_spi_interface(struct usb_spi_config const *config, usb_uint *rx_buf, STM32_TOGGLE_EP(0, EP_TX_RX_MASK, EP_TX_RX_VALID, EP_STATUS_OUT); return 0; } + +__overridable int +usb_spi_board_transaction(const struct spi_device_t *spi_device, + const uint8_t *txdata, int txlen, uint8_t *rxdata, + int rxlen) +{ + return EC_ERROR_UNIMPLEMENTED; +} diff --git a/chip/stm32/usb_spi.h b/chip/stm32/usb_spi.h index 3f73efe9bc..28462caea8 100644 --- a/chip/stm32/usb_spi.h +++ b/chip/stm32/usb_spi.h @@ -287,6 +287,9 @@ /* Is the USB host allowed to operate on SPI device. */ #define USB_SPI_ENABLED (BIT(0)) +/* Use board specific SPI driver when forwarding to this device. */ +#define USB_SPI_CUSTOM_SPI_DEVICE (BIT(1)) + enum packet_id_type { /* Request USB SPI configuration data from device. */ USB_SPI_PKT_ID_CMD_GET_USB_SPI_CONFIG = 0, @@ -664,4 +667,15 @@ int usb_spi_interface(struct usb_spi_config const *config, usb_uint *rx_buf, void usb_spi_board_enable(struct usb_spi_config const *config); void usb_spi_board_disable(struct usb_spi_config const *config); +/* + * In order to facilitate odd cases of e.g. a SPI bus sitting behind a second + * microcontroller, or otherwise needing a non-standard driver, setting the + * USB_SPI_CUSTOM_SPI_DEVICE_MASK bit of spi_device->port will cause the + * USB->SPI forwarding logic to invoke this method rather than the standard + * spi_transaction(). + */ +int usb_spi_board_transaction(const struct spi_device_t *spi_device, + const uint8_t *txdata, int txlen, uint8_t *rxdata, + int rxlen); + #endif /* __CROS_EC_USB_SPI_H */ |