metaknight: Initial EC image

Create the initial EC image for the metaknight variant by copying
the waddledoo reference board EC files into a new directory named
for the variant.

(Auto-Generated by create_initial_ec_image.sh version 1.2.0).

BUG=b:169813211
BRANCH=none
TEST=make BOARD=metaknight

Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Change-Id: I25cf60b45dfdfb50ec7a3e2c057e71eb7cbcaf5f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488951
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>

8 files changed, 1179 insertions, 0 deletions

diff --git a/board/metaknight/battery.c b/board/metaknight/battery.c
new file mode 100644
index 0000000000..64af3b4302
--- /dev/null
+++ b/board/metaknight/battery.c
@@ -0,0 +1,66 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "battery_fuel_gauge.h"
+#include "charge_state.h"
+#include "common.h"
+
+/*
+ * Battery info for all waddledoo battery types. Note that the fields
+ * start_charging_min/max and charging_min/max are not used for the charger.
+ * The effective temperature limits are given by discharging_min/max_c.
+ *
+ * Fuel Gauge (FG) parameters which are used for determining if the battery
+ * is connected, the appropriate ship mode (battery cutoff) command, and the
+ * charge/discharge FETs status.
+ *
+ * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery
+ * register. For some batteries, the charge/discharge FET bits are set when
+ * charging/discharging is active, in other types, these bits set mean that
+ * charging/discharging is disabled. Therefore, in addition to the mask for
+ * these bits, a disconnect value must be specified. Note that for TI fuel
+ * gauge, the charge/discharge FET status is found in Operation Status (0x54),
+ * but a read of Manufacturer Access (0x00) will return the lower 16 bits of
+ * Operation status which contains the FET status bits.
+ *
+ * The assumption for battery types supported is that the charge/discharge FET
+ * status can be read with a sb_read() command and therefore, only the register
+ * address, mask, and disconnect value need to be provided.
+ */
+const struct board_batt_params board_battery_info[] = {
+	/* POW-TECH Battery Information */
+	[BATTERY_POWER_TECH] = {
+		.fuel_gauge = {
+			.manuf_name = "POW-TECH",
+			.ship_mode = {
+				.reg_addr = 0x0,
+				.reg_data = { 0x10, 0x10 },
+			},
+			.fet = {
+				.reg_addr       = 0x00,
+				.reg_mask       = 0x2000,
+				.disconnect_val = 0x2000,
+			}
+		},
+		.batt_info = {
+			.voltage_max          = 8800,    /* mV */
+			.voltage_normal       = 7700,
+			.voltage_min          = 6000,
+			.precharge_current    = 160,       /* mA */
+			.start_charging_min_c = 0,
+			.start_charging_max_c = 45,
+			.charging_min_c       = 0,
+			.charging_max_c       = 45,
+			.discharging_min_c    = -20,
+			.discharging_max_c    = 60,
+		},
+
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT);
+
+const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_POWER_TECH;
diff --git a/board/metaknight/board.c b/board/metaknight/board.c
new file mode 100644
index 0000000000..1e658d65f2
--- /dev/null
+++ b/board/metaknight/board.c
@@ -0,0 +1,626 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Waddledoo board-specific configuration */
+
+#include "adc_chip.h"
+#include "button.h"
+#include "cbi_fw_config.h"
+#include "charge_manager.h"
+#include "charge_state_v2.h"
+#include "charger.h"
+#include "chipset.h"
+#include "common.h"
+#include "compile_time_macros.h"
+#include "driver/accel_bma2x2.h"
+#include "driver/accelgyro_bmi_common.h"
+#include "driver/bc12/pi3usb9201.h"
+#include "driver/charger/isl923x.h"
+#include "driver/retimer/nb7v904m.h"
+#include "driver/tcpm/raa489000.h"
+#include "driver/tcpm/tcpci.h"
+#include "driver/usb_mux/pi3usb3x532.h"
+#include "extpower.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "i2c.h"
+#include "keyboard_scan.h"
+#include "lid_switch.h"
+#include "motion_sense.h"
+#include "power.h"
+#include "power_button.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "stdbool.h"
+#include "switch.h"
+#include "system.h"
+#include "tablet_mode.h"
+#include "task.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usb_pd_tcpm.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+static void tcpc_alert_event(enum gpio_signal s)
+{
+	int port = (s == GPIO_USB_C0_INT_ODL) ? 0 : 1;
+
+	schedule_deferred_pd_interrupt(port);
+}
+
+static void usb_c0_interrupt(enum gpio_signal s)
+{
+	/*
+	 * The interrupt line is shared between the TCPC and BC 1.2 detection
+	 * chip.  Therefore we'll need to check both ICs.
+	 */
+	tcpc_alert_event(s);
+	task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0);
+}
+
+static void sub_usb_c1_interrupt(enum gpio_signal s)
+{
+	/*
+	 * The interrupt line is shared between the TCPC and BC 1.2 detection
+	 * chip.  Therefore we'll need to check both ICs.
+	 */
+	tcpc_alert_event(s);
+	task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12, 0);
+}
+
+static void sub_hdmi_hpd_interrupt(enum gpio_signal s)
+{
+	int hdmi_hpd_odl = gpio_get_level(GPIO_EC_I2C_SUB_C1_SDA_HDMI_HPD_ODL);
+
+	gpio_set_level(GPIO_EC_AP_USB_C1_HDMI_HPD, !hdmi_hpd_odl);
+}
+
+#include "gpio_list.h"
+
+/* ADC channels */
+const struct adc_t adc_channels[] = {
+	[ADC_TEMP_SENSOR_1] = {
+		.name = "TEMP_SENSOR1",
+		.input_ch = NPCX_ADC_CH0,
+		.factor_mul = ADC_MAX_VOLT,
+		.factor_div = ADC_READ_MAX + 1,
+		.shift = 0,
+	},
+	[ADC_TEMP_SENSOR_2] = {
+		.name = "TEMP_SENSOR2",
+		.input_ch = NPCX_ADC_CH1,
+		.factor_mul = ADC_MAX_VOLT,
+		.factor_div = ADC_READ_MAX + 1,
+		.shift = 0,
+	},
+	[ADC_SUB_ANALOG] = {
+		.name = "SUB_ANALOG",
+		.input_ch = NPCX_ADC_CH2,
+		.factor_mul = ADC_MAX_VOLT,
+		.factor_div = ADC_READ_MAX + 1,
+		.shift = 0,
+	},
+	[ADC_VSNS_PP3300_A] = {
+		.name = "PP3300_A_PGOOD",
+		.input_ch = NPCX_ADC_CH9,
+		.factor_mul = ADC_MAX_VOLT,
+		.factor_div = ADC_READ_MAX + 1,
+		.shift = 0,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+void board_init(void)
+{
+	int on;
+
+	gpio_enable_interrupt(GPIO_USB_C0_INT_ODL);
+
+	if (get_cbi_fw_config_db() == DB_1A_HDMI) {
+		/* Disable i2c on HDMI pins */
+		gpio_config_pin(MODULE_I2C,
+				GPIO_EC_I2C_SUB_C1_SDA_HDMI_HPD_ODL, 0);
+		gpio_config_pin(MODULE_I2C,
+				GPIO_EC_I2C_SUB_C1_SCL_HDMI_EN_ODL, 0);
+
+		/* Set HDMI and sub-rail enables to output */
+		gpio_set_flags(GPIO_EC_I2C_SUB_C1_SCL_HDMI_EN_ODL,
+			       chipset_in_state(CHIPSET_STATE_ON) ?
+						GPIO_ODR_LOW : GPIO_ODR_HIGH);
+		gpio_set_flags(GPIO_SUB_C1_INT_EN_RAILS_ODL,   GPIO_ODR_HIGH);
+
+		/* Select HDMI option */
+		gpio_set_level(GPIO_HDMI_SEL_L, 0);
+
+		/* Enable interrupt for passing through HPD */
+		gpio_enable_interrupt(GPIO_EC_I2C_SUB_C1_SDA_HDMI_HPD_ODL);
+	} else {
+		/* Set SDA as an input */
+		gpio_set_flags(GPIO_EC_I2C_SUB_C1_SDA_HDMI_HPD_ODL,
+			       GPIO_INPUT);
+
+		/* Enable C1 interrupts */
+		gpio_enable_interrupt(GPIO_SUB_C1_INT_EN_RAILS_ODL);
+	}
+	/* Enable gpio interrupt for base accelgyro sensor */
+	gpio_enable_interrupt(GPIO_BASE_SIXAXIS_INT_L);
+
+	/* Turn on 5V if the system is on, otherwise turn it off. */
+	on = chipset_in_state(CHIPSET_STATE_ON | CHIPSET_STATE_ANY_SUSPEND |
+			      CHIPSET_STATE_SOFT_OFF);
+	board_power_5v_enable(on);
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+/* Enable HDMI any time the SoC is on */
+static void hdmi_enable(void)
+{
+	if (get_cbi_fw_config_db() == DB_1A_HDMI)
+		gpio_set_level(GPIO_EC_I2C_SUB_C1_SCL_HDMI_EN_ODL, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_STARTUP, hdmi_enable, HOOK_PRIO_DEFAULT);
+
+static void hdmi_disable(void)
+{
+	if (get_cbi_fw_config_db() == DB_1A_HDMI)
+		gpio_set_level(GPIO_EC_I2C_SUB_C1_SCL_HDMI_EN_ODL, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, hdmi_disable, HOOK_PRIO_DEFAULT);
+
+void board_hibernate(void)
+{
+	/*
+	 * Both charger ICs need to be put into their "low power mode" before
+	 * entering the Z-state.
+	 */
+	if (board_get_charger_chip_count() > 1)
+		raa489000_hibernate(1);
+	raa489000_hibernate(0);
+}
+
+void board_reset_pd_mcu(void)
+{
+	/*
+	 * TODO(b:147316511): Here we could issue a digital reset to the IC,
+	 * unsure if we actually want to do that or not yet.
+	 */
+}
+
+static void reconfigure_5v_gpio(void)
+{
+	/*
+	 * b/147257497: On early boards, GPIO_EN_PP5000 was swapped with
+	 * GPIO_VOLUP_BTN_ODL. Therefore, we'll actually need to set that GPIO
+	 * instead for those boards.  Note that this breaks the volume up button
+	 * functionality.
+	 */
+	if (system_get_board_version() < 0) {
+		CPRINTS("old board - remapping 5V en");
+		gpio_set_flags(GPIO_VOLUP_BTN_ODL, GPIO_OUT_LOW);
+	}
+}
+DECLARE_HOOK(HOOK_INIT, reconfigure_5v_gpio, HOOK_PRIO_INIT_I2C+1);
+
+static void set_5v_gpio(int level)
+{
+	int version;
+	enum gpio_signal gpio;
+
+	/*
+	 * b/147257497: On early boards, GPIO_EN_PP5000 was swapped with
+	 * GPIO_VOLUP_BTN_ODL. Therefore, we'll actually need to set that GPIO
+	 * instead for those boards.  Note that this breaks the volume up button
+	 * functionality.
+	 */
+	version = system_get_board_version();
+
+	/*
+	 * If the CBI EEPROM wasn't formatted, assume it's a very early board.
+	 */
+	gpio = version < 0 ? GPIO_VOLUP_BTN_ODL : GPIO_EN_PP5000;
+
+	gpio_set_level(gpio, level);
+}
+
+__override void board_power_5v_enable(int enable)
+{
+	/*
+	 * Port 0 simply has a GPIO to turn on the 5V regulator, however, 5V is
+	 * generated locally on the sub board and we need to set the comparator
+	 * polarity on the sub board charger IC, or send enable signal to HDMI
+	 * DB.
+	 */
+	set_5v_gpio(!!enable);
+
+	if (get_cbi_fw_config_db() == DB_1A_HDMI) {
+		gpio_set_level(GPIO_SUB_C1_INT_EN_RAILS_ODL, !enable);
+	} else {
+		if (isl923x_set_comparator_inversion(1, !!enable))
+			CPRINTS("Failed to %sable sub rails!", enable ?
+								"en" : "dis");
+	}
+
+}
+
+__override uint8_t board_get_usb_pd_port_count(void)
+{
+	if (get_cbi_fw_config_db() == DB_1A_HDMI)
+		return CONFIG_USB_PD_PORT_MAX_COUNT - 1;
+	else
+		return CONFIG_USB_PD_PORT_MAX_COUNT;
+}
+
+__override uint8_t board_get_charger_chip_count(void)
+{
+	if (get_cbi_fw_config_db() == DB_1A_HDMI)
+		return CHARGER_NUM - 1;
+	else
+		return CHARGER_NUM;
+}
+
+int board_is_sourcing_vbus(int port)
+{
+	int regval;
+
+	tcpc_read(port, TCPC_REG_POWER_STATUS, &regval);
+	return !!(regval & TCPC_REG_POWER_STATUS_SOURCING_VBUS);
+
+}
+
+int board_set_active_charge_port(int port)
+{
+	int is_real_port = (port >= 0 &&
+			    port < board_get_usb_pd_port_count());
+	int i;
+	int old_port;
+
+	if (!is_real_port && port != CHARGE_PORT_NONE)
+		return EC_ERROR_INVAL;
+
+	old_port = charge_manager_get_active_charge_port();
+
+	CPRINTS("New chg p%d", port);
+
+	/* Disable all ports. */
+	if (port == CHARGE_PORT_NONE) {
+		for (i = 0; i < board_get_usb_pd_port_count(); i++)
+			tcpc_write(i, TCPC_REG_COMMAND,
+				   TCPC_REG_COMMAND_SNK_CTRL_LOW);
+
+		return EC_SUCCESS;
+	}
+
+	/* Check if port is sourcing VBUS. */
+	if (board_is_sourcing_vbus(port)) {
+		CPRINTS("Skip enable p%d", port);
+		return EC_ERROR_INVAL;
+	}
+
+	/*
+	 * Turn off the other ports' sink path FETs, before enabling the
+	 * requested charge port.
+	 */
+	for (i = 0; i < board_get_usb_pd_port_count(); i++) {
+		if (i == port)
+			continue;
+
+		if (tcpc_write(i, TCPC_REG_COMMAND,
+			       TCPC_REG_COMMAND_SNK_CTRL_LOW))
+			CPRINTS("p%d: sink path disable failed.", i);
+	}
+
+	/*
+	 * Stop the charger IC from switching while changing ports.  Otherwise,
+	 * we can overcurrent the adapter we're switching to. (crbug.com/926056)
+	 */
+	if (old_port != CHARGE_PORT_NONE)
+		charger_discharge_on_ac(1);
+
+	/* Enable requested charge port. */
+	if (tcpc_write(port, TCPC_REG_COMMAND,
+		       TCPC_REG_COMMAND_SNK_CTRL_HIGH)) {
+		CPRINTS("p%d: sink path enable failed.", port);
+		charger_discharge_on_ac(0);
+		return EC_ERROR_UNKNOWN;
+	}
+
+	/* Allow the charger IC to begin/continue switching. */
+	charger_discharge_on_ac(0);
+
+	return EC_SUCCESS;
+}
+
+void board_set_charge_limit(int port, int supplier, int charge_ma,
+			    int max_ma, int charge_mv)
+{
+	int icl = MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT);
+
+	/*
+	 * TODO(b:147463641): Characterize the input current limit in case that
+	 * a scaling needs to be applied here.
+	 */
+	charge_set_input_current_limit(icl, charge_mv);
+}
+
+/* Sensors */
+static struct mutex g_lid_mutex;
+static struct mutex g_base_mutex;
+
+/* Matrices to rotate accelerometers into the standard reference. */
+static const mat33_fp_t lid_standard_ref = {
+	{ 0, FLOAT_TO_FP(1), 0},
+	{ FLOAT_TO_FP(-1), 0, 0},
+	{ 0, 0, FLOAT_TO_FP(1)}
+};
+
+static const mat33_fp_t base_standard_ref = {
+	{ 0, FLOAT_TO_FP(1), 0},
+	{ FLOAT_TO_FP(-1), 0, 0},
+	{ 0, 0, FLOAT_TO_FP(1)}
+};
+
+static struct accelgyro_saved_data_t g_bma253_data;
+static struct bmi_drv_data_t g_bmi160_data;
+
+struct motion_sensor_t motion_sensors[] = {
+	[LID_ACCEL] = {
+		.name = "Lid Accel",
+		.active_mask = SENSOR_ACTIVE_S0_S3,
+		.chip = MOTIONSENSE_CHIP_BMA255,
+		.type = MOTIONSENSE_TYPE_ACCEL,
+		.location = MOTIONSENSE_LOC_LID,
+		.drv = &bma2x2_accel_drv,
+		.mutex = &g_lid_mutex,
+		.drv_data = &g_bma253_data,
+		.port = I2C_PORT_SENSOR,
+		.i2c_spi_addr_flags = BMA2x2_I2C_ADDR1_FLAGS,
+		.rot_standard_ref = &lid_standard_ref,
+		.default_range = 2,
+		.min_frequency = BMA255_ACCEL_MIN_FREQ,
+		.max_frequency = BMA255_ACCEL_MAX_FREQ,
+		.config = {
+			[SENSOR_CONFIG_EC_S0] = {
+				.odr = 10000 | ROUND_UP_FLAG,
+			},
+			[SENSOR_CONFIG_EC_S3] = {
+				.odr = 10000 | ROUND_UP_FLAG,
+			},
+		},
+	},
+	[BASE_ACCEL] = {
+		.name = "Base Accel",
+		.active_mask = SENSOR_ACTIVE_S0_S3,
+		.chip = MOTIONSENSE_CHIP_BMI160,
+		.type = MOTIONSENSE_TYPE_ACCEL,
+		.location = MOTIONSENSE_LOC_BASE,
+		.drv = &bmi160_drv,
+		.mutex = &g_base_mutex,
+		.drv_data = &g_bmi160_data,
+		.port = I2C_PORT_SENSOR,
+		.i2c_spi_addr_flags = BMI160_ADDR0_FLAGS,
+		.rot_standard_ref = &base_standard_ref,
+		.default_range = 4,
+		.min_frequency = BMI_ACCEL_MIN_FREQ,
+		.max_frequency = BMI_ACCEL_MAX_FREQ,
+		.config = {
+			[SENSOR_CONFIG_EC_S0] = {
+				.odr = 13000 | ROUND_UP_FLAG,
+				.ec_rate = 100 * MSEC,
+			},
+			[SENSOR_CONFIG_EC_S3] = {
+				.odr = 10000 | ROUND_UP_FLAG,
+				.ec_rate = 100 * MSEC,
+			},
+		},
+	},
+	[BASE_GYRO] = {
+		.name = "Base Gyro",
+		.active_mask = SENSOR_ACTIVE_S0_S3,
+		.chip = MOTIONSENSE_CHIP_BMI160,
+		.type = MOTIONSENSE_TYPE_GYRO,
+		.location = MOTIONSENSE_LOC_BASE,
+		.drv = &bmi160_drv,
+		.mutex = &g_base_mutex,
+		.drv_data = &g_bmi160_data,
+		.port = I2C_PORT_SENSOR,
+		.i2c_spi_addr_flags = BMI160_ADDR0_FLAGS,
+		.default_range = 1000, /* dps */
+		.rot_standard_ref = &base_standard_ref,
+		.min_frequency = BMI_GYRO_MIN_FREQ,
+		.max_frequency = BMI_GYRO_MAX_FREQ,
+	},
+};
+
+const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
+
+__override void ocpc_get_pid_constants(int *kp, int *kp_div,
+				       int *ki, int *ki_div,
+				       int *kd, int *kd_div)
+{
+	/*
+	 * Early boards need different constants due to a change in charger IC
+	 * silicon revision.
+	 */
+	if (system_get_board_version() >= 0) {
+		*kp = 1;
+		*kp_div = 128;
+		*ki = 1;
+		*ki_div = 1024;
+		*kd = 0;
+		*kd_div = 1;
+	} else {
+		*kp = 1;
+		*kp_div = 4;
+		*ki = 1;
+		*ki_div = 15;
+		*kd = 1;
+		*kd_div = 10;
+	}
+}
+
+int pd_snk_is_vbus_provided(int port)
+{
+	return pd_check_vbus_level(port, VBUS_PRESENT);
+}
+
+const struct charger_config_t chg_chips[] = {
+	{
+		.i2c_port = I2C_PORT_USB_C0,
+		.i2c_addr_flags = ISL923X_ADDR_FLAGS,
+		.drv = &isl923x_drv,
+	},
+
+	{
+		.i2c_port = I2C_PORT_SUB_USB_C1,
+		.i2c_addr_flags = ISL923X_ADDR_FLAGS,
+		.drv = &isl923x_drv,
+	},
+};
+
+const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
+	{
+		.i2c_port = I2C_PORT_USB_C0,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+		.flags = PI3USB9201_ALWAYS_POWERED,
+	},
+
+	{
+		.i2c_port = I2C_PORT_SUB_USB_C1,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+		.flags = PI3USB9201_ALWAYS_POWERED,
+	},
+};
+
+/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
+const struct pwm_t pwm_channels[] = {
+	[PWM_CH_KBLIGHT] = {
+		.channel = 3,
+		.flags = PWM_CONFIG_DSLEEP,
+		.freq = 10000,
+	},
+
+	[PWM_CH_LED1_AMBER] = {
+		.channel = 2,
+		.flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW,
+		.freq = 2400,
+	},
+
+	[PWM_CH_LED2_WHITE] = {
+		.channel = 0,
+		.flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW,
+		.freq = 2400,
+	}
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	{
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_USB_C0,
+			.addr_flags = RAA489000_TCPC0_I2C_FLAGS,
+		},
+		.flags = TCPC_FLAGS_TCPCI_REV2_0,
+		.drv = &raa489000_tcpm_drv,
+	},
+
+	{
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_SUB_USB_C1,
+			.addr_flags = RAA489000_TCPC0_I2C_FLAGS,
+		},
+		.flags = TCPC_FLAGS_TCPCI_REV2_0,
+		.drv = &raa489000_tcpm_drv,
+	},
+};
+
+const struct usb_mux usbc1_retimer = {
+	.usb_port = 1,
+	.i2c_port = I2C_PORT_SUB_USB_C1,
+	.i2c_addr_flags = NB7V904M_I2C_ADDR0,
+	.driver = &nb7v904m_usb_redriver_drv,
+};
+const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	{
+		.usb_port = 0,
+		.i2c_port = I2C_PORT_USB_C0,
+		.i2c_addr_flags = PI3USB3X532_I2C_ADDR0,
+		.driver = &pi3usb3x532_usb_mux_driver,
+	},
+	{
+		.usb_port = 1,
+		.i2c_port = I2C_PORT_SUB_USB_C1,
+		.i2c_addr_flags = PI3USB3X532_I2C_ADDR0,
+		.driver = &pi3usb3x532_usb_mux_driver,
+		.next_mux = &usbc1_retimer,
+	}
+};
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+	int regval;
+
+	/*
+	 * The interrupt line is shared between the TCPC and BC1.2 detector IC.
+	 * Therefore, go out and actually read the alert registers to report the
+	 * alert status.
+	 */
+	if (!gpio_get_level(GPIO_USB_C0_INT_ODL)) {
+		if (!tcpc_read16(0, TCPC_REG_ALERT, &regval)) {
+			/* The TCPCI Rev 1.0 spec says to ignore bits 14:12. */
+			if (!(tcpc_config[0].flags & TCPC_FLAGS_TCPCI_REV2_0))
+				regval &= ~((1 << 14) | (1 << 13) | (1 << 12));
+
+			if (regval)
+				status |= PD_STATUS_TCPC_ALERT_0;
+		}
+	}
+
+	if (board_get_usb_pd_port_count() > 1 &&
+				!gpio_get_level(GPIO_SUB_C1_INT_EN_RAILS_ODL)) {
+		if (!tcpc_read16(1, TCPC_REG_ALERT, &regval)) {
+			/* TCPCI spec Rev 1.0 says to ignore bits 14:12. */
+			if (!(tcpc_config[1].flags & TCPC_FLAGS_TCPCI_REV2_0))
+				regval &= ~((1 << 14) | (1 << 13) | (1 << 12));
+
+			if (regval)
+				status |= PD_STATUS_TCPC_ALERT_1;
+		}
+	}
+
+	return status;
+}
+
+#ifndef TEST_BUILD
+/* This callback disables keyboard when convertibles are fully open */
+void lid_angle_peripheral_enable(int enable)
+{
+	int chipset_in_s0 = chipset_in_state(CHIPSET_STATE_ON);
+
+	/*
+	 * If the lid is in tablet position via other sensors,
+	 * ignore the lid angle, which might be faulty then
+	 * disable keyboard.
+	 */
+	if (tablet_get_mode())
+		enable = 0;
+
+	if (enable) {
+		keyboard_scan_enable(1, KB_SCAN_DISABLE_LID_ANGLE);
+	} else {
+		/*
+		 * Ensure that the chipset is off before disabling the keyboard.
+		 * When the chipset is on, the EC keeps the keyboard enabled and
+		 * the AP decides whether to ignore input devices or not.
+		 */
+		if (!chipset_in_s0)
+			keyboard_scan_enable(0, KB_SCAN_DISABLE_LID_ANGLE);
+	}
+}
+#endif
diff --git a/board/metaknight/board.h b/board/metaknight/board.h
new file mode 100644
index 0000000000..3f788e0392
--- /dev/null
+++ b/board/metaknight/board.h
@@ -0,0 +1,173 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Waddledoo board configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+#define VARIANT_DEDEDE_EC_NPCX796FC
+#include "baseboard.h"
+
+/*
+ * Keep the system unlocked in early development.
+ * TODO(b/151264302): Make sure to remove this before production!
+ */
+#define CONFIG_SYSTEM_UNLOCKED
+
+/* Battery */
+#define CONFIG_BATTERY_FUEL_GAUGE
+
+/* Charger */
+#define CONFIG_CHARGER_RAA489000
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
+#define CONFIG_CHARGER_SENSE_RESISTOR 10
+#define CONFIG_OCPC_DEF_RBATT_MOHMS 22 /* R_DS(on) 11.6mOhm + 10mOhm sns rstr */
+#define CONFIG_OCPC
+#undef  CONFIG_CHARGER_SINGLE_CHIP
+
+/* EC console commands */
+#define CONFIG_CMD_TCPC_DUMP
+#define CONFIG_CMD_CHARGER_DUMP
+
+/*
+ * GPIO for C1 interrupts, for baseboard use
+ *
+ * Note this line might already have its pull up disabled for HDMI DBs, but
+ * it should be fine to set again before z-state.
+ */
+#define GPIO_USB_C1_INT_ODL GPIO_SUB_C1_INT_EN_RAILS_ODL
+
+/* Keyboard */
+#define CONFIG_PWM_KBLIGHT
+
+/* LED */
+#define CONFIG_LED_PWM
+#define CONFIG_LED_PWM_COUNT 1
+#undef CONFIG_LED_PWM_NEAR_FULL_COLOR
+#undef CONFIG_LED_PWM_SOC_ON_COLOR
+#undef CONFIG_LED_PWM_SOC_SUSPEND_COLOR
+#undef CONFIG_LED_PWM_LOW_BATT_COLOR
+#define CONFIG_LED_PWM_NEAR_FULL_COLOR EC_LED_COLOR_WHITE
+#define CONFIG_LED_PWM_SOC_ON_COLOR EC_LED_COLOR_WHITE
+#define CONFIG_LED_PWM_SOC_SUSPEND_COLOR EC_LED_COLOR_WHITE
+#define CONFIG_LED_PWM_LOW_BATT_COLOR EC_LED_COLOR_AMBER
+
+/* PWM */
+#define CONFIG_PWM
+#define NPCX7_PWM1_SEL    1  /* GPIO C2 is used as PWM1. */
+
+/* USB */
+#define CONFIG_BC12_DETECT_PI3USB9201
+#define CONFIG_USBC_RETIMER_NB7V904M
+
+/* USB PD */
+#define CONFIG_USB_PD_PORT_MAX_COUNT 2
+#define CONFIG_USB_PD_TCPM_RAA489000
+
+/* USB defines specific to external TCPCs */
+#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+#define CONFIG_USB_PD_VBUS_DETECT_TCPC
+#define CONFIG_USB_PD_DISCHARGE_TCPC
+#define CONFIG_USB_PD_TCPC_LOW_POWER
+
+/* Variant references the TCPCs to determine Vbus sourcing */
+#define CONFIG_USB_PD_5V_EN_CUSTOM
+
+/* I2C configuration */
+#define I2C_PORT_EEPROM     NPCX_I2C_PORT7_0
+#define I2C_PORT_BATTERY    NPCX_I2C_PORT5_0
+#define I2C_PORT_SENSOR     NPCX_I2C_PORT0_0
+#define I2C_PORT_USB_C0     NPCX_I2C_PORT1_0
+#define I2C_PORT_SUB_USB_C1 NPCX_I2C_PORT2_0
+#define I2C_PORT_USB_MUX    I2C_PORT_USB_C0
+/* TODO(b:147440290): Need to handle multiple charger ICs */
+#define I2C_PORT_CHARGER    I2C_PORT_USB_C0
+
+#define I2C_PORT_ACCEL      I2C_PORT_SENSOR
+
+#define I2C_ADDR_EEPROM_FLAGS 0x50 /* 7b address */
+
+/*
+ * I2C pin names for baseboard
+ *
+ * Note: these lines will be set as i2c on start-up, but this should be
+ * okay since they're ODL.
+ */
+#define GPIO_EC_I2C_SUB_USB_C1_SCL GPIO_EC_I2C_SUB_C1_SCL_HDMI_EN_ODL
+#define GPIO_EC_I2C_SUB_USB_C1_SDA GPIO_EC_I2C_SUB_C1_SDA_HDMI_HPD_ODL
+
+/* Sensors */
+#define CONFIG_CMD_ACCELS
+#define CONFIG_CMD_ACCEL_INFO
+
+#define CONFIG_ACCEL_BMA255		/* Lid accel */
+#define CONFIG_ACCELGYRO_BMI160		/* Base accel */
+
+/* Lid operates in forced mode, base in FIFO */
+#define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ACCEL)
+#define CONFIG_ACCEL_FIFO
+#define CONFIG_ACCEL_FIFO_SIZE 256	/* Must be a power of 2 */
+#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3)
+
+#define CONFIG_ACCEL_INTERRUPTS
+#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \
+	TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL)
+
+#define CONFIG_LID_ANGLE
+#define CONFIG_LID_ANGLE_UPDATE
+#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL
+#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL
+
+#define CONFIG_TABLET_MODE
+#define CONFIG_TABLET_MODE_SWITCH
+#define CONFIG_GMR_TABLET_MODE
+
+#define CONFIG_MKBP_EVENT
+#define CONFIG_MKBP_USE_GPIO
+
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+#include "registers.h"
+
+enum chg_id {
+	CHARGER_PRIMARY,
+	CHARGER_SECONDARY,
+	CHARGER_NUM,
+};
+
+enum adc_channel {
+	ADC_TEMP_SENSOR_1,     /* ADC0 */
+	ADC_TEMP_SENSOR_2,     /* ADC1 */
+	ADC_SUB_ANALOG,	       /* ADC2 */
+	ADC_VSNS_PP3300_A,     /* ADC9 */
+	ADC_CH_COUNT
+};
+
+enum sensor_id {
+	LID_ACCEL,
+	BASE_ACCEL,
+	BASE_GYRO,
+	SENSOR_COUNT
+};
+
+enum pwm_channel {
+	PWM_CH_KBLIGHT,
+	PWM_CH_LED1_AMBER,
+	PWM_CH_LED2_WHITE,
+	PWM_CH_COUNT,
+};
+
+/* List of possible batteries */
+enum battery_type {
+	BATTERY_POWER_TECH,
+	BATTERY_TYPE_COUNT,
+};
+
+int board_is_sourcing_vbus(int port);
+
+#endif /* !__ASSEMBLER__ */
+#endif /* __CROS_EC_BOARD_H */
diff --git a/board/metaknight/build.mk b/board/metaknight/build.mk
new file mode 100644
index 0000000000..3cbadc55d7
--- /dev/null
+++ b/board/metaknight/build.mk
@@ -0,0 +1,14 @@
+# -*- makefile -*-
+# Copyright 2020 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+CHIP:=npcx
+CHIP_FAMILY:=npcx7
+CHIP_VARIANT:=npcx7m6fc
+BASEBOARD:=dedede
+
+board-y=board.o battery.o led.o usb_pd_policy.o
diff --git a/board/metaknight/ec.tasklist b/board/metaknight/ec.tasklist
new file mode 100644
index 0000000000..0aba1fabeb
--- /dev/null
+++ b/board/metaknight/ec.tasklist
@@ -0,0 +1,25 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * See CONFIG_TASK_LIST in config.h for details.
+ */
+
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(POWERBTN, power_button_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C0, pd_task, NULL, ULTRA_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C1, pd_task, NULL, ULTRA_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, ULTRA_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, ULTRA_TASK_STACK_SIZE)
diff --git a/board/metaknight/gpio.inc b/board/metaknight/gpio.inc
new file mode 100644
index 0000000000..e6bc32af1e
--- /dev/null
+++ b/board/metaknight/gpio.inc
@@ -0,0 +1,139 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * Declare symbolic names for all the GPIOs that we care about.
+ * Note: Those with interrupt handlers must be declared first.
+ */
+
+/* Power Interrupts */
+GPIO_INT(SLP_S0_L,		 PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_S3_L,		 PIN(A, 5), GPIO_INT_BOTH, baseboard_all_sys_pgood_interrupt)
+GPIO_INT(SLP_S4_L,		 PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_SUS_L,		 PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(RSMRST_PWRGD_L,	 PIN(C, 6), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(VCCIN_AUX_VID1,	 PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(CPU_C10_GATE_L,	 PIN(6, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(VCCIN_AUX_VID0,	 PIN(F, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt)
+GPIO_INT(PG_VCCIO_EXT_OD,	 PIN(B, 0), GPIO_INT_BOTH, baseboard_all_sys_pgood_interrupt)
+GPIO_INT(PG_PP5000_U_OD,	 PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_DRAM_OD,		 PIN(E, 4), GPIO_INT_BOTH, baseboard_all_sys_pgood_interrupt)
+GPIO_INT(PG_PP1050_ST_OD,	 PIN(4, 2), GPIO_INT_BOTH, power_signal_interrupt)
+
+/* USB-C interrupts */
+GPIO_INT(USB_C0_INT_ODL,	 		PIN(6, 2), GPIO_INT_FALLING | GPIO_PULL_UP, usb_c0_interrupt)
+GPIO_INT(SUB_C1_INT_EN_RAILS_ODL,		PIN(F, 5), GPIO_INT_FALLING | GPIO_PULL_UP, sub_usb_c1_interrupt) /* C1 interrupt OR 5V power en */
+GPIO_INT(EC_I2C_SUB_C1_SDA_HDMI_HPD_ODL,	PIN(9, 1), GPIO_INT_BOTH, sub_hdmi_hpd_interrupt) /* C1 I2C SDA OR HDMI_HPD */
+
+/* Button interrupts */
+GPIO_INT(H1_EC_PWR_BTN_ODL,	 PIN(0, 1), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt)
+GPIO_INT(VOLDN_BTN_ODL,		 PIN(4, 0), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
+GPIO_INT(VOLUP_BTN_ODL,		 PIN(7, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
+
+/* Other interrupts */
+GPIO_INT(LID_OPEN,		 PIN(D, 2), GPIO_INT_BOTH, lid_interrupt)
+GPIO_INT(EC_WP_OD,		 PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
+GPIO_INT(BASE_SIXAXIS_INT_L,	 PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi160_interrupt)
+GPIO_INT(LID_360_L,		 PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr)
+
+/* I2C Ports */
+GPIO(EC_I2C_EEPROM_SCL,			PIN(B, 3), GPIO_INPUT)
+GPIO(EC_I2C_EEPROM_SDA,			PIN(B, 2), GPIO_INPUT)
+GPIO(EC_I2C_BATTERY_SCL,		PIN(3, 3), GPIO_INPUT)
+GPIO(EC_I2C_BATTERY_SDA,		PIN(3, 6), GPIO_INPUT)
+GPIO(EC_I2C_SENSOR_SCL,			PIN(B, 5), GPIO_INPUT)
+GPIO(EC_I2C_SENSOR_SDA,			PIN(B, 4), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_SCL,			PIN(9, 0), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_SDA,			PIN(8, 7), GPIO_INPUT)
+GPIO(EC_I2C_SUB_C1_SCL_HDMI_EN_ODL,	PIN(9, 2), GPIO_INPUT) /* C1 I2C SCL OR HDMI en */
+
+/* Extra Sub-board I/O pins */
+GPIO(EC_SUB_IO_1,  PIN(3, 7), GPIO_OUT_LOW)
+GPIO(EC_SUB_IO_2,  PIN(3, 4), GPIO_OUT_LOW)
+
+/* Misc Enables */
+GPIO(EN_VCCIO_EXT,   PIN(6, 1), GPIO_OUT_LOW)
+/* TODO(b:149775160) - Modify if needed if we ever use this signal. */
+GPIO(EN_VCCST,		PIN(A, 7), GPIO_INPUT)
+GPIO(EN_PP3300_PEN,	PIN(6, 3), GPIO_OUT_LOW)
+GPIO(EN_PP3300_A,	PIN(0, 3), GPIO_OUT_LOW)
+GPIO(EN_PP5000_U,	PIN(A, 4), GPIO_OUT_LOW)
+GPIO(EN_SLP_Z,		PIN(8, 3), GPIO_OUT_LOW)
+GPIO(EN_KB_BL,		PIN(6, 0), GPIO_OUT_LOW)
+GPIO(EN_BL_OD,		PIN(D, 3), GPIO_ODR_LOW)
+GPIO(IMVP9_PE,		PIN(E, 0), GPIO_OUT_LOW)
+GPIO(ECH1_PACKET_MODE,	PIN(7, 5), GPIO_OUT_LOW)
+
+/* Power Sequencing */
+GPIO(EC_AP_PSYS,	     PIN(B, 7), GPIO_OUT_LOW)
+GPIO(EC_AP_RSMRST_L,         PIN(A, 6), GPIO_OUT_LOW)
+GPIO(EC_AP_PWR_BTN_ODL,      PIN(C, 1), GPIO_ODR_HIGH)
+GPIO(EC_AP_RTCRST,           PIN(7, 6), GPIO_OUT_LOW)
+GPIO(EC_AP_WAKE_ODL,         PIN(7, 4), GPIO_ODR_HIGH)
+GPIO(EC_AP_DPWROK,	     PIN(A, 3), GPIO_OUT_LOW)
+GPIO(EC_AP_PCH_PWROK_OD,     PIN(9, 4), GPIO_ODR_LOW)
+GPIO(EC_AP_VCCST_PWRGD_OD,   PIN(B, 1), GPIO_ODR_LOW)
+GPIO(EC_AP_SYS_PWROK,	     PIN(0, 2), GPIO_OUT_LOW)
+GPIO(EC_AP_MKBP_INT_L,	     PIN(7, 0), GPIO_ODR_HIGH)
+GPIO(EC_PROCHOT_ODL,	     PIN(F, 1), GPIO_ODR_HIGH | GPIO_SEL_1P8V)
+GPIO(EC_ENTERING_RW,	     PIN(E, 3), GPIO_OUT_LOW)
+GPIO(ALL_SYS_PWRGD,	     PIN(A, 0), GPIO_OUT_LOW)
+GPIO(SYS_RST_ODL,	     PIN(C, 5), GPIO_ODR_HIGH)
+GPIO(CCD_MODE_ODL,	     PIN(E, 5), GPIO_INPUT)
+
+GPIO(USB_C0_RST_ODL,	     PIN(9, 7), GPIO_OUT_HIGH) /* currently unused */
+GPIO(EC_AP_USB_C1_HDMI_HPD,  PIN(9, 6), GPIO_OUT_LOW)
+GPIO(EC_AP_USB_C0_HPD,	     PIN(9, 3), GPIO_OUT_LOW)
+GPIO(HDMI_SEL_L,	     PIN(7, 2), GPIO_OUT_HIGH)
+GPIO(EC_BATTERY_PRES_ODL,    PIN(E, 1), GPIO_INPUT)
+
+/*
+ * Waddledoo doesn't have these physical pins coming to the EC but uses other
+ * logic.
+ */
+UNIMPLEMENTED(AC_PRESENT)
+UNIMPLEMENTED(PG_EC_DSW_PWROK)
+UNIMPLEMENTED(PG_EC_ALL_SYS_PWRGD)
+
+/* Alternate Functions */
+/* ADC */
+ALTERNATE(PIN_MASK(F, BIT(0)), 0, MODULE_ADC, 0) /* ADC9 */
+ALTERNATE(PIN_MASK(4, 0x38), 0, MODULE_ADC, 0)   /* ADC0-2 */
+
+/* Keyboard */
+ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_INPUT | GPIO_PULL_UP) /* KSI0, KSI1 */
+ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_INPUT | GPIO_PULL_UP) /* KSI2-7 */
+ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH)		 /* KSO0, KSO1 */
+ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH)		 /* KSO3-9 */
+ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH)		 /* KSO10-13 */
+ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH)		 /* KSO14 */
+GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW)	/* KSO2 inverted */
+
+/* PWM */
+ALTERNATE(PIN_MASK(C, 0x1C), 0, MODULE_PWM, 0)   /* PWM0-2 */
+ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* PWM3 */
+
+/* UART */
+ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0)  /* UART1 */
+
+/* I2C */
+ALTERNATE(PIN_MASK(B, 0x3C), 0, MODULE_I2C, 0)   /* I2C7,I2C0 */
+ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, 0)   /* I2C5 */
+ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0)   /* I2C2, I2C1 SCL */
+ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0)   /* I2C1 SDA */
+
+/* NC pins, enable internal pull-up to avoid floating state. */
+GPIO(GPIO32_NC, PIN(3, 2), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIO35_NC, PIN(3, 5), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIO41_NC, PIN(4, 1), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIO57_NC, PIN(5, 7), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIO81_NC, PIN(8, 1), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIO86_NC, PIN(8, 6), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIOC0_NC, PIN(C, 0), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIOD0_NC, PIN(D, 0), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIOD1_NC, PIN(D, 1), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(GPIOD6_NC, PIN(D, 6), GPIO_INPUT | GPIO_PULL_UP)
diff --git a/board/metaknight/led.c b/board/metaknight/led.c
new file mode 100644
index 0000000000..ca9a05bd84
--- /dev/null
+++ b/board/metaknight/led.c
@@ -0,0 +1,70 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Waddledoo specific PWM LED settings. */
+
+#include "common.h"
+#include "ec_commands.h"
+#include "led_pwm.h"
+#include "pwm.h"
+#include "util.h"
+
+const enum ec_led_id supported_led_ids[] = {
+	EC_LED_ID_POWER_LED,
+};
+const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
+/*
+ * We only have a white and an amber LED, so setting any other colour results in
+ * both LEDs being off.
+ */
+struct pwm_led led_color_map[EC_LED_COLOR_COUNT] = {
+				/* Amber, White */
+	[EC_LED_COLOR_RED]    = {   0,   0 },
+	[EC_LED_COLOR_GREEN]  = {   0,   0 },
+	[EC_LED_COLOR_BLUE]   = {   0,   0 },
+	[EC_LED_COLOR_YELLOW] = {   0,   0 },
+	[EC_LED_COLOR_WHITE]  = {   0, 100 },
+	[EC_LED_COLOR_AMBER]  = {  100,  0 },
+};
+
+/* One logical LED with amber and white channels. */
+struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = {
+	{
+		.ch0 = PWM_CH_LED1_AMBER,
+		.ch1 = PWM_CH_LED2_WHITE,
+		.ch2 = PWM_LED_NO_CHANNEL,
+		.enable = &pwm_enable,
+		.set_duty = &pwm_set_duty,
+	},
+};
+
+void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
+{
+	memset(brightness_range, '\0',
+	       sizeof(*brightness_range) * EC_LED_COLOR_COUNT);
+	brightness_range[EC_LED_COLOR_AMBER] = 100;
+	brightness_range[EC_LED_COLOR_WHITE] = 100;
+}
+
+int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
+{
+	enum pwm_led_id pwm_id;
+
+	/* Convert ec_led_id to pwm_led_id. */
+	if (led_id == EC_LED_ID_POWER_LED)
+		pwm_id = PWM_LED0;
+	else
+		return EC_ERROR_UNKNOWN;
+
+	if (brightness[EC_LED_COLOR_WHITE])
+		set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE);
+	else if (brightness[EC_LED_COLOR_AMBER])
+		set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER);
+	else
+		/* Otherwise, the "color" is "off". */
+		set_pwm_led_color(pwm_id, -1);
+
+	return EC_SUCCESS;
+}
diff --git a/board/metaknight/usb_pd_policy.c b/board/metaknight/usb_pd_policy.c
new file mode 100644
index 0000000000..905e049937
--- /dev/null
+++ b/board/metaknight/usb_pd_policy.c
@@ -0,0 +1,66 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "charge_manager.h"
+#include "chipset.h"
+#include "common.h"
+#include "console.h"
+#include "driver/tcpm/tcpci.h"
+#include "usb_pd.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+int pd_check_vconn_swap(int port)
+{
+	/* Allow VCONN swaps if the AP is on. */
+	return chipset_in_state(CHIPSET_STATE_ANY_SUSPEND | CHIPSET_STATE_ON);
+}
+
+void pd_power_supply_reset(int port)
+{
+	/* Disable VBUS */
+	tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_SRC_CTRL_LOW);
+
+#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
+	/* Give back the current quota we are no longer using */
+	charge_manager_source_port(port, 0);
+#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
+
+	/* Notify host of power info change. */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+int pd_set_power_supply_ready(int port)
+{
+	int rv;
+
+	if (port >= board_get_usb_pd_port_count())
+		return EC_ERROR_INVAL;
+
+	/* Disable charging. */
+	rv = tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_SNK_CTRL_LOW);
+	if (rv)
+		return rv;
+
+	/* Our policy is not to source VBUS when the AP is off. */
+	if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
+		return EC_ERROR_NOT_POWERED;
+
+	/* Provide Vbus. */
+	rv = tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_SRC_CTRL_HIGH);
+	if (rv)
+		return rv;
+
+#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
+	/* Ensure we advertise the proper available current quota */
+	charge_manager_source_port(port, 1);
+#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
+
+	/* Notify host of power info change. */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+	return EC_SUCCESS;
+}