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authorSimon Glass <sjg@chromium.org>2021-01-21 13:44:37 -0700
committerCommit Bot <commit-bot@chromium.org>2021-02-05 00:10:27 +0000
commit5c105cabf91955ab15f4cccd661335ff3dfd40d3 (patch)
treeed076114ed84de2b96fe6cf7549c612e76d3e15c
parent8e3dd199ded66b2cc96ab07c6612eb0c11535bb7 (diff)
downloadchrome-ec-5c105cabf91955ab15f4cccd661335ff3dfd40d3.tar.gz
zephyr: Support POWER_SLEEP_FAILURE_DETECTION
Add support for this feature which is used on some x86 systems. BUG=b:178099673 BRANCH=none TEST=build volteer for zephyr make BOARD=volteer -j8 Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I607a96cd79496534da08b050f2e43fd82c351e58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643619 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
-rw-r--r--zephyr/Kconfig.powerseq10
-rw-r--r--zephyr/shim/include/config_chip.h5
2 files changed, 15 insertions, 0 deletions
diff --git a/zephyr/Kconfig.powerseq b/zephyr/Kconfig.powerseq
index 1b7930f3d2..07e31a6bff 100644
--- a/zephyr/Kconfig.powerseq
+++ b/zephyr/Kconfig.powerseq
@@ -22,6 +22,16 @@ config PLATFORM_EC_POWERSEQ_HOST_SLEEP
required for S0ix support on Intel platforms, and optional
for boards without S0ix support.
+config PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION
+ bool "Detect failure to enter a sleep state (S0ix/S3)"
+ depends on PLATFORM_EC_POWERSEQ_HOST_SLEEP
+ help
+ Enables detection of the AP failing to go to sleep, perhaps due to a
+ bug in the internal SoC periodic housekeeping code.
+
+ Failure information is reported via the EC_CMD_HOST_SLEEP_EVENT host
+ command.
+
menuconfig PLATFORM_EC_POWERSEQ_INTEL
bool "Enable shimming common Intel power sequencing code"
depends on AP_X86_INTEL
diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h
index 087de67bed..d7f6dcb117 100644
--- a/zephyr/shim/include/config_chip.h
+++ b/zephyr/shim/include/config_chip.h
@@ -305,6 +305,11 @@ enum battery_type {
#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
#endif
+#undef CONFIG_POWER_SLEEP_FAILURE_DETECTION
+#ifdef CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION
+#define CONFIG_POWER_SLEEP_FAILURE_DETECTION
+#endif
+
#ifdef CONFIG_PLATFORM_EC_POWERSEQ_RSMRST_DELAY
#define CONFIG_CHIPSET_X86_RSMRST_DELAY
#endif