brya: add *gpio.inc files

This adds the initial GPIO definitions for brya.

generated-gpio.inc is extracted from the "EC Pinmux for Brya-Internal
Only" google sheets document. gpio.inc is generated manually.

Sensors not supported at this early stage, so their interrupt pins are
set up as inputs only.

BRANCH=none
BUG=b:173575131
TEST=buildall passes

Cq-Depend: chromium:2677424
Change-Id: Ie05f3cd7f4fdcf1e864d36d0c7b6ff6fb1f99d10
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654740
Reviewed-by: Furquan Shaikh <furquan@chromium.org>

2 files changed, 159 insertions, 5 deletions

diff --git a/board/brya/generated-gpio.inc b/board/brya/generated-gpio.inc
new file mode 100644
index 0000000000..db8b5cb35d
--- /dev/null
+++ b/board/brya/generated-gpio.inc
@@ -0,0 +1,137 @@
+/*
+ * This file was auto-generated.
+ */
+
+/* INTERRUPT GPIOs: */
+GPIO_INT(ACOK_EC_OD,                     PIN(0, 0), GPIO_INT_BOTH, extpower_interrupt)
+GPIO_INT(EC_PROCHOT_IN_L,                PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt)
+GPIO_INT(EC_VOLDN_BTN_ODL,               PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
+GPIO_INT(EC_VOLUP_BTN_ODL,               PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
+GPIO_INT(EC_WP_ODL,                      PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
+GPIO_INT(GSC_EC_PWR_BTN_ODL,             PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt)
+GPIO_INT(SEQ_EC_ALL_SYS_PG,              PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SEQ_EC_DSW_PWROK,               PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SEQ_EC_RSMRST_ODL,              PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_S3_L,                       PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_SUS_L,                      PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SYS_SLP_S0IX_L,                 PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(USB_C0_BC12_INT_ODL,            PIN(C, 6), GPIO_INT_BOTH, bc12_interrupt)
+GPIO_INT(USB_C0_C2_TCPC_INT_ODL,         PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event)
+GPIO_INT(USB_C0_PPC_INT_ODL,             PIN(6, 2), GPIO_INT_BOTH, ppc_interrupt)
+GPIO_INT(USB_C0_RT_INT_ODL,              PIN(B, 1), GPIO_INT_BOTH, retimer_interrupt)
+GPIO_INT(USB_C1_BC12_INT_ODL,            PIN(5, 0), GPIO_INT_BOTH, bc12_interrupt)
+GPIO_INT(USB_C1_PPC_INT_ODL,             PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt)
+GPIO_INT(USB_C1_RT_INT_ODL,              PIN(A, 0), GPIO_INT_BOTH, retimer_interrupt)
+GPIO_INT(USB_C1_TCPC_INT_ODL,            PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event)
+GPIO_INT(USB_C2_BC12_INT_ODL,            PIN(8, 3), GPIO_INT_BOTH, bc12_interrupt)
+GPIO_INT(USB_C2_PPC_INT_ODL,             PIN(7, 0), GPIO_INT_BOTH, ppc_interrupt)
+GPIO_INT(USB_C2_RT_INT_ODL,              PIN(4, 1), GPIO_INT_BOTH, retimer_interrupt)
+
+/* USED GPIOs: */
+GPIO(CCD_MODE_ODL,                   PIN(E, 5), GPIO_INPUT)
+GPIO(CHARGER_VAP_OTG_EN,             PIN(7, 3), GPIO_OUT_LOW)
+GPIO(CPU_C10_GATE_L,                 PIN(6, 7), GPIO_INPUT)
+GPIO(EC_ACCEL_INT_R_L,               PIN(8, 1), GPIO_INPUT)
+GPIO(EC_ALS_RGB_INT_R_L,             PIN(D, 4), GPIO_INPUT)
+GPIO(EC_BATT_PRES_ODL,               PIN(E, 1), GPIO_INPUT)
+GPIO(EC_ENTERING_RW,                 PIN(0, 3), GPIO_OUT_LOW)
+GPIO(EC_EN_EDP_BL,                   PIN(D, 3), GPIO_OUT_HIGH)
+GPIO(EC_EN_IMVP91_R,                 PIN(A, 7), GPIO_OUT_LOW)
+GPIO(EC_GSC_PACKET_MODE,             PIN(7, 5), GPIO_INPUT)
+GPIO(EC_I2C_BAT_SCL,                 PIN(3, 3), GPIO_INPUT)
+GPIO(EC_I2C_BAT_SDA,                 PIN(3, 6), GPIO_INPUT)
+GPIO(EC_I2C_MISC_SCL_R,              PIN(B, 3), GPIO_INPUT)
+GPIO(EC_I2C_MISC_SDA_R,              PIN(B, 2), GPIO_INPUT)
+GPIO(EC_I2C_SENSOR_SCL,              PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V)
+GPIO(EC_I2C_SENSOR_SDA,              PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V)
+GPIO(EC_I2C_USB_C0_C2_PPC_BC_SCL,    PIN(9, 2), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_PPC_BC_SDA,    PIN(9, 1), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_RT_SCL,        PIN(D, 1), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_RT_SDA,        PIN(D, 0), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_TCPC_SCL,      PIN(9, 0), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_TCPC_SDA,      PIN(8, 7), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_MIX_SCL,          PIN(E, 4), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_MIX_SDA,          PIN(E, 3), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_TCPC_SCL,         PIN(F, 3), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_TCPC_SDA,         PIN(F, 2), GPIO_INPUT)
+GPIO(EC_KB_BL_EN,                    PIN(8, 5), GPIO_OUT_LOW)
+GPIO(EC_PCHHOT_ODL,                  PIN(7, 4), GPIO_ODR_HIGH)
+GPIO(EC_PCH_INT_ODL,                 PIN(B, 0), GPIO_ODR_HIGH)
+GPIO(EC_PCH_PWR_BTN_ODL,             PIN(C, 1), GPIO_ODR_HIGH)
+GPIO(EC_PCH_RSMRST_L,                PIN(A, 6), GPIO_OUT_LOW)
+GPIO(EC_PCH_RTCRST,                  PIN(7, 6), GPIO_OUT_LOW)
+GPIO(EC_PCH_SYS_PWROK,               PIN(3, 7), GPIO_OUT_LOW)
+GPIO(EC_PROCHOT_ODL,                 PIN(6, 3), GPIO_ODR_HIGH)
+GPIO(EC_RST_ODL,                     PIN(7, 7), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(EN_PP5000_FAN,                  PIN(6, 1), GPIO_OUT_HIGH)
+GPIO(EN_PP5000_USBA_R,               PIN(D, 7), GPIO_OUT_LOW)
+GPIO(EN_S5_RAILS,                    PIN(B, 6), GPIO_OUT_LOW)
+GPIO(EN_SLP_Z,                       PIN(A, 3), GPIO_OUT_LOW)
+GPIO(IMVP9_VRRDY_OD,                 PIN(4, 3), GPIO_INPUT)
+GPIO(LID_OPEN_OD,                    PIN(D, 2), GPIO_INPUT)
+GPIO(PCH_PWROK,                      PIN(7, 2), GPIO_OUT_LOW)
+GPIO(PRB_EC_GPIOC0,                  PIN(C, 0), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(SYS_RST_ODL,                    PIN(C, 5), GPIO_ODR_HIGH)
+GPIO(TABLET_MODE_ODL,                PIN(9, 5), GPIO_INPUT)
+GPIO(USB_C0_C2_TCPC_RST_ODL,         PIN(3, 4), GPIO_ODR_LOW)
+GPIO(USB_C1_FRS_EN,                  PIN(9, 4), GPIO_OUT_LOW)
+GPIO(USB_C1_RST_ODL,                 PIN(9, 6), GPIO_ODR_LOW)
+GPIO(USB_C1_RT_RST_R_ODL,            PIN(0, 2), GPIO_ODR_LOW)
+GPIO(VCCST_PWRGD_OD,                 PIN(A, 4), GPIO_ODR_LOW)
+
+/* Alternate Functions: */
+
+/* UART alternate functions */
+ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0)              /* GPIO64/CR_SIN1, GPO65/CR_SOUT1/FLPRG1_L */
+
+/* I2C alternate functions */
+ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, 0)               /* GPIO33/I2C5_SCL0/CTS_L, GPIO36/RTS_L/I2C5_SDA0 */
+ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0)               /* GPIO87/I2C1_SDA0 */
+ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0)               /* GPIO92/I2C2_SCL0, GPIO91/I2C2_SDA0, GPIO90/I2C1_SCL0 */
+ALTERNATE(PIN_MASK(B, 0x0c), 0, MODULE_I2C, 0)               /* GPIOB3/I2C7_SCL0/DCD_L, GPIOB2/I2C7_SDA0/DSR_L */
+ALTERNATE(PIN_MASK(B, 0x30), 0, MODULE_I2C, GPIO_SEL_1P8V)   /* GPIOB5/I2C0_SCL0, GPIOB4/I2C0_SDA0 */
+ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0)               /* GPIOD1/I2C3_SCL0, GPIOD0/I2C3_SDA0 */
+ALTERNATE(PIN_MASK(E, 0x18), 0, MODULE_I2C, 0)               /* GPIOE4/I2C6_SCL1/I3C_SCL, GPIOE3/I2C6_SDA1/I3C_SDA */
+ALTERNATE(PIN_MASK(F, 0x0c), 0, MODULE_I2C, 0)               /* GPIOF3/I2C4_SCL1, GPIOF2/I2C4_SDA1 */
+
+/* PWM alternate functions */
+ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0)               /* GPIO40/TA1 */
+ALTERNATE(PIN_MASK(6, 0x01), 0, MODULE_PWM, 0)               /* GPIO60/PWM7 */
+ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0)               /* GPIO80/PWM3 */
+ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0)               /* GPIOB7/PWM5 */
+ALTERNATE(PIN_MASK(C, 0x1c), 0, MODULE_PWM, 0)               /* GPIOC4/PWM2, GPIOC3/PWM0, GPIOC2/PWM1/I2C6_SCL0 */
+
+/* ADC alternate functions */
+ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0)               /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */
+
+/* KB alternate functions */
+ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH)    /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */
+ALTERNATE(PIN_MASK(1, 0x7f), 0, MODULE_KB, GPIO_ODR_HIGH)    /* KSO06/GPO13/GP_SEL_L, KSO07/GPO12/JEN_L, KSO03/GPIO16/JTAG_TDO0_SWO, KSO04/GPIO15/XNOR, KSO05/GPIO14, KSO08/GPIO11/CR_SOUT1, KSO09/GPIO10/CR_SIN1 */
+ALTERNATE(PIN_MASK(1, 0x80), 0, MODULE_KB, GPIO_OUT_LOW)     /* KSO02/GPIO17/JTAG_TDI */
+ALTERNATE(PIN_MASK(2, 0xfc), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI2/GPIO27/TRACEDATA1, KSI3/GPIO26/TRACEDATA0, KSI4/GPIO25/TRACECLK/GP_SCLK, KSI5/GPIO24/GP_MISO, KSI6/GPIO23/S_SBUB, KSI7/GPIO22/S_SBUA */
+ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KB, GPIO_ODR_HIGH)    /* KSO00/GPIO21/JTAG_TCK_SWCLK, KSO01/GPIO20/JTAG_TMS_SWIO */
+ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI0/GPIO31/TRACEDATA3/GP_MOSI, KSI1/GPIO30/TRACEDATA2/GP_CS_L */
+ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KB, GPIO_ODR_HIGH)    /* KSO14/GPIO82 */
+ALTERNATE(PIN_MASK(8, 0x20), 0, MODULE_KB, GPIO_OUT_LOW)     /* PSL_OUT&GPIO85/GPO85 */
+
+/* GPIO alternate functions */
+ALTERNATE(PIN_MASK(0, 0x01), 0, MODULE_GPIO, GPIO_INPUT | GPIO_INT_BOTH) /* PSL_IN2_L&GPI00/GPIO00 */
+ALTERNATE(PIN_MASK(0, 0x08), 0, MODULE_GPIO, GPIO_OUT_LOW)   /* KSO16/GPIO03 */
+ALTERNATE(PIN_MASK(7, 0x04), 0, MODULE_GPIO, GPIO_OUT_LOW)   /* PWRGD/GPIO72 */
+ALTERNATE(PIN_MASK(8, 0x02), 0, MODULE_GPIO, GPIO_INPUT)     /* PECI_DATA/GPIO81 */
+ALTERNATE(PIN_MASK(8, 0x08), 0, MODULE_GPIO, GPIO_INPUT | GPIO_INT_BOTH) /* KSO15/GPIO83 */
+ALTERNATE(PIN_MASK(9, 0x20), 0, MODULE_GPIO, GPIO_INPUT)     /* SPIP_MISO/GPIO95 */
+ALTERNATE(PIN_MASK(9, 0x40), 0, MODULE_GPIO, GPIO_ODR_LOW)   /* F_DIO1/GPIO96 */
+ALTERNATE(PIN_MASK(A, 0x07), 0, MODULE_GPIO, GPIO_INPUT | GPIO_INT_BOTH) /* SPIP_SCLK/GPIOA1, F_CS0_L/GPIOA0, F_SCLK/GPIOA2 */
+ALTERNATE(PIN_MASK(A, 0x10), 0, MODULE_GPIO, GPIO_ODR_LOW)   /* F_DIO0/GPIOA4/TB1 */
+ALTERNATE(PIN_MASK(A, 0x08), 0, MODULE_GPIO, GPIO_OUT_LOW)   /* SPIP_MOSI/GPIOA3 */
+ALTERNATE(PIN_MASK(B, 0x02), 0, MODULE_GPIO, GPIO_INPUT | GPIO_INT_BOTH) /* KSO17/GPIOB1/CR_SIN4 */
+ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_GPIO, GPIO_INPUT)     /* PSL_IN1_L&GPID2/GPIOD2 */
+ALTERNATE(PIN_MASK(D, 0x80), 0, MODULE_GPIO, GPIO_OUT_LOW)   /* PSL_GPO/GPOD7 */
+
+/* Unused Pins */
+UNUSED(PIN(D, 6))       /* GPOD6/CR_SOUT3/SHDF_ESPI_L */
+UNUSED(PIN(3, 2))       /* GPO32/TRIS_L */
+UNUSED(PIN(3, 5))       /* GPO35/CR_SOUT4/TEST_L */
+UNUSED(PIN(6, 6))       /* GPO66/ARM_L_x86 */
+UNUSED(PIN(8, 6))       /* GPO86/TXD/CR_SOUT2/FLPRG2_L */
diff --git a/board/brya/gpio.inc b/board/brya/gpio.inc
index 6c4d16415c..c05737184c 100644
--- a/board/brya/gpio.inc
+++ b/board/brya/gpio.inc
@@ -1,15 +1,32 @@
 /* -*- mode:c -*-
  *
- * Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Copyright 2021 The Chromium OS Authors. All rights reserved.
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
 
+#define MODULE_KB		MODULE_KEYBOARD_SCAN
+
 /*
- * we need at least one GPIO definition because much of the code does not
- * handle the case of no GPIOs.
+ * Generated-gpio.inc is produced using a Brya specific tool that
+ * parses the GPIO definitions derived from the board schematics and
+ * EC pinout descriptions derived form the chip datasheets to generate
+ * the Chrome EC GPIO pinout definitions. Due to the confidential
+ * nature of schematics and datasheets, they are not provided here.
+ *
+ * Variants that do not auto-generate their GPIO definitions should
+ * combine the Brya gpio.inc and generated-gpio.inc into their
+ * gpio.inc and customize as appropriate.
  */
 
-GPIO_INT(FAKE_IRQ_00, PIN(3, 4), GPIO_INT_BOTH, fake_gpio_interrupt)
+#include "generated-gpio.inc"
+
+/*
+ * The NPCX keyboard driver does not use named GPIOs to access
+ * keyboard scan pins, so we do not list them in *gpio.inc. However, when
+ * KEYBOARD_COL2_INVERTED is defined, this name is required.
+ */
+GPIO(EC_KSO_02_INV,                  PIN(1, 7), GPIO_OUT_LOW)
 
-GPIO(FAKE_OUT_01, PIN(5, 6), GPIO_OUTPUT)
+IOEX(USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 2), GPIO_ODR_LOW)
+IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW)