diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2015-10-07 15:30:18 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-10-07 22:19:34 -0700 |
| commit | 298845ed71f8df70132620fe36285e5f429eb4e7 (patch) | |
| tree | c954dd053682080eb8288e6e1e916964732069ed | |
| parent | 7e07e469f35f80337d9bb5c8767a9a35aa348b55 (diff) | |
| download | chrome-ec-298845ed71f8df70132620fe36285e5f429eb4e7.tar.gz | |
cr50: upgrade to the latest FPGA image (20151007_064811)
This patch updates the EC codebase to match the suggested USB
build. The spiflash utility must come from the same tarball.
BRANCH=none
BUG=none
TEST=as follows:
- programmed the FPGA, it now reports the following when reset:
BootRom 0.8.91hw
- booted the new image using the latest spiflash version. Note
that the bootrom now reports the FPGA image it comes from:
BootRom 20151007_064811@75052
- disconnected the FPGA upgrade port, rebooted the device, entered
on the device console:
> spstp off
> spste
run on the workstation:
$ examples/spiraw.py -l 10 -f 800000
FT232H Future Technology Devices International, Ltd initialized at 857142 hertz
and observe on the DUT console:
Processed 10 frames rx count 11604, tx count 5512, tx_empty 10, max rx batch 11
>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: Iccd8f202493951f803393395273caa83467655df
Reviewed-on: https://chromium-review.googlesource.com/304622
Commit-Ready: Marius Schilder <mschilder@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
| -rw-r--r-- | chip/g/cr50_fpga_regdefs.h | 2415 | ||||
| -rw-r--r-- | util/signer/codesigner.cc | 20 | ||||
| -rw-r--r-- | util/signer/common/image.h | 4 | ||||
| -rw-r--r-- | util/signer/common/signed_header.h | 12 | ||||
| -rw-r--r-- | util/signer/image.cc | 16 |
5 files changed, 1314 insertions, 1153 deletions
diff --git a/chip/g/cr50_fpga_regdefs.h b/chip/g/cr50_fpga_regdefs.h index 117460d478..07f95a8641 100644 --- a/chip/g/cr50_fpga_regdefs.h +++ b/chip/g/cr50_fpga_regdefs.h @@ -563,7 +563,7 @@ #define GC_CAMO0_BASE_ADDR 0x40560000 #define GC_CRYPTO0_BASE_ADDR 0x40420000 #define GC_DMA0_BASE_ADDR 0x40430000 -#define GC_FLASH0_BASE_ADDR 0x40710000 +#define GC_FLASH0_BASE_ADDR 0x40720000 #define GC_FUSE0_BASE_ADDR 0x40450000 #define GC_GLOBALSEC_BASE_ADDR 0x40090000 #define GC_GPIO0_BASE_ADDR 0x40200000 @@ -579,8 +579,8 @@ #define GC_RBOX0_BASE_ADDR 0x40550000 #define GC_RDD0_BASE_ADDR 0x40440000 #define GC_RTC0_BASE_ADDR 0x400a0000 -#define GC_SPI0_BASE_ADDR 0x40680000 -#define GC_SPI1_BASE_ADDR 0x40690000 +#define GC_SPI0_BASE_ADDR 0x40700000 +#define GC_SPI1_BASE_ADDR 0x40710000 #define GC_SPS0_BASE_ADDR 0x40510000 #define GC_SWDP0_BASE_ADDR 0x40520000 #define GC_TEMP0_BASE_ADDR 0x40400000 @@ -1155,438 +1155,446 @@ #define GC_FUSE_X_OSC_LDO_CTRL_EN_DEFAULT 0x55555550 #define GC_FUSE_X_OSC_LDO_CTRL_OFFSET 0xf4 #define GC_FUSE_X_OSC_LDO_CTRL_DEFAULT 0x55555550 -#define GC_FUSE_EXT_XTAL_PDB_OFFSET 0xf8 +#define GC_FUSE_TEMP_OFFSET_CAL_OFFSET 0xf8 +#define GC_FUSE_TEMP_OFFSET_CAL_DEFAULT 0x55555000 +#define GC_FUSE_TRNG_LDO_CTRL_EN_OFFSET 0xfc +#define GC_FUSE_TRNG_LDO_CTRL_EN_DEFAULT 0x55555550 +#define GC_FUSE_TRNG_LDO_CTRL_OFFSET 0x100 +#define GC_FUSE_TRNG_LDO_CTRL_DEFAULT 0x55555540 +#define GC_FUSE_TRNG_ANALOG_CTRL_EN_OFFSET 0x104 +#define GC_FUSE_TRNG_ANALOG_CTRL_EN_DEFAULT 0x55555550 +#define GC_FUSE_TRNG_ANALOG_CTRL_OFFSET 0x108 +#define GC_FUSE_TRNG_ANALOG_CTRL_DEFAULT 0x55555550 +#define GC_FUSE_EXT_XTAL_PDB_OFFSET 0x10c #define GC_FUSE_EXT_XTAL_PDB_DEFAULT 0x55555554 -#define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_OFFSET 0xfc +#define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_OFFSET 0x110 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_DEFAULT 0x55555550 -#define GC_FUSE_OBFUSCATION_EN_OFFSET 0x100 +#define GC_FUSE_OBFUSCATION_EN_OFFSET 0x114 #define GC_FUSE_OBFUSCATION_EN_DEFAULT 0x55555550 -#define GC_FUSE_JITTER_CLK_EN_OFFSET 0x104 +#define GC_FUSE_JITTER_CLK_EN_OFFSET 0x118 #define GC_FUSE_JITTER_CLK_EN_DEFAULT 0x55555550 -#define GC_FUSE_HIK_CREATE_LOCK_OFFSET 0x108 +#define GC_FUSE_HIK_CREATE_LOCK_OFFSET 0x11c #define GC_FUSE_HIK_CREATE_LOCK_DEFAULT 0x55555550 -#define GC_FUSE_BNK2_INTG_CHKSUM_OFFSET 0x10c +#define GC_FUSE_BNK2_INTG_CHKSUM_OFFSET 0x120 #define GC_FUSE_BNK2_INTG_CHKSUM_DEFAULT 0x55000000 -#define GC_FUSE_BNK2_INTG_LOCK_OFFSET 0x110 +#define GC_FUSE_BNK2_INTG_LOCK_OFFSET 0x124 #define GC_FUSE_BNK2_INTG_LOCK_DEFAULT 0x55555550 -#define GC_FUSE_TESTMODE_OTPW_DIS_OFFSET 0x114 +#define GC_FUSE_TESTMODE_OTPW_DIS_OFFSET 0x128 #define GC_FUSE_TESTMODE_OTPW_DIS_DEFAULT 0x55555550 -#define GC_FUSE_HKEY_WDOG_TIMER_EN_OFFSET 0x118 +#define GC_FUSE_HKEY_WDOG_TIMER_EN_OFFSET 0x12c #define GC_FUSE_HKEY_WDOG_TIMER_EN_DEFAULT 0x55555550 -#define GC_FUSE_FLASH_PERSO_PAGE_LOCK_OFFSET 0x11c +#define GC_FUSE_FLASH_PERSO_PAGE_LOCK_OFFSET 0x130 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_DEFAULT 0x55555550 -#define GC_FUSE_ALERT_RSP_CFG_OFFSET 0x120 +#define GC_FUSE_ALERT_RSP_CFG_OFFSET 0x134 #define GC_FUSE_ALERT_RSP_CFG_DEFAULT 0x55555500 -#define GC_FUSE_BNK3_INTG_CHKSUM_OFFSET 0x124 +#define GC_FUSE_BNK3_INTG_CHKSUM_OFFSET 0x138 #define GC_FUSE_BNK3_INTG_CHKSUM_DEFAULT 0x55000000 -#define GC_FUSE_BNK3_INTG_LOCK_OFFSET 0x128 +#define GC_FUSE_BNK3_INTG_LOCK_OFFSET 0x13c #define GC_FUSE_BNK3_INTG_LOCK_DEFAULT 0x55555550 -#define GC_FUSE_FW_DEFINED_DATA_BLK0_OFFSET 0x12c +#define GC_FUSE_FW_DEFINED_DATA_BLK0_OFFSET 0x140 #define GC_FUSE_FW_DEFINED_DATA_BLK0_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK1_OFFSET 0x130 +#define GC_FUSE_FW_DEFINED_DATA_BLK1_OFFSET 0x144 #define GC_FUSE_FW_DEFINED_DATA_BLK1_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK2_OFFSET 0x134 +#define GC_FUSE_FW_DEFINED_DATA_BLK2_OFFSET 0x148 #define GC_FUSE_FW_DEFINED_DATA_BLK2_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK3_OFFSET 0x138 +#define GC_FUSE_FW_DEFINED_DATA_BLK3_OFFSET 0x14c #define GC_FUSE_FW_DEFINED_DATA_BLK3_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK4_OFFSET 0x13c +#define GC_FUSE_FW_DEFINED_DATA_BLK4_OFFSET 0x150 #define GC_FUSE_FW_DEFINED_DATA_BLK4_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK5_OFFSET 0x140 +#define GC_FUSE_FW_DEFINED_DATA_BLK5_OFFSET 0x154 #define GC_FUSE_FW_DEFINED_DATA_BLK5_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK6_OFFSET 0x144 +#define GC_FUSE_FW_DEFINED_DATA_BLK6_OFFSET 0x158 #define GC_FUSE_FW_DEFINED_DATA_BLK6_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK7_OFFSET 0x148 +#define GC_FUSE_FW_DEFINED_DATA_BLK7_OFFSET 0x15c #define GC_FUSE_FW_DEFINED_DATA_BLK7_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK8_OFFSET 0x14c +#define GC_FUSE_FW_DEFINED_DATA_BLK8_OFFSET 0x160 #define GC_FUSE_FW_DEFINED_DATA_BLK8_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK9_OFFSET 0x150 +#define GC_FUSE_FW_DEFINED_DATA_BLK9_OFFSET 0x164 #define GC_FUSE_FW_DEFINED_DATA_BLK9_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK10_OFFSET 0x154 +#define GC_FUSE_FW_DEFINED_DATA_BLK10_OFFSET 0x168 #define GC_FUSE_FW_DEFINED_DATA_BLK10_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_BLK11_OFFSET 0x158 +#define GC_FUSE_FW_DEFINED_DATA_BLK11_OFFSET 0x16c #define GC_FUSE_FW_DEFINED_DATA_BLK11_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_OFFSET 0x15c +#define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_OFFSET 0x170 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_OFFSET 0x160 +#define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_OFFSET 0x174 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_CLK10HZ_COUNT_OFFSET 0x164 +#define GC_FUSE_RBOX_CLK10HZ_COUNT_OFFSET 0x178 #define GC_FUSE_RBOX_CLK10HZ_COUNT_DEFAULT 0x55550000 -#define GC_FUSE_RBOX_SHORT_DELAY_COUNT_OFFSET 0x168 +#define GC_FUSE_RBOX_SHORT_DELAY_COUNT_OFFSET 0x17c #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_DEFAULT 0x55550000 -#define GC_FUSE_RBOX_LONG_DELAY_COUNT_OFFSET 0x16c +#define GC_FUSE_RBOX_LONG_DELAY_COUNT_OFFSET 0x180 #define GC_FUSE_RBOX_LONG_DELAY_COUNT_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_DEBOUNCE_PERIOD_OFFSET 0x170 +#define GC_FUSE_RBOX_DEBOUNCE_PERIOD_OFFSET 0x184 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_DEFAULT 0x55550000 -#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_OFFSET 0x174 +#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_OFFSET 0x188 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_OFFSET 0x178 +#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_OFFSET 0x18c #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_OFFSET 0x17c +#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_OFFSET 0x190 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_KEY_COMBO0_VAL_OFFSET 0x180 +#define GC_FUSE_RBOX_KEY_COMBO0_VAL_OFFSET 0x194 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_KEY_COMBO1_VAL_OFFSET 0x184 +#define GC_FUSE_RBOX_KEY_COMBO1_VAL_OFFSET 0x198 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_KEY_COMBO2_VAL_OFFSET 0x188 +#define GC_FUSE_RBOX_KEY_COMBO2_VAL_OFFSET 0x19c #define GC_FUSE_RBOX_KEY_COMBO2_VAL_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_KEY_COMBO0_HOLD_OFFSET 0x18c +#define GC_FUSE_RBOX_KEY_COMBO0_HOLD_OFFSET 0x1a0 #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_KEY_COMBO1_HOLD_OFFSET 0x190 +#define GC_FUSE_RBOX_KEY_COMBO1_HOLD_OFFSET 0x1a4 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_KEY_COMBO2_HOLD_OFFSET 0x194 +#define GC_FUSE_RBOX_KEY_COMBO2_HOLD_OFFSET 0x1a8 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_DEFAULT 0x55555500 -#define GC_FUSE_RBOX_BLOCK_KEY0_SEL_OFFSET 0x198 +#define GC_FUSE_RBOX_BLOCK_KEY0_SEL_OFFSET 0x1ac #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_BLOCK_KEY1_SEL_OFFSET 0x19c +#define GC_FUSE_RBOX_BLOCK_KEY1_SEL_OFFSET 0x1b0 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_BLOCK_KEY0_VAL_OFFSET 0x1a0 +#define GC_FUSE_RBOX_BLOCK_KEY0_VAL_OFFSET 0x1b4 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_BLOCK_KEY1_VAL_OFFSET 0x1a4 +#define GC_FUSE_RBOX_BLOCK_KEY1_VAL_OFFSET 0x1b8 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_AC_PRESENT_OFFSET 0x1a8 +#define GC_FUSE_RBOX_POL_AC_PRESENT_OFFSET 0x1bc #define GC_FUSE_RBOX_POL_AC_PRESENT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_PWRB_IN_OFFSET 0x1ac +#define GC_FUSE_RBOX_POL_PWRB_IN_OFFSET 0x1c0 #define GC_FUSE_RBOX_POL_PWRB_IN_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_PWRB_OUT_OFFSET 0x1b0 +#define GC_FUSE_RBOX_POL_PWRB_OUT_OFFSET 0x1c4 #define GC_FUSE_RBOX_POL_PWRB_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_KEY0_IN_OFFSET 0x1b4 +#define GC_FUSE_RBOX_POL_KEY0_IN_OFFSET 0x1c8 #define GC_FUSE_RBOX_POL_KEY0_IN_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_KEY0_OUT_OFFSET 0x1b8 +#define GC_FUSE_RBOX_POL_KEY0_OUT_OFFSET 0x1cc #define GC_FUSE_RBOX_POL_KEY0_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_KEY1_IN_OFFSET 0x1bc +#define GC_FUSE_RBOX_POL_KEY1_IN_OFFSET 0x1d0 #define GC_FUSE_RBOX_POL_KEY1_IN_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_KEY1_OUT_OFFSET 0x1c0 +#define GC_FUSE_RBOX_POL_KEY1_OUT_OFFSET 0x1d4 #define GC_FUSE_RBOX_POL_KEY1_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_EC_RST_OFFSET 0x1c4 +#define GC_FUSE_RBOX_POL_EC_RST_OFFSET 0x1d8 #define GC_FUSE_RBOX_POL_EC_RST_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_POL_BATT_DISABLE_OFFSET 0x1c8 +#define GC_FUSE_RBOX_POL_BATT_DISABLE_OFFSET 0x1dc #define GC_FUSE_RBOX_POL_BATT_DISABLE_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_TERM_AC_PRESENT_OFFSET 0x1cc +#define GC_FUSE_RBOX_TERM_AC_PRESENT_OFFSET 0x1e0 #define GC_FUSE_RBOX_TERM_AC_PRESENT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_TERM_ENTERING_RW_OFFSET 0x1d0 +#define GC_FUSE_RBOX_TERM_ENTERING_RW_OFFSET 0x1e4 #define GC_FUSE_RBOX_TERM_ENTERING_RW_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_TERM_PWRB_IN_OFFSET 0x1d4 +#define GC_FUSE_RBOX_TERM_PWRB_IN_OFFSET 0x1e8 #define GC_FUSE_RBOX_TERM_PWRB_IN_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_TERM_PWRB_OUT_OFFSET 0x1d8 +#define GC_FUSE_RBOX_TERM_PWRB_OUT_OFFSET 0x1ec #define GC_FUSE_RBOX_TERM_PWRB_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_TERM_KEY0_IN_OFFSET 0x1dc +#define GC_FUSE_RBOX_TERM_KEY0_IN_OFFSET 0x1f0 #define GC_FUSE_RBOX_TERM_KEY0_IN_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_TERM_KEY0_OUT_OFFSET 0x1e0 +#define GC_FUSE_RBOX_TERM_KEY0_OUT_OFFSET 0x1f4 #define GC_FUSE_RBOX_TERM_KEY0_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_TERM_KEY1_IN_OFFSET 0x1e4 +#define GC_FUSE_RBOX_TERM_KEY1_IN_OFFSET 0x1f8 #define GC_FUSE_RBOX_TERM_KEY1_IN_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_TERM_KEY1_OUT_OFFSET 0x1e8 +#define GC_FUSE_RBOX_TERM_KEY1_OUT_OFFSET 0x1fc #define GC_FUSE_RBOX_TERM_KEY1_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_DRIVE_PWRB_OUT_OFFSET 0x1ec +#define GC_FUSE_RBOX_DRIVE_PWRB_OUT_OFFSET 0x200 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_DRIVE_KEY0_OUT_OFFSET 0x1f0 +#define GC_FUSE_RBOX_DRIVE_KEY0_OUT_OFFSET 0x204 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_DRIVE_KEY1_OUT_OFFSET 0x1f4 +#define GC_FUSE_RBOX_DRIVE_KEY1_OUT_OFFSET 0x208 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_DRIVE_EC_RST_OFFSET 0x1f8 +#define GC_FUSE_RBOX_DRIVE_EC_RST_OFFSET 0x20c #define GC_FUSE_RBOX_DRIVE_EC_RST_DEFAULT 0x55555554 -#define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_OFFSET 0x1fc +#define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_OFFSET 0x210 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_DEFAULT 0x55555554 -#define GC_FUSE_BNK4_INTG_CHKSUM_OFFSET 0x200 +#define GC_FUSE_BNK4_INTG_CHKSUM_OFFSET 0x214 #define GC_FUSE_BNK4_INTG_CHKSUM_DEFAULT 0x55000000 -#define GC_FUSE_BNK4_INTG_LOCK_OFFSET 0x204 +#define GC_FUSE_BNK4_INTG_LOCK_OFFSET 0x218 #define GC_FUSE_BNK4_INTG_LOCK_DEFAULT 0x55555550 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_OFFSET 0x208 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_OFFSET 0x21c #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_OFFSET 0x20c +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_OFFSET 0x220 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_OFFSET 0x210 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_OFFSET 0x224 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_OFFSET 0x214 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_OFFSET 0x228 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_OFFSET 0x218 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_OFFSET 0x22c #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_OFFSET 0x21c +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_OFFSET 0x230 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_OFFSET 0x220 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_OFFSET 0x234 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_OFFSET 0x224 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK8_OFFSET 0x228 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK8_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK9_OFFSET 0x22c -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK9_DEFAULT 0x55555500 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK10_OFFSET 0x230 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK10_DEFAULT 0x55555500 -#define GC_FUSE_PROG_BNK0_INTG_CHKSUM_OFFSET 0x234 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_OFFSET 0x238 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_DEFAULT 0x55555540 +#define GC_FUSE_PROG_BNK0_INTG_CHKSUM_OFFSET 0x23c #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK0_INTG_LOCK_OFFSET 0x238 +#define GC_FUSE_PROG_BNK0_INTG_LOCK_OFFSET 0x240 #define GC_FUSE_PROG_BNK0_INTG_LOCK_DEFAULT 0x0 -#define GC_FUSE_PROG_DS_GRP0_OFFSET 0x23c +#define GC_FUSE_PROG_DS_GRP0_OFFSET 0x244 #define GC_FUSE_PROG_DS_GRP0_DEFAULT 0x0 -#define GC_FUSE_PROG_DS_GRP1_OFFSET 0x240 +#define GC_FUSE_PROG_DS_GRP1_OFFSET 0x248 #define GC_FUSE_PROG_DS_GRP1_DEFAULT 0x0 -#define GC_FUSE_PROG_DS_GRP2_OFFSET 0x244 +#define GC_FUSE_PROG_DS_GRP2_OFFSET 0x24c #define GC_FUSE_PROG_DS_GRP2_DEFAULT 0x0 -#define GC_FUSE_PROG_DEV_ID0_OFFSET 0x248 +#define GC_FUSE_PROG_DEV_ID0_OFFSET 0x250 #define GC_FUSE_PROG_DEV_ID0_DEFAULT 0x0 -#define GC_FUSE_PROG_DEV_ID1_OFFSET 0x24c +#define GC_FUSE_PROG_DEV_ID1_OFFSET 0x254 #define GC_FUSE_PROG_DEV_ID1_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK1_INTG_CHKSUM_OFFSET 0x250 +#define GC_FUSE_PROG_BNK1_INTG_CHKSUM_OFFSET 0x258 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK1_INTG_LOCK_OFFSET 0x254 +#define GC_FUSE_PROG_BNK1_INTG_LOCK_OFFSET 0x25c #define GC_FUSE_PROG_BNK1_INTG_LOCK_DEFAULT 0x0 -#define GC_FUSE_PROG_LB0_POST_OVRD_OFFSET 0x258 +#define GC_FUSE_PROG_LB0_POST_OVRD_OFFSET 0x260 #define GC_FUSE_PROG_LB0_POST_OVRD_DEFAULT 0x0 -#define GC_FUSE_PROG_LB0_POST_PATCNT_OFFSET 0x25c +#define GC_FUSE_PROG_LB0_POST_PATCNT_OFFSET 0x264 #define GC_FUSE_PROG_LB0_POST_PATCNT_DEFAULT 0x0 -#define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_OFFSET 0x260 +#define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_OFFSET 0x268 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_DEFAULT 0x0 -#define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_OFFSET 0x264 +#define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_OFFSET 0x26c #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_DEFAULT 0x0 -#define GC_FUSE_PROG_LB1_POST_OVRD_OFFSET 0x268 +#define GC_FUSE_PROG_LB1_POST_OVRD_OFFSET 0x270 #define GC_FUSE_PROG_LB1_POST_OVRD_DEFAULT 0x0 -#define GC_FUSE_PROG_LB1_POST_PATCNT_OFFSET 0x26c +#define GC_FUSE_PROG_LB1_POST_PATCNT_OFFSET 0x274 #define GC_FUSE_PROG_LB1_POST_PATCNT_DEFAULT 0x0 -#define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_OFFSET 0x270 +#define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_OFFSET 0x278 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_DEFAULT 0x0 -#define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_OFFSET 0x274 +#define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_OFFSET 0x27c #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_DEFAULT 0x0 -#define GC_FUSE_PROG_LB2_POST_OVRD_OFFSET 0x278 +#define GC_FUSE_PROG_LB2_POST_OVRD_OFFSET 0x280 #define GC_FUSE_PROG_LB2_POST_OVRD_DEFAULT 0x0 -#define GC_FUSE_PROG_LB2_POST_PATCNT_OFFSET 0x27c +#define GC_FUSE_PROG_LB2_POST_PATCNT_OFFSET 0x284 #define GC_FUSE_PROG_LB2_POST_PATCNT_DEFAULT 0x0 -#define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_OFFSET 0x280 +#define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_OFFSET 0x288 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_DEFAULT 0x0 -#define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_OFFSET 0x284 +#define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_OFFSET 0x28c #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_DEFAULT 0x0 -#define GC_FUSE_PROG_LB3_POST_OVRD_OFFSET 0x288 +#define GC_FUSE_PROG_LB3_POST_OVRD_OFFSET 0x290 #define GC_FUSE_PROG_LB3_POST_OVRD_DEFAULT 0x0 -#define GC_FUSE_PROG_LB3_POST_PATCNT_OFFSET 0x28c +#define GC_FUSE_PROG_LB3_POST_PATCNT_OFFSET 0x294 #define GC_FUSE_PROG_LB3_POST_PATCNT_DEFAULT 0x0 -#define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_OFFSET 0x290 +#define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_OFFSET 0x298 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_DEFAULT 0x0 -#define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_OFFSET 0x294 +#define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_OFFSET 0x29c #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_DEFAULT 0x0 -#define GC_FUSE_PROG_MBIST_POST_SEQ_OFFSET 0x298 +#define GC_FUSE_PROG_MBIST_POST_SEQ_OFFSET 0x2a0 #define GC_FUSE_PROG_MBIST_POST_SEQ_DEFAULT 0x0 -#define GC_FUSE_PROG_LBIST_POST_SEQ_OFFSET 0x29c +#define GC_FUSE_PROG_LBIST_POST_SEQ_OFFSET 0x2a4 #define GC_FUSE_PROG_LBIST_POST_SEQ_DEFAULT 0x0 -#define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_OFFSET 0x2a0 +#define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_OFFSET 0x2a8 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_DEFAULT 0x0 -#define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_OFFSET 0x2a4 +#define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_OFFSET 0x2ac #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_DEFAULT 0x0 -#define GC_FUSE_PROG_TAP_DISABLE_OFFSET 0x2a8 +#define GC_FUSE_PROG_TAP_DISABLE_OFFSET 0x2b0 #define GC_FUSE_PROG_TAP_DISABLE_DEFAULT 0x0 -#define GC_FUSE_PROG_RNGBIST_AR_EN_OFFSET 0x2ac +#define GC_FUSE_PROG_RNGBIST_AR_EN_OFFSET 0x2b4 #define GC_FUSE_PROG_RNGBIST_AR_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_TESTMODE_KEYS_EN_OFFSET 0x2b0 +#define GC_FUSE_PROG_TESTMODE_KEYS_EN_OFFSET 0x2b8 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_PKG_ID_OFFSET 0x2b4 +#define GC_FUSE_PROG_PKG_ID_OFFSET 0x2bc #define GC_FUSE_PROG_PKG_ID_DEFAULT 0x0 -#define GC_FUSE_PROG_BIN_ID_OFFSET 0x2b8 +#define GC_FUSE_PROG_BIN_ID_OFFSET 0x2c0 #define GC_FUSE_PROG_BIN_ID_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_OFFSET 0x2bc +#define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_OFFSET 0x2c4 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_OFFSET 0x2c0 +#define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_OFFSET 0x2c8 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_OFFSET 0x2c4 +#define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_OFFSET 0x2cc #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_OFFSET 0x2c8 +#define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_OFFSET 0x2d0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_OFFSET 0x2cc +#define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_OFFSET 0x2d4 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_OFFSET 0x2d0 +#define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_OFFSET 0x2d8 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_OFFSET 0x2d4 +#define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_OFFSET 0x2dc #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_OFFSET 0x2d8 +#define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_OFFSET 0x2e0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_OFFSET 0x2dc +#define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_OFFSET 0x2e4 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_OFFSET 0x2e0 +#define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_OFFSET 0x2e8 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_SEL_VREG_REG_EN_OFFSET 0x2e4 +#define GC_FUSE_PROG_SEL_VREG_REG_EN_OFFSET 0x2ec #define GC_FUSE_PROG_SEL_VREG_REG_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_SEL_VREF_REG_OFFSET 0x2e8 +#define GC_FUSE_PROG_SEL_VREF_REG_OFFSET 0x2f0 #define GC_FUSE_PROG_SEL_VREF_REG_DEFAULT 0x0 -#define GC_FUSE_PROG_SEL_VREF_BATMON_EN_OFFSET 0x2ec +#define GC_FUSE_PROG_SEL_VREF_BATMON_EN_OFFSET 0x2f4 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_SEL_VREF_BATMON_OFFSET 0x2f0 +#define GC_FUSE_PROG_SEL_VREF_BATMON_OFFSET 0x2f8 #define GC_FUSE_PROG_SEL_VREF_BATMON_DEFAULT 0x0 -#define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_OFFSET 0x2f4 +#define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_OFFSET 0x2fc #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_X_OSC_LDO_CTRL_OFFSET 0x2f8 +#define GC_FUSE_PROG_X_OSC_LDO_CTRL_OFFSET 0x300 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_DEFAULT 0x0 -#define GC_FUSE_PROG_EXT_XTAL_PDB_OFFSET 0x2fc +#define GC_FUSE_PROG_TEMP_OFFSET_CAL_OFFSET 0x304 +#define GC_FUSE_PROG_TEMP_OFFSET_CAL_DEFAULT 0x0 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_OFFSET 0x308 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_DEFAULT 0x0 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_OFFSET 0x30c +#define GC_FUSE_PROG_TRNG_LDO_CTRL_DEFAULT 0x0 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_OFFSET 0x310 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_DEFAULT 0x0 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_OFFSET 0x314 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_DEFAULT 0x0 +#define GC_FUSE_PROG_EXT_XTAL_PDB_OFFSET 0x318 #define GC_FUSE_PROG_EXT_XTAL_PDB_DEFAULT 0x0 -#define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_OFFSET 0x300 +#define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_OFFSET 0x31c #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_DEFAULT 0x0 -#define GC_FUSE_PROG_OBFUSCATION_EN_OFFSET 0x304 +#define GC_FUSE_PROG_OBFUSCATION_EN_OFFSET 0x320 #define GC_FUSE_PROG_OBFUSCATION_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_JITTER_CLK_EN_OFFSET 0x308 +#define GC_FUSE_PROG_JITTER_CLK_EN_OFFSET 0x324 #define GC_FUSE_PROG_JITTER_CLK_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS0_OFFSET 0x30c +#define GC_FUSE_PROG_OBS0_OFFSET 0x328 #define GC_FUSE_PROG_OBS0_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS1_OFFSET 0x310 +#define GC_FUSE_PROG_OBS1_OFFSET 0x32c #define GC_FUSE_PROG_OBS1_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS2_OFFSET 0x314 +#define GC_FUSE_PROG_OBS2_OFFSET 0x330 #define GC_FUSE_PROG_OBS2_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS3_OFFSET 0x318 +#define GC_FUSE_PROG_OBS3_OFFSET 0x334 #define GC_FUSE_PROG_OBS3_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS4_OFFSET 0x31c +#define GC_FUSE_PROG_OBS4_OFFSET 0x338 #define GC_FUSE_PROG_OBS4_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS5_OFFSET 0x320 +#define GC_FUSE_PROG_OBS5_OFFSET 0x33c #define GC_FUSE_PROG_OBS5_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS6_OFFSET 0x324 +#define GC_FUSE_PROG_OBS6_OFFSET 0x340 #define GC_FUSE_PROG_OBS6_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS7_OFFSET 0x328 +#define GC_FUSE_PROG_OBS7_OFFSET 0x344 #define GC_FUSE_PROG_OBS7_DEFAULT 0x0 -#define GC_FUSE_PROG_HIK_CREATE_LOCK_OFFSET 0x32c +#define GC_FUSE_PROG_HIK_CREATE_LOCK_OFFSET 0x348 #define GC_FUSE_PROG_HIK_CREATE_LOCK_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK2_INTG_CHKSUM_OFFSET 0x330 +#define GC_FUSE_PROG_BNK2_INTG_CHKSUM_OFFSET 0x34c #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK2_INTG_LOCK_OFFSET 0x334 +#define GC_FUSE_PROG_BNK2_INTG_LOCK_OFFSET 0x350 #define GC_FUSE_PROG_BNK2_INTG_LOCK_DEFAULT 0x0 -#define GC_FUSE_PROG_TESTMODE_OTPW_DIS_OFFSET 0x338 +#define GC_FUSE_PROG_TESTMODE_OTPW_DIS_OFFSET 0x354 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_DEFAULT 0x0 -#define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_OFFSET 0x33c +#define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_OFFSET 0x358 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_DEFAULT 0x0 -#define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_OFFSET 0x340 +#define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_OFFSET 0x35c #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_DEFAULT 0x0 -#define GC_FUSE_PROG_ALERT_RSP_CFG_OFFSET 0x344 +#define GC_FUSE_PROG_ALERT_RSP_CFG_OFFSET 0x360 #define GC_FUSE_PROG_ALERT_RSP_CFG_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK3_INTG_CHKSUM_OFFSET 0x348 +#define GC_FUSE_PROG_BNK3_INTG_CHKSUM_OFFSET 0x364 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK3_INTG_LOCK_OFFSET 0x34c +#define GC_FUSE_PROG_BNK3_INTG_LOCK_OFFSET 0x368 #define GC_FUSE_PROG_BNK3_INTG_LOCK_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_OFFSET 0x350 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_OFFSET 0x36c #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_OFFSET 0x354 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_OFFSET 0x370 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_OFFSET 0x358 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_OFFSET 0x374 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_OFFSET 0x35c +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_OFFSET 0x378 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_OFFSET 0x360 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_OFFSET 0x37c #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_OFFSET 0x364 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_OFFSET 0x380 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_OFFSET 0x368 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_OFFSET 0x384 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_OFFSET 0x36c +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_OFFSET 0x388 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_OFFSET 0x370 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_OFFSET 0x38c #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_OFFSET 0x374 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_OFFSET 0x390 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_OFFSET 0x378 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_OFFSET 0x394 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_OFFSET 0x37c +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_OFFSET 0x398 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_OFFSET 0x380 +#define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_OFFSET 0x39c #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_OFFSET 0x384 +#define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_OFFSET 0x3a0 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_OFFSET 0x388 +#define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_OFFSET 0x3a4 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_OFFSET 0x38c +#define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_OFFSET 0x3a8 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_OFFSET 0x390 +#define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_OFFSET 0x3ac #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_OFFSET 0x394 +#define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_OFFSET 0x3b0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_OFFSET 0x398 +#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_OFFSET 0x3b4 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_OFFSET 0x39c +#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_OFFSET 0x3b8 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_OFFSET 0x3a0 +#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_OFFSET 0x3bc #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_OFFSET 0x3a4 +#define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_OFFSET 0x3c0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_OFFSET 0x3a8 +#define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_OFFSET 0x3c4 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_OFFSET 0x3ac +#define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_OFFSET 0x3c8 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_OFFSET 0x3b0 +#define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_OFFSET 0x3cc #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_OFFSET 0x3b4 +#define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_OFFSET 0x3d0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_OFFSET 0x3b8 +#define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_OFFSET 0x3d4 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_OFFSET 0x3bc +#define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_OFFSET 0x3d8 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_OFFSET 0x3c0 +#define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_OFFSET 0x3dc #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_OFFSET 0x3c4 +#define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_OFFSET 0x3e0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_OFFSET 0x3c8 +#define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_OFFSET 0x3e4 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_OFFSET 0x3cc +#define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_OFFSET 0x3e8 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_PWRB_IN_OFFSET 0x3d0 +#define GC_FUSE_PROG_RBOX_POL_PWRB_IN_OFFSET 0x3ec #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_OFFSET 0x3d4 +#define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_OFFSET 0x3f0 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_KEY0_IN_OFFSET 0x3d8 +#define GC_FUSE_PROG_RBOX_POL_KEY0_IN_OFFSET 0x3f4 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_OFFSET 0x3dc +#define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_OFFSET 0x3f8 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_KEY1_IN_OFFSET 0x3e0 +#define GC_FUSE_PROG_RBOX_POL_KEY1_IN_OFFSET 0x3fc #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_OFFSET 0x3e4 +#define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_OFFSET 0x400 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_EC_RST_OFFSET 0x3e8 +#define GC_FUSE_PROG_RBOX_POL_EC_RST_OFFSET 0x404 #define GC_FUSE_PROG_RBOX_POL_EC_RST_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_OFFSET 0x3ec +#define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_OFFSET 0x408 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_OFFSET 0x3f0 +#define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_OFFSET 0x40c #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_OFFSET 0x3f4 +#define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_OFFSET 0x410 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_OFFSET 0x3f8 +#define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_OFFSET 0x414 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_OFFSET 0x3fc +#define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_OFFSET 0x418 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_OFFSET 0x400 +#define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_OFFSET 0x41c #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_OFFSET 0x404 +#define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_OFFSET 0x420 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_OFFSET 0x408 +#define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_OFFSET 0x424 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_OFFSET 0x40c +#define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_OFFSET 0x428 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_OFFSET 0x410 +#define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_OFFSET 0x42c #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_OFFSET 0x414 +#define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_OFFSET 0x430 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_OFFSET 0x418 +#define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_OFFSET 0x434 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_OFFSET 0x41c +#define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_OFFSET 0x438 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_OFFSET 0x420 +#define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_OFFSET 0x43c #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK4_INTG_CHKSUM_OFFSET 0x424 +#define GC_FUSE_PROG_BNK4_INTG_CHKSUM_OFFSET 0x440 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK4_INTG_LOCK_OFFSET 0x428 +#define GC_FUSE_PROG_BNK4_INTG_LOCK_OFFSET 0x444 #define GC_FUSE_PROG_BNK4_INTG_LOCK_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_OFFSET 0x42c +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_OFFSET 0x448 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_OFFSET 0x430 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_OFFSET 0x44c #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_OFFSET 0x434 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_OFFSET 0x450 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_OFFSET 0x438 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_OFFSET 0x454 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_OFFSET 0x43c +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_OFFSET 0x458 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_OFFSET 0x440 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_OFFSET 0x45c #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_OFFSET 0x444 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_OFFSET 0x460 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_OFFSET 0x448 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_OFFSET 0x464 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK8_OFFSET 0x44c -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK8_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK9_OFFSET 0x450 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK9_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK10_OFFSET 0x454 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK10_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_OFFSET 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_OFFSET 0x4 @@ -1643,24 +1651,24 @@ #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_OFFSET 0x6c #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_OFFSET 0x70 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_OFFSET 0x74 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_OFFSET 0x78 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_OFFSET 0x7c -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_BULKERASE_CTRL_OFFSET 0x80 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_OFFSET 0x70 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_OFFSET 0x74 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_OFFSET 0x78 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_OFFSET 0x7c +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_OFFSET 0x80 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_OFFSET 0x84 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_OFFSET 0x88 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_OFFSET 0x8c +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH0_BULKERASE_CTRL_OFFSET 0x90 #define GC_GLOBALSEC_FLASH0_BULKERASE_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_OFFSET 0x84 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_OFFSET 0x88 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_OFFSET 0x8c -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_OFFSET 0x90 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH1_BULKERASE_CTRL_OFFSET 0x94 #define GC_GLOBALSEC_FLASH1_BULKERASE_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_BASE_ADDR_OFFSET 0x98 @@ -1775,38 +1783,38 @@ #define GC_GLOBALSEC_DUSB0_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_SIZE_OFFSET 0x174 #define GC_GLOBALSEC_DUSB0_REGION3_SIZE_DEFAULT 0xffffffff -#define GC_GLOBALSEC_FLASH0_REGION0_BASE_ADDR_OFFSET 0x178 -#define GC_GLOBALSEC_FLASH0_REGION0_BASE_ADDR_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION0_SIZE_OFFSET 0x17c -#define GC_GLOBALSEC_FLASH0_REGION0_SIZE_DEFAULT 0xffffffff -#define GC_GLOBALSEC_FLASH0_REGION1_BASE_ADDR_OFFSET 0x180 -#define GC_GLOBALSEC_FLASH0_REGION1_BASE_ADDR_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION1_SIZE_OFFSET 0x184 -#define GC_GLOBALSEC_FLASH0_REGION1_SIZE_DEFAULT 0xffffffff -#define GC_GLOBALSEC_FLASH0_REGION2_BASE_ADDR_OFFSET 0x188 -#define GC_GLOBALSEC_FLASH0_REGION2_BASE_ADDR_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION2_SIZE_OFFSET 0x18c -#define GC_GLOBALSEC_FLASH0_REGION2_SIZE_DEFAULT 0xffffffff -#define GC_GLOBALSEC_FLASH0_REGION3_BASE_ADDR_OFFSET 0x190 -#define GC_GLOBALSEC_FLASH0_REGION3_BASE_ADDR_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION3_SIZE_OFFSET 0x194 -#define GC_GLOBALSEC_FLASH0_REGION3_SIZE_DEFAULT 0xffffffff -#define GC_GLOBALSEC_FLASH1_REGION0_BASE_ADDR_OFFSET 0x198 -#define GC_GLOBALSEC_FLASH1_REGION0_BASE_ADDR_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION0_SIZE_OFFSET 0x19c -#define GC_GLOBALSEC_FLASH1_REGION0_SIZE_DEFAULT 0xffffffff -#define GC_GLOBALSEC_FLASH1_REGION1_BASE_ADDR_OFFSET 0x1a0 -#define GC_GLOBALSEC_FLASH1_REGION1_BASE_ADDR_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION1_SIZE_OFFSET 0x1a4 -#define GC_GLOBALSEC_FLASH1_REGION1_SIZE_DEFAULT 0xffffffff -#define GC_GLOBALSEC_FLASH1_REGION2_BASE_ADDR_OFFSET 0x1a8 -#define GC_GLOBALSEC_FLASH1_REGION2_BASE_ADDR_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION2_SIZE_OFFSET 0x1ac -#define GC_GLOBALSEC_FLASH1_REGION2_SIZE_DEFAULT 0xffffffff -#define GC_GLOBALSEC_FLASH1_REGION3_BASE_ADDR_OFFSET 0x1b0 -#define GC_GLOBALSEC_FLASH1_REGION3_BASE_ADDR_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION3_SIZE_OFFSET 0x1b4 -#define GC_GLOBALSEC_FLASH1_REGION3_SIZE_DEFAULT 0xffffffff +#define GC_GLOBALSEC_FLASH_REGION0_BASE_ADDR_OFFSET 0x178 +#define GC_GLOBALSEC_FLASH_REGION0_BASE_ADDR_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION0_SIZE_OFFSET 0x17c +#define GC_GLOBALSEC_FLASH_REGION0_SIZE_DEFAULT 0xffffffff +#define GC_GLOBALSEC_FLASH_REGION1_BASE_ADDR_OFFSET 0x180 +#define GC_GLOBALSEC_FLASH_REGION1_BASE_ADDR_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION1_SIZE_OFFSET 0x184 +#define GC_GLOBALSEC_FLASH_REGION1_SIZE_DEFAULT 0xffffffff +#define GC_GLOBALSEC_FLASH_REGION2_BASE_ADDR_OFFSET 0x188 +#define GC_GLOBALSEC_FLASH_REGION2_BASE_ADDR_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION2_SIZE_OFFSET 0x18c +#define GC_GLOBALSEC_FLASH_REGION2_SIZE_DEFAULT 0xffffffff +#define GC_GLOBALSEC_FLASH_REGION3_BASE_ADDR_OFFSET 0x190 +#define GC_GLOBALSEC_FLASH_REGION3_BASE_ADDR_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION3_SIZE_OFFSET 0x194 +#define GC_GLOBALSEC_FLASH_REGION3_SIZE_DEFAULT 0xffffffff +#define GC_GLOBALSEC_FLASH_REGION4_BASE_ADDR_OFFSET 0x198 +#define GC_GLOBALSEC_FLASH_REGION4_BASE_ADDR_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION4_SIZE_OFFSET 0x19c +#define GC_GLOBALSEC_FLASH_REGION4_SIZE_DEFAULT 0xffffffff +#define GC_GLOBALSEC_FLASH_REGION5_BASE_ADDR_OFFSET 0x1a0 +#define GC_GLOBALSEC_FLASH_REGION5_BASE_ADDR_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION5_SIZE_OFFSET 0x1a4 +#define GC_GLOBALSEC_FLASH_REGION5_SIZE_DEFAULT 0xffffffff +#define GC_GLOBALSEC_FLASH_REGION6_BASE_ADDR_OFFSET 0x1a8 +#define GC_GLOBALSEC_FLASH_REGION6_BASE_ADDR_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION6_SIZE_OFFSET 0x1ac +#define GC_GLOBALSEC_FLASH_REGION6_SIZE_DEFAULT 0xffffffff +#define GC_GLOBALSEC_FLASH_REGION7_BASE_ADDR_OFFSET 0x1b0 +#define GC_GLOBALSEC_FLASH_REGION7_BASE_ADDR_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION7_SIZE_OFFSET 0x1b4 +#define GC_GLOBALSEC_FLASH_REGION7_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_OFFSET 0x1b8 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_BASE_ADDR_OFFSET 0x1bc @@ -3839,7 +3847,7 @@ #define GC_PMU_BAT_LVL_OK_OFFSET 0x40 #define GC_PMU_BAT_LVL_OK_DEFAULT 0x0 #define GC_PMU_B_REG_DIG_CTRL_OFFSET 0x44 -#define GC_PMU_B_REG_DIG_CTRL_DEFAULT 0x0 +#define GC_PMU_B_REG_DIG_CTRL_DEFAULT 0x2 #define GC_PMU_EXITPD_MASK_OFFSET 0x48 #define GC_PMU_EXITPD_MASK_DEFAULT 0x0 #define GC_PMU_EXITPD_SRC_OFFSET 0x4c @@ -3853,13 +3861,13 @@ #define GC_PMU_MEMCLKCLR_OFFSET 0x5c #define GC_PMU_MEMCLKCLR_DEFAULT 0x7f #define GC_PMU_PERICLKSET0_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DEFAULT 0x3fcfd07b +#define GC_PMU_PERICLKSET0_DEFAULT 0xfe7fa0fb #define GC_PMU_PERICLKCLR0_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DEFAULT 0x3fcfd07b +#define GC_PMU_PERICLKCLR0_DEFAULT 0xfe7fa0fb #define GC_PMU_PERICLKSET1_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DEFAULT 0x3cc4 +#define GC_PMU_PERICLKSET1_DEFAULT 0x1e621 #define GC_PMU_PERICLKCLR1_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DEFAULT 0x3cc4 +#define GC_PMU_PERICLKCLR1_DEFAULT 0x1e621 #define GC_PMU_PERIGATEONSLEEPSET0_OFFSET 0x70 #define GC_PMU_PERIGATEONSLEEPSET0_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_OFFSET 0x74 @@ -3875,37 +3883,37 @@ #define GC_PMU_RST1_OFFSET 0x88 #define GC_PMU_RST1_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH0_OFFSET 0x8c -#define GC_PMU_PWRDN_SCRATCH0_DEFAULT 0x782cb40d +#define GC_PMU_PWRDN_SCRATCH0_DEFAULT 0x55be8ffb #define GC_PMU_PWRDN_SCRATCH1_OFFSET 0x90 -#define GC_PMU_PWRDN_SCRATCH1_DEFAULT 0x16e754df +#define GC_PMU_PWRDN_SCRATCH1_DEFAULT 0x842db32e #define GC_PMU_PWRDN_SCRATCH2_OFFSET 0x94 -#define GC_PMU_PWRDN_SCRATCH2_DEFAULT 0x28215e3d +#define GC_PMU_PWRDN_SCRATCH2_DEFAULT 0x6980cb58 #define GC_PMU_PWRDN_SCRATCH3_OFFSET 0x98 -#define GC_PMU_PWRDN_SCRATCH3_DEFAULT 0x63f5b1c3 +#define GC_PMU_PWRDN_SCRATCH3_DEFAULT 0x37d2a88e #define GC_PMU_PWRDN_SCRATCH4_OFFSET 0x9c -#define GC_PMU_PWRDN_SCRATCH4_DEFAULT 0x79616de3 +#define GC_PMU_PWRDN_SCRATCH4_DEFAULT 0x312c00db #define GC_PMU_PWRDN_SCRATCH5_OFFSET 0xa0 -#define GC_PMU_PWRDN_SCRATCH5_DEFAULT 0x6fcfdb2f +#define GC_PMU_PWRDN_SCRATCH5_DEFAULT 0x424ac682 #define GC_PMU_PWRDN_SCRATCH6_OFFSET 0xa4 -#define GC_PMU_PWRDN_SCRATCH6_DEFAULT 0x9c29ca51 +#define GC_PMU_PWRDN_SCRATCH6_DEFAULT 0x97b8df35 #define GC_PMU_PWRDN_SCRATCH7_OFFSET 0xa8 -#define GC_PMU_PWRDN_SCRATCH7_DEFAULT 0x54705f86 +#define GC_PMU_PWRDN_SCRATCH7_DEFAULT 0x89f4ecfc #define GC_PMU_PWRDN_SCRATCH8_OFFSET 0xac -#define GC_PMU_PWRDN_SCRATCH8_DEFAULT 0x18dc796a +#define GC_PMU_PWRDN_SCRATCH8_DEFAULT 0x1948e79a #define GC_PMU_PWRDN_SCRATCH9_OFFSET 0xb0 -#define GC_PMU_PWRDN_SCRATCH9_DEFAULT 0x2151631d +#define GC_PMU_PWRDN_SCRATCH9_DEFAULT 0x2385529c #define GC_PMU_PWRDN_SCRATCH10_OFFSET 0xb4 -#define GC_PMU_PWRDN_SCRATCH10_DEFAULT 0x55718a7a +#define GC_PMU_PWRDN_SCRATCH10_DEFAULT 0x167de3a1 #define GC_PMU_PWRDN_SCRATCH11_OFFSET 0xb8 -#define GC_PMU_PWRDN_SCRATCH11_DEFAULT 0x30593b87 +#define GC_PMU_PWRDN_SCRATCH11_DEFAULT 0x238cf8d1 #define GC_PMU_PWRDN_SCRATCH12_OFFSET 0xbc -#define GC_PMU_PWRDN_SCRATCH12_DEFAULT 0x3cfac3fd +#define GC_PMU_PWRDN_SCRATCH12_DEFAULT 0x375aaa18 #define GC_PMU_PWRDN_SCRATCH13_OFFSET 0xc0 -#define GC_PMU_PWRDN_SCRATCH13_DEFAULT 0x6f376a2 +#define GC_PMU_PWRDN_SCRATCH13_DEFAULT 0x321a95c9 #define GC_PMU_PWRDN_SCRATCH14_OFFSET 0xc4 -#define GC_PMU_PWRDN_SCRATCH14_DEFAULT 0x2f8d2bbf +#define GC_PMU_PWRDN_SCRATCH14_DEFAULT 0x1a1ed376 #define GC_PMU_PWRDN_SCRATCH15_OFFSET 0xc8 -#define GC_PMU_PWRDN_SCRATCH15_DEFAULT 0x3a92efe4 +#define GC_PMU_PWRDN_SCRATCH15_DEFAULT 0x438233b4 #define GC_PMU_PWRDN_SCRATCH16_OFFSET 0xcc #define GC_PMU_PWRDN_SCRATCH16_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH17_OFFSET 0xd0 @@ -4184,7 +4192,7 @@ #define GC_SPS_EEPROM_BUSY_STATUS_OFFSET 0x430 #define GC_SPS_EEPROM_BUSY_STATUS_DEFAULT 0x0 #define GC_SPS_EEPROM_BUSY_BIT_VECTOR_OFFSET 0x434 -#define GC_SPS_EEPROM_BUSY_BIT_VECTOR_DEFAULT 0x0 +#define GC_SPS_EEPROM_BUSY_BIT_VECTOR_DEFAULT 0x1 #define GC_SPS_EEPROM_WEL_STATUS_OFFSET 0x438 #define GC_SPS_EEPROM_WEL_STATUS_DEFAULT 0x0 #define GC_SPS_JEDEC_ID0_OFFSET 0x43c @@ -4367,15 +4375,13 @@ #define GC_SWDP_HEADER_MD5SUM_OFFSET 0x28 #define GC_SWDP_HEADER_MD5SUM_DEFAULT 0x0 #define GC_SWDP_P4_LAST_SYNC_OFFSET 0x2c -#define GC_SWDP_P4_LAST_SYNC_DEFAULT 0x123bb +#define GC_SWDP_P4_LAST_SYNC_DEFAULT 0x1252c #define GC_SWDP_BUILD_DATE_OFFSET 0x30 -#define GC_SWDP_BUILD_DATE_DEFAULT 0x1337add +#define GC_SWDP_BUILD_DATE_DEFAULT 0x1337adf #define GC_SWDP_BUILD_TIME_OFFSET 0x34 -#define GC_SWDP_BUILD_TIME_DEFAULT 0xa2f1 -#define GC_SWDP_A1_DIO8_OFFSET 0x38 -#define GC_SWDP_A1_DIO8_DEFAULT 0x0 -#define GC_SWDP_A1_CHANNEL_SEL_OFFSET 0x3c -#define GC_SWDP_A1_CHANNEL_SEL_DEFAULT 0x0 +#define GC_SWDP_BUILD_TIME_DEFAULT 0xfd2b +#define GC_SWDP_TEST_PORT_DISABLE_OFFSET 0x38 +#define GC_SWDP_TEST_PORT_DISABLE_DEFAULT 0x0 #define GC_TEMP_VERSION_OFFSET 0x0 #define GC_TEMP_VERSION_DEFAULT 0x8011f6d #define GC_TEMP_ADC_INT_ENABLE_OFFSET 0x4 @@ -4601,7 +4607,7 @@ #define GC_TIMEUS_CUR_MINOR_CNTR3_OFFSET 0x418 #define GC_TIMEUS_CUR_MINOR_CNTR3_DEFAULT 0x0 #define GC_TRNG_VERSION_OFFSET 0x0 -#define GC_TRNG_VERSION_DEFAULT 0x24011f6d +#define GC_TRNG_VERSION_DEFAULT 0x26012520 #define GC_TRNG_INT_ENABLE_OFFSET 0x4 #define GC_TRNG_INT_ENABLE_DEFAULT 0x0 #define GC_TRNG_INT_STATE_OFFSET 0x8 @@ -7741,1086 +7747,1106 @@ #define GC_FUSE_X_OSC_LDO_CTRL_VAL_SIZE 0x4 #define GC_FUSE_X_OSC_LDO_CTRL_VAL_DEFAULT 0x0 #define GC_FUSE_X_OSC_LDO_CTRL_VAL_OFFSET 0xf4 +#define GC_FUSE_TEMP_OFFSET_CAL_VAL_LSB 0x0 +#define GC_FUSE_TEMP_OFFSET_CAL_VAL_MASK 0xfff +#define GC_FUSE_TEMP_OFFSET_CAL_VAL_SIZE 0xc +#define GC_FUSE_TEMP_OFFSET_CAL_VAL_DEFAULT 0x0 +#define GC_FUSE_TEMP_OFFSET_CAL_VAL_OFFSET 0xf8 +#define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_LSB 0x0 +#define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_MASK 0x7 +#define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_SIZE 0x3 +#define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_DEFAULT 0x0 +#define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_OFFSET 0xfc +#define GC_FUSE_TRNG_LDO_CTRL_VAL_LSB 0x0 +#define GC_FUSE_TRNG_LDO_CTRL_VAL_MASK 0x1f +#define GC_FUSE_TRNG_LDO_CTRL_VAL_SIZE 0x5 +#define GC_FUSE_TRNG_LDO_CTRL_VAL_DEFAULT 0x0 +#define GC_FUSE_TRNG_LDO_CTRL_VAL_OFFSET 0x100 +#define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_LSB 0x0 +#define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_MASK 0x7 +#define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_SIZE 0x3 +#define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_DEFAULT 0x0 +#define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_OFFSET 0x104 +#define GC_FUSE_TRNG_ANALOG_CTRL_VAL_LSB 0x0 +#define GC_FUSE_TRNG_ANALOG_CTRL_VAL_MASK 0x7 +#define GC_FUSE_TRNG_ANALOG_CTRL_VAL_SIZE 0x3 +#define GC_FUSE_TRNG_ANALOG_CTRL_VAL_DEFAULT 0x0 +#define GC_FUSE_TRNG_ANALOG_CTRL_VAL_OFFSET 0x108 #define GC_FUSE_EXT_XTAL_PDB_VAL_LSB 0x0 #define GC_FUSE_EXT_XTAL_PDB_VAL_MASK 0x3 #define GC_FUSE_EXT_XTAL_PDB_VAL_SIZE 0x2 #define GC_FUSE_EXT_XTAL_PDB_VAL_DEFAULT 0x0 -#define GC_FUSE_EXT_XTAL_PDB_VAL_OFFSET 0xf8 +#define GC_FUSE_EXT_XTAL_PDB_VAL_OFFSET 0x10c #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_LSB 0x0 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_MASK 0x7 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_SIZE 0x3 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_DEFAULT 0x0 -#define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_OFFSET 0xfc +#define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_OFFSET 0x110 #define GC_FUSE_OBFUSCATION_EN_VAL_LSB 0x0 #define GC_FUSE_OBFUSCATION_EN_VAL_MASK 0x7 #define GC_FUSE_OBFUSCATION_EN_VAL_SIZE 0x3 #define GC_FUSE_OBFUSCATION_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_OBFUSCATION_EN_VAL_OFFSET 0x100 +#define GC_FUSE_OBFUSCATION_EN_VAL_OFFSET 0x114 #define GC_FUSE_JITTER_CLK_EN_VAL_LSB 0x0 #define GC_FUSE_JITTER_CLK_EN_VAL_MASK 0x7 #define GC_FUSE_JITTER_CLK_EN_VAL_SIZE 0x3 #define GC_FUSE_JITTER_CLK_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_JITTER_CLK_EN_VAL_OFFSET 0x104 +#define GC_FUSE_JITTER_CLK_EN_VAL_OFFSET 0x118 #define GC_FUSE_HIK_CREATE_LOCK_VAL_LSB 0x0 #define GC_FUSE_HIK_CREATE_LOCK_VAL_MASK 0x7 #define GC_FUSE_HIK_CREATE_LOCK_VAL_SIZE 0x3 #define GC_FUSE_HIK_CREATE_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_HIK_CREATE_LOCK_VAL_OFFSET 0x108 +#define GC_FUSE_HIK_CREATE_LOCK_VAL_OFFSET 0x11c #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_DEFAULT 0x0 -#define GC_FUSE_BNK2_INTG_CHKSUM_VAL_OFFSET 0x10c +#define GC_FUSE_BNK2_INTG_CHKSUM_VAL_OFFSET 0x120 #define GC_FUSE_BNK2_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_BNK2_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_BNK2_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_BNK2_INTG_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_BNK2_INTG_LOCK_VAL_OFFSET 0x110 +#define GC_FUSE_BNK2_INTG_LOCK_VAL_OFFSET 0x124 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_LSB 0x0 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_MASK 0x7 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_SIZE 0x3 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_DEFAULT 0x0 -#define GC_FUSE_TESTMODE_OTPW_DIS_VAL_OFFSET 0x114 +#define GC_FUSE_TESTMODE_OTPW_DIS_VAL_OFFSET 0x128 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_LSB 0x0 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_MASK 0x7 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_SIZE 0x3 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_OFFSET 0x118 +#define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_OFFSET 0x12c #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_LSB 0x0 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_MASK 0x7 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_SIZE 0x3 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_OFFSET 0x11c +#define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_OFFSET 0x130 #define GC_FUSE_ALERT_RSP_CFG_VAL_LSB 0x0 #define GC_FUSE_ALERT_RSP_CFG_VAL_MASK 0xff #define GC_FUSE_ALERT_RSP_CFG_VAL_SIZE 0x8 #define GC_FUSE_ALERT_RSP_CFG_VAL_DEFAULT 0x0 -#define GC_FUSE_ALERT_RSP_CFG_VAL_OFFSET 0x120 +#define GC_FUSE_ALERT_RSP_CFG_VAL_OFFSET 0x134 #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_DEFAULT 0x0 -#define GC_FUSE_BNK3_INTG_CHKSUM_VAL_OFFSET 0x124 +#define GC_FUSE_BNK3_INTG_CHKSUM_VAL_OFFSET 0x138 #define GC_FUSE_BNK3_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_BNK3_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_BNK3_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_BNK3_INTG_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_BNK3_INTG_LOCK_VAL_OFFSET 0x128 +#define GC_FUSE_BNK3_INTG_LOCK_VAL_OFFSET 0x13c #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_OFFSET 0x12c +#define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_OFFSET 0x140 #define GC_FUSE_FW_DEFINED_DATA_BLK1_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK1_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK1_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK1_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK1_VAL_OFFSET 0x130 +#define GC_FUSE_FW_DEFINED_DATA_BLK1_VAL_OFFSET 0x144 #define GC_FUSE_FW_DEFINED_DATA_BLK2_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK2_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK2_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK2_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK2_VAL_OFFSET 0x134 +#define GC_FUSE_FW_DEFINED_DATA_BLK2_VAL_OFFSET 0x148 #define GC_FUSE_FW_DEFINED_DATA_BLK3_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK3_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK3_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK3_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK3_VAL_OFFSET 0x138 +#define GC_FUSE_FW_DEFINED_DATA_BLK3_VAL_OFFSET 0x14c #define GC_FUSE_FW_DEFINED_DATA_BLK4_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK4_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK4_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK4_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK4_VAL_OFFSET 0x13c +#define GC_FUSE_FW_DEFINED_DATA_BLK4_VAL_OFFSET 0x150 #define GC_FUSE_FW_DEFINED_DATA_BLK5_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK5_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK5_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK5_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK5_VAL_OFFSET 0x140 +#define GC_FUSE_FW_DEFINED_DATA_BLK5_VAL_OFFSET 0x154 #define GC_FUSE_FW_DEFINED_DATA_BLK6_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK6_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK6_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK6_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK6_VAL_OFFSET 0x144 +#define GC_FUSE_FW_DEFINED_DATA_BLK6_VAL_OFFSET 0x158 #define GC_FUSE_FW_DEFINED_DATA_BLK7_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK7_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK7_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK7_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK7_VAL_OFFSET 0x148 +#define GC_FUSE_FW_DEFINED_DATA_BLK7_VAL_OFFSET 0x15c #define GC_FUSE_FW_DEFINED_DATA_BLK8_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK8_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK8_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK8_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK8_VAL_OFFSET 0x14c +#define GC_FUSE_FW_DEFINED_DATA_BLK8_VAL_OFFSET 0x160 #define GC_FUSE_FW_DEFINED_DATA_BLK9_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK9_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK9_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK9_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK9_VAL_OFFSET 0x150 +#define GC_FUSE_FW_DEFINED_DATA_BLK9_VAL_OFFSET 0x164 #define GC_FUSE_FW_DEFINED_DATA_BLK10_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK10_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK10_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK10_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK10_VAL_OFFSET 0x154 +#define GC_FUSE_FW_DEFINED_DATA_BLK10_VAL_OFFSET 0x168 #define GC_FUSE_FW_DEFINED_DATA_BLK11_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK11_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK11_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK11_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_BLK11_VAL_OFFSET 0x158 +#define GC_FUSE_FW_DEFINED_DATA_BLK11_VAL_OFFSET 0x16c #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_LSB 0x0 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_MASK 0x1 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_SIZE 0x1 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_OFFSET 0x15c +#define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_OFFSET 0x170 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_LSB 0x0 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_MASK 0x7f #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_SIZE 0x7 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_OFFSET 0x160 +#define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_OFFSET 0x174 #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_LSB 0x0 #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_MASK 0xffff #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_SIZE 0x10 #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_OFFSET 0x164 +#define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_OFFSET 0x178 #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_LSB 0x0 #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_MASK 0xffff #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_SIZE 0x10 #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_OFFSET 0x168 +#define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_OFFSET 0x17c #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_LSB 0x0 #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_MASK 0xff #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_SIZE 0x8 #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_OFFSET 0x16c +#define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_OFFSET 0x180 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_LSB 0x0 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_MASK 0xffff #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_SIZE 0x10 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_OFFSET 0x170 +#define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_OFFSET 0x184 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_LSB 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_MASK 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_SIZE 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_OFFSET 0x174 +#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_OFFSET 0x188 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_LSB 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_MASK 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_SIZE 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_OFFSET 0x178 +#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_OFFSET 0x18c #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_LSB 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_MASK 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_SIZE 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_OFFSET 0x17c +#define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_OFFSET 0x190 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_OFFSET 0x180 +#define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_OFFSET 0x194 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_OFFSET 0x184 +#define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_OFFSET 0x198 #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_OFFSET 0x188 +#define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_OFFSET 0x19c #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_OFFSET 0x18c +#define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_OFFSET 0x1a0 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_OFFSET 0x190 +#define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_OFFSET 0x1a4 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_OFFSET 0x194 +#define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_OFFSET 0x1a8 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_LSB 0x0 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_MASK 0x1 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_SIZE 0x1 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_OFFSET 0x198 +#define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_OFFSET 0x1ac #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_LSB 0x0 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_MASK 0x1 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_SIZE 0x1 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_OFFSET 0x19c +#define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_OFFSET 0x1b0 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_MASK 0x1 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_SIZE 0x1 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_OFFSET 0x1a0 +#define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_OFFSET 0x1b4 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_MASK 0x1 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_SIZE 0x1 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_OFFSET 0x1a4 +#define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_OFFSET 0x1b8 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_OFFSET 0x1a8 +#define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_OFFSET 0x1bc #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_PWRB_IN_VAL_OFFSET 0x1ac +#define GC_FUSE_RBOX_POL_PWRB_IN_VAL_OFFSET 0x1c0 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_OFFSET 0x1b0 +#define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_OFFSET 0x1c4 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_KEY0_IN_VAL_OFFSET 0x1b4 +#define GC_FUSE_RBOX_POL_KEY0_IN_VAL_OFFSET 0x1c8 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_OFFSET 0x1b8 +#define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_OFFSET 0x1cc #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_KEY1_IN_VAL_OFFSET 0x1bc +#define GC_FUSE_RBOX_POL_KEY1_IN_VAL_OFFSET 0x1d0 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_OFFSET 0x1c0 +#define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_OFFSET 0x1d4 #define GC_FUSE_RBOX_POL_EC_RST_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_EC_RST_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_EC_RST_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_EC_RST_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_EC_RST_VAL_OFFSET 0x1c4 +#define GC_FUSE_RBOX_POL_EC_RST_VAL_OFFSET 0x1d8 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_OFFSET 0x1c8 +#define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_OFFSET 0x1dc #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_OFFSET 0x1cc +#define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_OFFSET 0x1e0 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_OFFSET 0x1d0 +#define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_OFFSET 0x1e4 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_OFFSET 0x1d4 +#define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_OFFSET 0x1e8 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_OFFSET 0x1d8 +#define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_OFFSET 0x1ec #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_OFFSET 0x1dc +#define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_OFFSET 0x1f0 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_OFFSET 0x1e0 +#define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_OFFSET 0x1f4 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_OFFSET 0x1e4 +#define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_OFFSET 0x1f8 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_OFFSET 0x1e8 +#define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_OFFSET 0x1fc #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_OFFSET 0x1ec +#define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_OFFSET 0x200 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_OFFSET 0x1f0 +#define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_OFFSET 0x204 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_OFFSET 0x1f4 +#define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_OFFSET 0x208 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_OFFSET 0x1f8 +#define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_OFFSET 0x20c #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_DEFAULT 0x0 -#define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_OFFSET 0x1fc +#define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_OFFSET 0x210 #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_DEFAULT 0x0 -#define GC_FUSE_BNK4_INTG_CHKSUM_VAL_OFFSET 0x200 +#define GC_FUSE_BNK4_INTG_CHKSUM_VAL_OFFSET 0x214 #define GC_FUSE_BNK4_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_BNK4_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_BNK4_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_BNK4_INTG_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_BNK4_INTG_LOCK_VAL_OFFSET 0x204 +#define GC_FUSE_BNK4_INTG_LOCK_VAL_OFFSET 0x218 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_OFFSET 0x208 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_OFFSET 0x21c #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_OFFSET 0x20c +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_OFFSET 0x220 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_OFFSET 0x210 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_OFFSET 0x224 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_OFFSET 0x214 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_OFFSET 0x228 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_OFFSET 0x218 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_OFFSET 0x22c #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_OFFSET 0x21c +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_OFFSET 0x230 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_OFFSET 0x220 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_OFFSET 0x234 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_VAL_LSB 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_VAL_MASK 0xff -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_VAL_SIZE 0x8 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_VAL_MASK 0x1f +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_VAL_SIZE 0x5 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_VAL_OFFSET 0x224 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK8_VAL_LSB 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK8_VAL_MASK 0xff -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK8_VAL_SIZE 0x8 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK8_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK8_VAL_OFFSET 0x228 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK9_VAL_LSB 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK9_VAL_MASK 0xff -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK9_VAL_SIZE 0x8 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK9_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK9_VAL_OFFSET 0x22c -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK10_VAL_LSB 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK10_VAL_MASK 0x7f -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK10_VAL_SIZE 0x7 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK10_VAL_DEFAULT 0x0 -#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK10_VAL_OFFSET 0x230 +#define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK7_VAL_OFFSET 0x238 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_OFFSET 0x234 +#define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_OFFSET 0x23c #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_OFFSET 0x238 +#define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_OFFSET 0x240 #define GC_FUSE_PROG_DS_GRP0_VAL_LSB 0x0 #define GC_FUSE_PROG_DS_GRP0_VAL_MASK 0x1ff #define GC_FUSE_PROG_DS_GRP0_VAL_SIZE 0x9 #define GC_FUSE_PROG_DS_GRP0_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_DS_GRP0_VAL_OFFSET 0x23c +#define GC_FUSE_PROG_DS_GRP0_VAL_OFFSET 0x244 #define GC_FUSE_PROG_DS_GRP1_VAL_LSB 0x0 #define GC_FUSE_PROG_DS_GRP1_VAL_MASK 0x1ff #define GC_FUSE_PROG_DS_GRP1_VAL_SIZE 0x9 #define GC_FUSE_PROG_DS_GRP1_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_DS_GRP1_VAL_OFFSET 0x240 +#define GC_FUSE_PROG_DS_GRP1_VAL_OFFSET 0x248 #define GC_FUSE_PROG_DS_GRP2_VAL_LSB 0x0 #define GC_FUSE_PROG_DS_GRP2_VAL_MASK 0x1ff #define GC_FUSE_PROG_DS_GRP2_VAL_SIZE 0x9 #define GC_FUSE_PROG_DS_GRP2_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_DS_GRP2_VAL_OFFSET 0x244 +#define GC_FUSE_PROG_DS_GRP2_VAL_OFFSET 0x24c #define GC_FUSE_PROG_DEV_ID0_VAL_LSB 0x0 #define GC_FUSE_PROG_DEV_ID0_VAL_MASK 0xffffffff #define GC_FUSE_PROG_DEV_ID0_VAL_SIZE 0x20 #define GC_FUSE_PROG_DEV_ID0_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_DEV_ID0_VAL_OFFSET 0x248 +#define GC_FUSE_PROG_DEV_ID0_VAL_OFFSET 0x250 #define GC_FUSE_PROG_DEV_ID1_VAL_LSB 0x0 #define GC_FUSE_PROG_DEV_ID1_VAL_MASK 0xffffffff #define GC_FUSE_PROG_DEV_ID1_VAL_SIZE 0x20 #define GC_FUSE_PROG_DEV_ID1_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_DEV_ID1_VAL_OFFSET 0x24c +#define GC_FUSE_PROG_DEV_ID1_VAL_OFFSET 0x254 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_OFFSET 0x250 +#define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_OFFSET 0x258 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_OFFSET 0x254 +#define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_OFFSET 0x25c #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB0_POST_OVRD_VAL_OFFSET 0x258 +#define GC_FUSE_PROG_LB0_POST_OVRD_VAL_OFFSET 0x260 #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_OFFSET 0x25c +#define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_OFFSET 0x264 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_OFFSET 0x260 +#define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_OFFSET 0x268 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_OFFSET 0x264 +#define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_OFFSET 0x26c #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB1_POST_OVRD_VAL_OFFSET 0x268 +#define GC_FUSE_PROG_LB1_POST_OVRD_VAL_OFFSET 0x270 #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_OFFSET 0x26c +#define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_OFFSET 0x274 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_OFFSET 0x270 +#define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_OFFSET 0x278 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_OFFSET 0x274 +#define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_OFFSET 0x27c #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB2_POST_OVRD_VAL_OFFSET 0x278 +#define GC_FUSE_PROG_LB2_POST_OVRD_VAL_OFFSET 0x280 #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_OFFSET 0x27c +#define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_OFFSET 0x284 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_OFFSET 0x280 +#define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_OFFSET 0x288 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_OFFSET 0x284 +#define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_OFFSET 0x28c #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB3_POST_OVRD_VAL_OFFSET 0x288 +#define GC_FUSE_PROG_LB3_POST_OVRD_VAL_OFFSET 0x290 #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_OFFSET 0x28c +#define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_OFFSET 0x294 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_OFFSET 0x290 +#define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_OFFSET 0x298 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_OFFSET 0x294 +#define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_OFFSET 0x29c #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_LSB 0x0 #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_MASK 0x1ffffff #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_SIZE 0x19 #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_OFFSET 0x298 +#define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_OFFSET 0x2a0 #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_LSB 0x0 #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_MASK 0xffff #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_SIZE 0x10 #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_OFFSET 0x29c +#define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_OFFSET 0x2a4 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_MASK 0x7 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_SIZE 0x3 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_OFFSET 0x2a0 +#define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_OFFSET 0x2a8 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_MASK 0x7 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_SIZE 0x3 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_OFFSET 0x2a4 +#define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_OFFSET 0x2ac #define GC_FUSE_PROG_TAP_DISABLE_VAL_LSB 0x0 #define GC_FUSE_PROG_TAP_DISABLE_VAL_MASK 0x7 #define GC_FUSE_PROG_TAP_DISABLE_VAL_SIZE 0x3 #define GC_FUSE_PROG_TAP_DISABLE_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_TAP_DISABLE_VAL_OFFSET 0x2a8 +#define GC_FUSE_PROG_TAP_DISABLE_VAL_OFFSET 0x2b0 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_OFFSET 0x2ac +#define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_OFFSET 0x2b4 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_OFFSET 0x2b0 +#define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_OFFSET 0x2b8 #define GC_FUSE_PROG_PKG_ID_VAL_LSB 0x0 #define GC_FUSE_PROG_PKG_ID_VAL_MASK 0x7 #define GC_FUSE_PROG_PKG_ID_VAL_SIZE 0x3 #define GC_FUSE_PROG_PKG_ID_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_PKG_ID_VAL_OFFSET 0x2b4 +#define GC_FUSE_PROG_PKG_ID_VAL_OFFSET 0x2bc #define GC_FUSE_PROG_BIN_ID_VAL_LSB 0x0 #define GC_FUSE_PROG_BIN_ID_VAL_MASK 0x7 #define GC_FUSE_PROG_BIN_ID_VAL_SIZE 0x3 #define GC_FUSE_PROG_BIN_ID_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BIN_ID_VAL_OFFSET 0x2b8 +#define GC_FUSE_PROG_BIN_ID_VAL_OFFSET 0x2c0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_OFFSET 0x2bc +#define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_OFFSET 0x2c4 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_OFFSET 0x2c0 +#define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_OFFSET 0x2c8 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_OFFSET 0x2c4 +#define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_OFFSET 0x2cc #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_OFFSET 0x2c8 +#define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_OFFSET 0x2d0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_OFFSET 0x2cc +#define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_OFFSET 0x2d4 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_OFFSET 0x2d0 +#define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_OFFSET 0x2d8 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_MASK 0x1f #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_SIZE 0x5 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_OFFSET 0x2d4 +#define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_OFFSET 0x2dc #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_OFFSET 0x2d8 +#define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_OFFSET 0x2e0 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_VAL_OFFSET 0x2dc +#define GC_FUSE_PROG_RC_RTC_OSC32K_CC_TRIM_VAL_OFFSET 0x2e4 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_VAL_OFFSET 0x2e0 +#define GC_FUSE_PROG_RC_RTC_OSC32K_CC_EN_VAL_OFFSET 0x2e8 #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_OFFSET 0x2e4 +#define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_OFFSET 0x2ec #define GC_FUSE_PROG_SEL_VREF_REG_VAL_LSB 0x0 #define GC_FUSE_PROG_SEL_VREF_REG_VAL_MASK 0xf #define GC_FUSE_PROG_SEL_VREF_REG_VAL_SIZE 0x4 #define GC_FUSE_PROG_SEL_VREF_REG_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_SEL_VREF_REG_VAL_OFFSET 0x2e8 +#define GC_FUSE_PROG_SEL_VREF_REG_VAL_OFFSET 0x2f0 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_OFFSET 0x2ec +#define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_OFFSET 0x2f4 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_LSB 0x0 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_MASK 0x7 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_SIZE 0x3 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_OFFSET 0x2f0 +#define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_OFFSET 0x2f8 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_OFFSET 0x2f4 +#define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_OFFSET 0x2fc #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_LSB 0x0 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_MASK 0xf #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_SIZE 0x4 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_OFFSET 0x2f8 +#define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_OFFSET 0x300 +#define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_LSB 0x0 +#define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_MASK 0xfff +#define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_SIZE 0xc +#define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_DEFAULT 0x0 +#define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_OFFSET 0x304 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_LSB 0x0 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_MASK 0x7 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_SIZE 0x3 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_DEFAULT 0x0 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_OFFSET 0x308 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_LSB 0x0 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_MASK 0x1f +#define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_SIZE 0x5 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_DEFAULT 0x0 +#define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_OFFSET 0x30c +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_LSB 0x0 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_MASK 0x7 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_SIZE 0x3 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_DEFAULT 0x0 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_OFFSET 0x310 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_LSB 0x0 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_MASK 0x7 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_SIZE 0x3 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_DEFAULT 0x0 +#define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_OFFSET 0x314 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_LSB 0x0 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_MASK 0x3 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_SIZE 0x2 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_OFFSET 0x2fc +#define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_OFFSET 0x318 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_LSB 0x0 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_MASK 0x7 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_SIZE 0x3 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_OFFSET 0x300 +#define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_OFFSET 0x31c #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBFUSCATION_EN_VAL_OFFSET 0x304 +#define GC_FUSE_PROG_OBFUSCATION_EN_VAL_OFFSET 0x320 #define GC_FUSE_PROG_JITTER_CLK_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_JITTER_CLK_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_JITTER_CLK_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_JITTER_CLK_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_JITTER_CLK_EN_VAL_OFFSET 0x308 +#define GC_FUSE_PROG_JITTER_CLK_EN_VAL_OFFSET 0x324 #define GC_FUSE_PROG_OBS0_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS0_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS0_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS0_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS0_VAL_OFFSET 0x30c +#define GC_FUSE_PROG_OBS0_VAL_OFFSET 0x328 #define GC_FUSE_PROG_OBS1_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS1_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS1_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS1_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS1_VAL_OFFSET 0x310 +#define GC_FUSE_PROG_OBS1_VAL_OFFSET 0x32c #define GC_FUSE_PROG_OBS2_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS2_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS2_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS2_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS2_VAL_OFFSET 0x314 +#define GC_FUSE_PROG_OBS2_VAL_OFFSET 0x330 #define GC_FUSE_PROG_OBS3_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS3_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS3_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS3_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS3_VAL_OFFSET 0x318 +#define GC_FUSE_PROG_OBS3_VAL_OFFSET 0x334 #define GC_FUSE_PROG_OBS4_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS4_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS4_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS4_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS4_VAL_OFFSET 0x31c +#define GC_FUSE_PROG_OBS4_VAL_OFFSET 0x338 #define GC_FUSE_PROG_OBS5_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS5_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS5_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS5_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS5_VAL_OFFSET 0x320 +#define GC_FUSE_PROG_OBS5_VAL_OFFSET 0x33c #define GC_FUSE_PROG_OBS6_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS6_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS6_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS6_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS6_VAL_OFFSET 0x324 +#define GC_FUSE_PROG_OBS6_VAL_OFFSET 0x340 #define GC_FUSE_PROG_OBS7_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS7_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS7_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS7_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_OBS7_VAL_OFFSET 0x328 +#define GC_FUSE_PROG_OBS7_VAL_OFFSET 0x344 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_OFFSET 0x32c +#define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_OFFSET 0x348 #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_OFFSET 0x330 +#define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_OFFSET 0x34c #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_OFFSET 0x334 +#define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_OFFSET 0x350 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_MASK 0x7 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_SIZE 0x3 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_OFFSET 0x338 +#define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_OFFSET 0x354 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_OFFSET 0x33c +#define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_OFFSET 0x358 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_OFFSET 0x340 +#define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_OFFSET 0x35c #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_LSB 0x0 #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_MASK 0xff #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_SIZE 0x8 #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_OFFSET 0x344 +#define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_OFFSET 0x360 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_OFFSET 0x348 +#define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_OFFSET 0x364 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_OFFSET 0x34c +#define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_OFFSET 0x368 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_OFFSET 0x350 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_OFFSET 0x36c #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_VAL_OFFSET 0x354 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK1_VAL_OFFSET 0x370 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_VAL_OFFSET 0x358 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK2_VAL_OFFSET 0x374 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_VAL_OFFSET 0x35c +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK3_VAL_OFFSET 0x378 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_VAL_OFFSET 0x360 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK4_VAL_OFFSET 0x37c #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_VAL_OFFSET 0x364 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK5_VAL_OFFSET 0x380 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_VAL_OFFSET 0x368 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK6_VAL_OFFSET 0x384 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_VAL_OFFSET 0x36c +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK7_VAL_OFFSET 0x388 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_VAL_OFFSET 0x370 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK8_VAL_OFFSET 0x38c #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_VAL_OFFSET 0x374 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK9_VAL_OFFSET 0x390 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_VAL_OFFSET 0x378 +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK10_VAL_OFFSET 0x394 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_VAL_OFFSET 0x37c +#define GC_FUSE_PROG_FW_DEFINED_DATA_BLK11_VAL_OFFSET 0x398 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_OFFSET 0x380 +#define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_OFFSET 0x39c #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_MASK 0x7f #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_SIZE 0x7 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_OFFSET 0x384 +#define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_OFFSET 0x3a0 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_MASK 0xffff #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_SIZE 0x10 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_OFFSET 0x388 +#define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_OFFSET 0x3a4 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_MASK 0xffff #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_SIZE 0x10 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_OFFSET 0x38c +#define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_OFFSET 0x3a8 #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_OFFSET 0x390 +#define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_OFFSET 0x3ac #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_MASK 0xffff #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_SIZE 0x10 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_OFFSET 0x394 +#define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_OFFSET 0x3b0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_OFFSET 0x398 +#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_OFFSET 0x3b4 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_OFFSET 0x39c +#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_OFFSET 0x3b8 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_OFFSET 0x3a0 +#define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_OFFSET 0x3bc #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_OFFSET 0x3a4 +#define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_OFFSET 0x3c0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_OFFSET 0x3a8 +#define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_OFFSET 0x3c4 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_OFFSET 0x3ac +#define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_OFFSET 0x3c8 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_OFFSET 0x3b0 +#define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_OFFSET 0x3cc #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_OFFSET 0x3b4 +#define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_OFFSET 0x3d0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_OFFSET 0x3b8 +#define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_OFFSET 0x3d4 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_OFFSET 0x3bc +#define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_OFFSET 0x3d8 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_OFFSET 0x3c0 +#define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_OFFSET 0x3dc #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_OFFSET 0x3c4 +#define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_OFFSET 0x3e0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_OFFSET 0x3c8 +#define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_OFFSET 0x3e4 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_OFFSET 0x3cc +#define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_OFFSET 0x3e8 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_OFFSET 0x3d0 +#define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_OFFSET 0x3ec #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_OFFSET 0x3d4 +#define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_OFFSET 0x3f0 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_OFFSET 0x3d8 +#define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_OFFSET 0x3f4 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_OFFSET 0x3dc +#define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_OFFSET 0x3f8 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_OFFSET 0x3e0 +#define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_OFFSET 0x3fc #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_OFFSET 0x3e4 +#define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_OFFSET 0x400 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_OFFSET 0x3e8 +#define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_OFFSET 0x404 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_OFFSET 0x3ec +#define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_OFFSET 0x408 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_OFFSET 0x3f0 +#define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_OFFSET 0x40c #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_OFFSET 0x3f4 +#define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_OFFSET 0x410 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_OFFSET 0x3f8 +#define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_OFFSET 0x414 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_OFFSET 0x3fc +#define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_OFFSET 0x418 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_OFFSET 0x400 +#define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_OFFSET 0x41c #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_OFFSET 0x404 +#define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_OFFSET 0x420 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_OFFSET 0x408 +#define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_OFFSET 0x424 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_OFFSET 0x40c +#define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_OFFSET 0x428 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_OFFSET 0x410 +#define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_OFFSET 0x42c #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_OFFSET 0x414 +#define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_OFFSET 0x430 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_OFFSET 0x418 +#define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_OFFSET 0x434 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_OFFSET 0x41c +#define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_OFFSET 0x438 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_OFFSET 0x420 +#define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_OFFSET 0x43c #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_OFFSET 0x424 +#define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_OFFSET 0x440 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_OFFSET 0x428 +#define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_OFFSET 0x444 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_OFFSET 0x42c +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_OFFSET 0x448 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_OFFSET 0x430 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_OFFSET 0x44c #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_OFFSET 0x434 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_OFFSET 0x450 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_OFFSET 0x438 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_OFFSET 0x454 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_OFFSET 0x43c +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_OFFSET 0x458 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_OFFSET 0x440 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_OFFSET 0x45c #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_OFFSET 0x444 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_OFFSET 0x460 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_VAL_LSB 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_VAL_MASK 0xff -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_VAL_SIZE 0x8 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_VAL_MASK 0x1f +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_VAL_SIZE 0x5 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_VAL_OFFSET 0x448 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK8_VAL_LSB 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK8_VAL_MASK 0xff -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK8_VAL_SIZE 0x8 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK8_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK8_VAL_OFFSET 0x44c -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK9_VAL_LSB 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK9_VAL_MASK 0xff -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK9_VAL_SIZE 0x8 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK9_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK9_VAL_OFFSET 0x450 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK10_VAL_LSB 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK10_VAL_MASK 0x7f -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK10_VAL_SIZE 0x7 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK10_VAL_DEFAULT 0x0 -#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK10_VAL_OFFSET 0x454 +#define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK7_VAL_OFFSET 0x464 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_EN_SIZE 0x1 @@ -9241,126 +9267,126 @@ #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_WR_EN_OFFSET 0x6c -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_EN_LSB 0x0 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_EN_MASK 0x1 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_EN_OFFSET 0x70 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_RD_EN_LSB 0x1 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_RD_EN_MASK 0x2 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_RD_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_RD_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_RD_EN_OFFSET 0x70 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_WR_EN_LSB 0x2 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_WR_EN_MASK 0x4 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_WR_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_WR_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION0_CTRL_WR_EN_OFFSET 0x70 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_EN_LSB 0x0 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_EN_MASK 0x1 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_EN_OFFSET 0x74 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_RD_EN_LSB 0x1 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_RD_EN_MASK 0x2 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_RD_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_RD_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_RD_EN_OFFSET 0x74 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_WR_EN_LSB 0x2 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_WR_EN_MASK 0x4 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_WR_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_WR_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION1_CTRL_WR_EN_OFFSET 0x74 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_EN_LSB 0x0 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_EN_MASK 0x1 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_EN_OFFSET 0x78 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_RD_EN_LSB 0x1 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_RD_EN_MASK 0x2 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_RD_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_RD_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_RD_EN_OFFSET 0x78 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_WR_EN_LSB 0x2 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_WR_EN_MASK 0x4 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_WR_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_WR_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION2_CTRL_WR_EN_OFFSET 0x78 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_EN_LSB 0x0 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_EN_MASK 0x1 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_EN_OFFSET 0x7c -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_RD_EN_LSB 0x1 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_RD_EN_MASK 0x2 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_RD_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_RD_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_RD_EN_OFFSET 0x7c -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_WR_EN_LSB 0x2 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_WR_EN_MASK 0x4 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_WR_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_WR_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH0_REGION3_CTRL_WR_EN_OFFSET 0x7c -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_EN_LSB 0x0 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_EN_MASK 0x1 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_EN_OFFSET 0x84 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_RD_EN_LSB 0x1 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_RD_EN_MASK 0x2 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_RD_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_RD_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_RD_EN_OFFSET 0x84 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_WR_EN_LSB 0x2 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_WR_EN_MASK 0x4 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_WR_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_WR_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION0_CTRL_WR_EN_OFFSET 0x84 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_EN_LSB 0x0 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_EN_MASK 0x1 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_EN_OFFSET 0x88 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_RD_EN_LSB 0x1 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_RD_EN_MASK 0x2 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_RD_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_RD_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_RD_EN_OFFSET 0x88 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_WR_EN_LSB 0x2 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_WR_EN_MASK 0x4 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_WR_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_WR_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION1_CTRL_WR_EN_OFFSET 0x88 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_EN_LSB 0x0 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_EN_MASK 0x1 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_EN_OFFSET 0x8c -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_RD_EN_LSB 0x1 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_RD_EN_MASK 0x2 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_RD_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_RD_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_RD_EN_OFFSET 0x8c -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_WR_EN_LSB 0x2 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_WR_EN_MASK 0x4 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_WR_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_WR_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION2_CTRL_WR_EN_OFFSET 0x8c -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_EN_LSB 0x0 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_EN_MASK 0x1 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_EN_OFFSET 0x90 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_RD_EN_LSB 0x1 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_RD_EN_MASK 0x2 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_RD_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_RD_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_RD_EN_OFFSET 0x90 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_WR_EN_LSB 0x2 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_WR_EN_MASK 0x4 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_WR_EN_SIZE 0x1 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_WR_EN_DEFAULT 0x0 -#define GC_GLOBALSEC_FLASH1_REGION3_CTRL_WR_EN_OFFSET 0x90 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_LSB 0x0 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_MASK 0x1 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_OFFSET 0x70 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_LSB 0x1 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_MASK 0x2 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_OFFSET 0x70 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_LSB 0x2 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_MASK 0x4 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_OFFSET 0x70 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_LSB 0x0 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_MASK 0x1 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_OFFSET 0x74 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_LSB 0x1 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_MASK 0x2 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_OFFSET 0x74 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_LSB 0x2 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_MASK 0x4 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_OFFSET 0x74 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_LSB 0x0 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_MASK 0x1 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_OFFSET 0x78 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_LSB 0x1 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_MASK 0x2 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_OFFSET 0x78 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_LSB 0x2 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_MASK 0x4 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_OFFSET 0x78 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_LSB 0x0 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_MASK 0x1 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_OFFSET 0x7c +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_LSB 0x1 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_MASK 0x2 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_OFFSET 0x7c +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_LSB 0x2 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_MASK 0x4 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_OFFSET 0x7c +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_LSB 0x0 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_MASK 0x1 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_OFFSET 0x80 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_LSB 0x1 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_MASK 0x2 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_OFFSET 0x80 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_LSB 0x2 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_MASK 0x4 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_OFFSET 0x80 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_LSB 0x0 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_MASK 0x1 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_OFFSET 0x84 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_LSB 0x1 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_MASK 0x2 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_OFFSET 0x84 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_LSB 0x2 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_MASK 0x4 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_OFFSET 0x84 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_LSB 0x0 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_MASK 0x1 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_OFFSET 0x88 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_LSB 0x1 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_MASK 0x2 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_OFFSET 0x88 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_LSB 0x2 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_MASK 0x4 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_OFFSET 0x88 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_LSB 0x0 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_MASK 0x1 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_OFFSET 0x8c +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_LSB 0x1 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_MASK 0x2 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_OFFSET 0x8c +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_LSB 0x2 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_MASK 0x4 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_SIZE 0x1 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_DEFAULT 0x0 +#define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_OFFSET 0x8c #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_EN_SIZE 0x1 @@ -14221,8 +14247,13 @@ #define GC_PMU_SW_PDB_SECURE_BATMON_SIZE 0x1 #define GC_PMU_SW_PDB_SECURE_BATMON_DEFAULT 0x0 #define GC_PMU_SW_PDB_SECURE_BATMON_OFFSET 0x34 -#define GC_PMU_SW_PDB_SECURE_XTL_LSB 0x1 -#define GC_PMU_SW_PDB_SECURE_XTL_MASK 0x2 +#define GC_PMU_SW_PDB_SECURE_BATMON_EN_LSB 0x1 +#define GC_PMU_SW_PDB_SECURE_BATMON_EN_MASK 0x2 +#define GC_PMU_SW_PDB_SECURE_BATMON_EN_SIZE 0x1 +#define GC_PMU_SW_PDB_SECURE_BATMON_EN_DEFAULT 0x0 +#define GC_PMU_SW_PDB_SECURE_BATMON_EN_OFFSET 0x34 +#define GC_PMU_SW_PDB_SECURE_XTL_LSB 0x2 +#define GC_PMU_SW_PDB_SECURE_XTL_MASK 0x4 #define GC_PMU_SW_PDB_SECURE_XTL_SIZE 0x1 #define GC_PMU_SW_PDB_SECURE_XTL_DEFAULT 0x0 #define GC_PMU_SW_PDB_SECURE_XTL_OFFSET 0x34 @@ -14252,7 +14283,7 @@ #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_LSB 0x0 #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_MASK 0x3 #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_SIZE 0x2 -#define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_DEFAULT 0x0 +#define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_DEFAULT 0x2 #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_OFFSET 0x44 #define GC_PMU_B_REG_DIG_CTRL_SPARE_LSB 0x2 #define GC_PMU_B_REG_DIG_CTRL_SPARE_MASK 0x3c @@ -14459,131 +14490,131 @@ #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_TIMER_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DGPIO0_CLK_LSB 0x7 -#define GC_PMU_PERICLKSET0_DGPIO0_CLK_MASK 0x80 +#define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_LSB 0x7 +#define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_MASK 0x80 +#define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_SIZE 0x1 +#define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_DEFAULT 0x1 +#define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_OFFSET 0x60 +#define GC_PMU_PERICLKSET0_DGPIO0_CLK_LSB 0x8 +#define GC_PMU_PERICLKSET0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_PERICLKSET0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DGPIO0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DGPIO1_CLK_LSB 0x8 -#define GC_PMU_PERICLKSET0_DGPIO1_CLK_MASK 0x100 +#define GC_PMU_PERICLKSET0_DGPIO1_CLK_LSB 0x9 +#define GC_PMU_PERICLKSET0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_PERICLKSET0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DGPIO1_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_LSB 0x9 -#define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_MASK 0x200 +#define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_LSB 0xa +#define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_LSB 0xa -#define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_MASK 0x400 +#define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_LSB 0xb +#define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DI2CS0_CLK_LSB 0xb -#define GC_PMU_PERICLKSET0_DI2CS0_CLK_MASK 0x800 +#define GC_PMU_PERICLKSET0_DI2CS0_CLK_LSB 0xc +#define GC_PMU_PERICLKSET0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_PERICLKSET0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DI2CS0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_LSB 0xc -#define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_MASK 0x1000 +#define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_LSB 0xd +#define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DMAU_CLK_LSB 0xd -#define GC_PMU_PERICLKSET0_DMAU_CLK_MASK 0x2000 +#define GC_PMU_PERICLKSET0_DMAU_CLK_LSB 0xe +#define GC_PMU_PERICLKSET0_DMAU_CLK_MASK 0x4000 #define GC_PMU_PERICLKSET0_DMAU_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DMAU_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DMAU_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_LSB 0xe -#define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_MASK 0x4000 +#define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_LSB 0xf +#define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_MASK 0x8000 #define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_LSB 0xf -#define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_MASK 0x8000 +#define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_LSB 0x10 +#define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_MASK 0x10000 #define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_LSB 0x10 -#define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_MASK 0x10000 +#define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_LSB 0x11 +#define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_MASK 0x20000 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_LSB 0x11 -#define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_MASK 0x20000 +#define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_LSB 0x12 +#define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_MASK 0x40000 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DPINMUX_CLK_LSB 0x12 -#define GC_PMU_PERICLKSET0_DPINMUX_CLK_MASK 0x40000 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_LSB 0x13 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_MASK 0x80000 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_SIZE 0x1 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_DEFAULT 0x1 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_OFFSET 0x60 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_LSB 0x14 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_MASK 0x100000 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_SIZE 0x1 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_DEFAULT 0x1 +#define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_OFFSET 0x60 +#define GC_PMU_PERICLKSET0_DPINMUX_CLK_LSB 0x15 +#define GC_PMU_PERICLKSET0_DPINMUX_CLK_MASK 0x200000 #define GC_PMU_PERICLKSET0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPINMUX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPINMUX_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DPMU_CLK_LSB 0x13 -#define GC_PMU_PERICLKSET0_DPMU_CLK_MASK 0x80000 +#define GC_PMU_PERICLKSET0_DPMU_CLK_LSB 0x16 +#define GC_PMU_PERICLKSET0_DPMU_CLK_MASK 0x400000 #define GC_PMU_PERICLKSET0_DPMU_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPMU_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPMU_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DRBOX0_CLK_LSB 0x14 -#define GC_PMU_PERICLKSET0_DRBOX0_CLK_MASK 0x100000 +#define GC_PMU_PERICLKSET0_DRBOX0_CLK_LSB 0x17 +#define GC_PMU_PERICLKSET0_DRBOX0_CLK_MASK 0x800000 #define GC_PMU_PERICLKSET0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DRBOX0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DRDD0_CLK_LSB 0x15 -#define GC_PMU_PERICLKSET0_DRDD0_CLK_MASK 0x200000 +#define GC_PMU_PERICLKSET0_DRDD0_CLK_LSB 0x18 +#define GC_PMU_PERICLKSET0_DRDD0_CLK_MASK 0x1000000 #define GC_PMU_PERICLKSET0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DRDD0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DRTC0_CLK_LSB 0x16 -#define GC_PMU_PERICLKSET0_DRTC0_CLK_MASK 0x400000 +#define GC_PMU_PERICLKSET0_DRTC0_CLK_LSB 0x19 +#define GC_PMU_PERICLKSET0_DRTC0_CLK_MASK 0x2000000 #define GC_PMU_PERICLKSET0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DRTC0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DRTC0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_LSB 0x17 -#define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_MASK 0x800000 +#define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_LSB 0x1a +#define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_MASK 0x4000000 #define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DSPI0_CLK_TIMER_LSB 0x18 -#define GC_PMU_PERICLKSET0_DSPI0_CLK_TIMER_MASK 0x1000000 -#define GC_PMU_PERICLKSET0_DSPI0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERICLKSET0_DSPI0_CLK_TIMER_DEFAULT 0x1 -#define GC_PMU_PERICLKSET0_DSPI0_CLK_TIMER_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DSPI1_CLK_TIMER_LSB 0x19 -#define GC_PMU_PERICLKSET0_DSPI1_CLK_TIMER_MASK 0x2000000 -#define GC_PMU_PERICLKSET0_DSPI1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERICLKSET0_DSPI1_CLK_TIMER_DEFAULT 0x1 -#define GC_PMU_PERICLKSET0_DSPI1_CLK_TIMER_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DSPS0_CLK_LSB 0x1a -#define GC_PMU_PERICLKSET0_DSPS0_CLK_MASK 0x4000000 +#define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_LSB 0x1b +#define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_MASK 0x8000000 +#define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_SIZE 0x1 +#define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_DEFAULT 0x1 +#define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_OFFSET 0x60 +#define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_LSB 0x1c +#define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_MASK 0x10000000 +#define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_SIZE 0x1 +#define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_DEFAULT 0x1 +#define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_OFFSET 0x60 +#define GC_PMU_PERICLKSET0_DSPS0_CLK_LSB 0x1d +#define GC_PMU_PERICLKSET0_DSPS0_CLK_MASK 0x20000000 #define GC_PMU_PERICLKSET0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DSPS0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DSPS0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_LSB 0x1b -#define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_MASK 0x8000000 +#define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_LSB 0x1e +#define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_MASK 0x40000000 #define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DSWDP0_CLK_LSB 0x1c -#define GC_PMU_PERICLKSET0_DSWDP0_CLK_MASK 0x10000000 +#define GC_PMU_PERICLKSET0_DSWDP0_CLK_LSB 0x1f +#define GC_PMU_PERICLKSET0_DSWDP0_CLK_MASK 0x80000000 #define GC_PMU_PERICLKSET0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DSWDP0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DSWDP0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DTEMP0_CLK_LSB 0x1d -#define GC_PMU_PERICLKSET0_DTEMP0_CLK_MASK 0x20000000 -#define GC_PMU_PERICLKSET0_DTEMP0_CLK_SIZE 0x1 -#define GC_PMU_PERICLKSET0_DTEMP0_CLK_DEFAULT 0x1 -#define GC_PMU_PERICLKSET0_DTEMP0_CLK_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DTIMEHS0_CLK_TIMER_LSB 0x1e -#define GC_PMU_PERICLKSET0_DTIMEHS0_CLK_TIMER_MASK 0x40000000 -#define GC_PMU_PERICLKSET0_DTIMEHS0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERICLKSET0_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERICLKSET0_DTIMEHS0_CLK_TIMER_OFFSET 0x60 -#define GC_PMU_PERICLKSET0_DTIMEHS1_CLK_TIMER_LSB 0x1f -#define GC_PMU_PERICLKSET0_DTIMEHS1_CLK_TIMER_MASK 0x80000000 -#define GC_PMU_PERICLKSET0_DTIMEHS1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERICLKSET0_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERICLKSET0_DTIMEHS1_CLK_TIMER_OFFSET 0x60 #define GC_PMU_PERICLKCLR0_DCAMO0_CLK_LSB 0x0 #define GC_PMU_PERICLKCLR0_DCAMO0_CLK_MASK 0x1 #define GC_PMU_PERICLKCLR0_DCAMO0_CLK_SIZE 0x1 @@ -14619,268 +14650,298 @@ #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DGPIO0_CLK_LSB 0x7 -#define GC_PMU_PERICLKCLR0_DGPIO0_CLK_MASK 0x80 +#define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_LSB 0x7 +#define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_MASK 0x80 +#define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_SIZE 0x1 +#define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_DEFAULT 0x1 +#define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_OFFSET 0x64 +#define GC_PMU_PERICLKCLR0_DGPIO0_CLK_LSB 0x8 +#define GC_PMU_PERICLKCLR0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_PERICLKCLR0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DGPIO0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DGPIO1_CLK_LSB 0x8 -#define GC_PMU_PERICLKCLR0_DGPIO1_CLK_MASK 0x100 +#define GC_PMU_PERICLKCLR0_DGPIO1_CLK_LSB 0x9 +#define GC_PMU_PERICLKCLR0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_PERICLKCLR0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DGPIO1_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_LSB 0x9 -#define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_MASK 0x200 +#define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_LSB 0xa +#define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_LSB 0xa -#define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_MASK 0x400 +#define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_LSB 0xb +#define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DI2CS0_CLK_LSB 0xb -#define GC_PMU_PERICLKCLR0_DI2CS0_CLK_MASK 0x800 +#define GC_PMU_PERICLKCLR0_DI2CS0_CLK_LSB 0xc +#define GC_PMU_PERICLKCLR0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_PERICLKCLR0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DI2CS0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_LSB 0xc -#define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_MASK 0x1000 +#define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_LSB 0xd +#define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DMAU_CLK_LSB 0xd -#define GC_PMU_PERICLKCLR0_DMAU_CLK_MASK 0x2000 +#define GC_PMU_PERICLKCLR0_DMAU_CLK_LSB 0xe +#define GC_PMU_PERICLKCLR0_DMAU_CLK_MASK 0x4000 #define GC_PMU_PERICLKCLR0_DMAU_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DMAU_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DMAU_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_LSB 0xe -#define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_MASK 0x4000 +#define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_LSB 0xf +#define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_MASK 0x8000 #define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_LSB 0xf -#define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_MASK 0x8000 +#define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_LSB 0x10 +#define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_MASK 0x10000 #define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_LSB 0x10 -#define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_MASK 0x10000 +#define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_LSB 0x11 +#define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_MASK 0x20000 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_LSB 0x11 -#define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_MASK 0x20000 +#define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_LSB 0x12 +#define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_MASK 0x40000 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DPINMUX_CLK_LSB 0x12 -#define GC_PMU_PERICLKCLR0_DPINMUX_CLK_MASK 0x40000 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_LSB 0x13 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_MASK 0x80000 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_SIZE 0x1 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_DEFAULT 0x1 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_OFFSET 0x64 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_LSB 0x14 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_MASK 0x100000 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_SIZE 0x1 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_DEFAULT 0x1 +#define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_OFFSET 0x64 +#define GC_PMU_PERICLKCLR0_DPINMUX_CLK_LSB 0x15 +#define GC_PMU_PERICLKCLR0_DPINMUX_CLK_MASK 0x200000 #define GC_PMU_PERICLKCLR0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPINMUX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPINMUX_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DPMU_CLK_LSB 0x13 -#define GC_PMU_PERICLKCLR0_DPMU_CLK_MASK 0x80000 +#define GC_PMU_PERICLKCLR0_DPMU_CLK_LSB 0x16 +#define GC_PMU_PERICLKCLR0_DPMU_CLK_MASK 0x400000 #define GC_PMU_PERICLKCLR0_DPMU_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPMU_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPMU_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DRBOX0_CLK_LSB 0x14 -#define GC_PMU_PERICLKCLR0_DRBOX0_CLK_MASK 0x100000 +#define GC_PMU_PERICLKCLR0_DRBOX0_CLK_LSB 0x17 +#define GC_PMU_PERICLKCLR0_DRBOX0_CLK_MASK 0x800000 #define GC_PMU_PERICLKCLR0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DRBOX0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DRDD0_CLK_LSB 0x15 -#define GC_PMU_PERICLKCLR0_DRDD0_CLK_MASK 0x200000 +#define GC_PMU_PERICLKCLR0_DRDD0_CLK_LSB 0x18 +#define GC_PMU_PERICLKCLR0_DRDD0_CLK_MASK 0x1000000 #define GC_PMU_PERICLKCLR0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DRDD0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DRTC0_CLK_LSB 0x16 -#define GC_PMU_PERICLKCLR0_DRTC0_CLK_MASK 0x400000 +#define GC_PMU_PERICLKCLR0_DRTC0_CLK_LSB 0x19 +#define GC_PMU_PERICLKCLR0_DRTC0_CLK_MASK 0x2000000 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_LSB 0x17 -#define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_MASK 0x800000 +#define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_LSB 0x1a +#define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_MASK 0x4000000 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DSPI0_CLK_TIMER_LSB 0x18 -#define GC_PMU_PERICLKCLR0_DSPI0_CLK_TIMER_MASK 0x1000000 -#define GC_PMU_PERICLKCLR0_DSPI0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERICLKCLR0_DSPI0_CLK_TIMER_DEFAULT 0x1 -#define GC_PMU_PERICLKCLR0_DSPI0_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DSPI1_CLK_TIMER_LSB 0x19 -#define GC_PMU_PERICLKCLR0_DSPI1_CLK_TIMER_MASK 0x2000000 -#define GC_PMU_PERICLKCLR0_DSPI1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERICLKCLR0_DSPI1_CLK_TIMER_DEFAULT 0x1 -#define GC_PMU_PERICLKCLR0_DSPI1_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DSPS0_CLK_LSB 0x1a -#define GC_PMU_PERICLKCLR0_DSPS0_CLK_MASK 0x4000000 +#define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_LSB 0x1b +#define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_MASK 0x8000000 +#define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_SIZE 0x1 +#define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_DEFAULT 0x1 +#define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_OFFSET 0x64 +#define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_LSB 0x1c +#define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_MASK 0x10000000 +#define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_SIZE 0x1 +#define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_DEFAULT 0x1 +#define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_OFFSET 0x64 +#define GC_PMU_PERICLKCLR0_DSPS0_CLK_LSB 0x1d +#define GC_PMU_PERICLKCLR0_DSPS0_CLK_MASK 0x20000000 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_LSB 0x1b -#define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_MASK 0x8000000 +#define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_LSB 0x1e +#define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_MASK 0x40000000 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DSWDP0_CLK_LSB 0x1c -#define GC_PMU_PERICLKCLR0_DSWDP0_CLK_MASK 0x10000000 +#define GC_PMU_PERICLKCLR0_DSWDP0_CLK_LSB 0x1f +#define GC_PMU_PERICLKCLR0_DSWDP0_CLK_MASK 0x80000000 #define GC_PMU_PERICLKCLR0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DSWDP0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DSWDP0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DTEMP0_CLK_LSB 0x1d -#define GC_PMU_PERICLKCLR0_DTEMP0_CLK_MASK 0x20000000 -#define GC_PMU_PERICLKCLR0_DTEMP0_CLK_SIZE 0x1 -#define GC_PMU_PERICLKCLR0_DTEMP0_CLK_DEFAULT 0x1 -#define GC_PMU_PERICLKCLR0_DTEMP0_CLK_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DTIMEHS0_CLK_TIMER_LSB 0x1e -#define GC_PMU_PERICLKCLR0_DTIMEHS0_CLK_TIMER_MASK 0x40000000 -#define GC_PMU_PERICLKCLR0_DTIMEHS0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERICLKCLR0_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERICLKCLR0_DTIMEHS0_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKCLR0_DTIMEHS1_CLK_TIMER_LSB 0x1f -#define GC_PMU_PERICLKCLR0_DTIMEHS1_CLK_TIMER_MASK 0x80000000 -#define GC_PMU_PERICLKCLR0_DTIMEHS1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERICLKCLR0_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERICLKCLR0_DTIMEHS1_CLK_TIMER_OFFSET 0x64 -#define GC_PMU_PERICLKSET1_DTIMELS0_CLK_LSB 0x0 -#define GC_PMU_PERICLKSET1_DTIMELS0_CLK_MASK 0x1 +#define GC_PMU_PERICLKSET1_DTEMP0_CLK_LSB 0x0 +#define GC_PMU_PERICLKSET1_DTEMP0_CLK_MASK 0x1 +#define GC_PMU_PERICLKSET1_DTEMP0_CLK_SIZE 0x1 +#define GC_PMU_PERICLKSET1_DTEMP0_CLK_DEFAULT 0x1 +#define GC_PMU_PERICLKSET1_DTEMP0_CLK_OFFSET 0x68 +#define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_LSB 0x1 +#define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_SIZE 0x1 +#define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_OFFSET 0x68 +#define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_LSB 0x2 +#define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_MASK 0x4 +#define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_SIZE 0x1 +#define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_OFFSET 0x68 +#define GC_PMU_PERICLKSET1_DTIMELS0_CLK_LSB 0x3 +#define GC_PMU_PERICLKSET1_DTIMELS0_CLK_MASK 0x8 #define GC_PMU_PERICLKSET1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DTIMELS0_CLK_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_LSB 0x1 -#define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_LSB 0x4 +#define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_MASK 0x10 #define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DTRNG0_CLK_LSB 0x2 -#define GC_PMU_PERICLKSET1_DTRNG0_CLK_MASK 0x4 +#define GC_PMU_PERICLKSET1_DTRNG0_CLK_LSB 0x5 +#define GC_PMU_PERICLKSET1_DTRNG0_CLK_MASK 0x20 #define GC_PMU_PERICLKSET1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DTRNG0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DTRNG0_CLK_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_LSB 0x3 -#define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_MASK 0x8 +#define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_LSB 0x6 +#define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_MASK 0x40 #define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_LSB 0x4 -#define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_MASK 0x10 +#define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_LSB 0x7 +#define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_MASK 0x80 #define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_LSB 0x5 -#define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_MASK 0x20 +#define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_LSB 0x8 +#define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_MASK 0x100 #define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DUSB0_CLK_LSB 0x6 -#define GC_PMU_PERICLKSET1_DUSB0_CLK_MASK 0x40 +#define GC_PMU_PERICLKSET1_DUSB0_CLK_LSB 0x9 +#define GC_PMU_PERICLKSET1_DUSB0_CLK_MASK 0x200 #define GC_PMU_PERICLKSET1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUSB0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DUSB0_CLK_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_LSB 0x7 -#define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_MASK 0x80 +#define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_LSB 0xa +#define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_MASK 0x400 #define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DVOLT0_CLK_LSB 0x8 -#define GC_PMU_PERICLKSET1_DVOLT0_CLK_MASK 0x100 +#define GC_PMU_PERICLKSET1_DVOLT0_CLK_LSB 0xb +#define GC_PMU_PERICLKSET1_DVOLT0_CLK_MASK 0x800 #define GC_PMU_PERICLKSET1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DVOLT0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DVOLT0_CLK_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_LSB 0x9 -#define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_MASK 0x200 +#define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_LSB 0xc +#define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_MASK 0x1000 #define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DXO0_CLK_LSB 0xa -#define GC_PMU_PERICLKSET1_DXO0_CLK_MASK 0x400 +#define GC_PMU_PERICLKSET1_DXO0_CLK_LSB 0xd +#define GC_PMU_PERICLKSET1_DXO0_CLK_MASK 0x2000 #define GC_PMU_PERICLKSET1_DXO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DXO0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DXO0_CLK_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_LSB 0xb -#define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_MASK 0x800 +#define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_LSB 0xe +#define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_MASK 0x4000 #define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_LSB 0xc -#define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_MASK 0x1000 +#define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_LSB 0xf +#define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_MASK 0x8000 #define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_OFFSET 0x68 -#define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_LSB 0xd -#define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_MASK 0x2000 +#define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_LSB 0x10 +#define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_MASK 0x10000 #define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_OFFSET 0x68 -#define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_LSB 0x0 -#define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_MASK 0x1 +#define GC_PMU_PERICLKCLR1_DTEMP0_CLK_LSB 0x0 +#define GC_PMU_PERICLKCLR1_DTEMP0_CLK_MASK 0x1 +#define GC_PMU_PERICLKCLR1_DTEMP0_CLK_SIZE 0x1 +#define GC_PMU_PERICLKCLR1_DTEMP0_CLK_DEFAULT 0x1 +#define GC_PMU_PERICLKCLR1_DTEMP0_CLK_OFFSET 0x6c +#define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_LSB 0x1 +#define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_SIZE 0x1 +#define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_OFFSET 0x6c +#define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_LSB 0x2 +#define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_MASK 0x4 +#define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_SIZE 0x1 +#define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_OFFSET 0x6c +#define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_LSB 0x3 +#define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_MASK 0x8 #define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_LSB 0x1 -#define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_LSB 0x4 +#define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_MASK 0x10 #define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DTRNG0_CLK_LSB 0x2 -#define GC_PMU_PERICLKCLR1_DTRNG0_CLK_MASK 0x4 +#define GC_PMU_PERICLKCLR1_DTRNG0_CLK_LSB 0x5 +#define GC_PMU_PERICLKCLR1_DTRNG0_CLK_MASK 0x20 #define GC_PMU_PERICLKCLR1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DTRNG0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DTRNG0_CLK_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_LSB 0x3 -#define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_MASK 0x8 +#define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_LSB 0x6 +#define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_MASK 0x40 #define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_LSB 0x4 -#define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_MASK 0x10 +#define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_LSB 0x7 +#define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_MASK 0x80 #define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_LSB 0x5 -#define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_MASK 0x20 +#define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_LSB 0x8 +#define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_MASK 0x100 #define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DUSB0_CLK_LSB 0x6 -#define GC_PMU_PERICLKCLR1_DUSB0_CLK_MASK 0x40 +#define GC_PMU_PERICLKCLR1_DUSB0_CLK_LSB 0x9 +#define GC_PMU_PERICLKCLR1_DUSB0_CLK_MASK 0x200 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_LSB 0x7 -#define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_MASK 0x80 +#define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_LSB 0xa +#define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_MASK 0x400 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DVOLT0_CLK_LSB 0x8 -#define GC_PMU_PERICLKCLR1_DVOLT0_CLK_MASK 0x100 +#define GC_PMU_PERICLKCLR1_DVOLT0_CLK_LSB 0xb +#define GC_PMU_PERICLKCLR1_DVOLT0_CLK_MASK 0x800 #define GC_PMU_PERICLKCLR1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DVOLT0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DVOLT0_CLK_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_LSB 0x9 -#define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_MASK 0x200 +#define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_LSB 0xc +#define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_MASK 0x1000 #define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DXO0_CLK_LSB 0xa -#define GC_PMU_PERICLKCLR1_DXO0_CLK_MASK 0x400 +#define GC_PMU_PERICLKCLR1_DXO0_CLK_LSB 0xd +#define GC_PMU_PERICLKCLR1_DXO0_CLK_MASK 0x2000 #define GC_PMU_PERICLKCLR1_DXO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DXO0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DXO0_CLK_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_LSB 0xb -#define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_MASK 0x800 +#define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_LSB 0xe +#define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_MASK 0x4000 #define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_LSB 0xc -#define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_MASK 0x1000 +#define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_LSB 0xf +#define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_MASK 0x8000 #define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_OFFSET 0x6c -#define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_LSB 0xd -#define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_MASK 0x2000 +#define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_LSB 0x10 +#define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_MASK 0x10000 #define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_OFFSET 0x6c @@ -14919,131 +14980,131 @@ #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_TIMER_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_LSB 0x7 -#define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_MASK 0x80 +#define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_LSB 0x7 +#define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_MASK 0x80 +#define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_OFFSET 0x70 +#define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_LSB 0x8 +#define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_LSB 0x8 -#define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_MASK 0x100 +#define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_LSB 0x9 +#define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_LSB 0x9 -#define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_MASK 0x200 +#define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_LSB 0xa +#define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_LSB 0xa -#define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_MASK 0x400 +#define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_LSB 0xb +#define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_LSB 0xb -#define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_MASK 0x800 +#define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_LSB 0xc +#define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_LSB 0xc -#define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_MASK 0x1000 +#define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_LSB 0xd +#define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DMAU_CLK_LSB 0xd -#define GC_PMU_PERIGATEONSLEEPSET0_DMAU_CLK_MASK 0x2000 +#define GC_PMU_PERIGATEONSLEEPSET0_DMAU_CLK_LSB 0xe +#define GC_PMU_PERIGATEONSLEEPSET0_DMAU_CLK_MASK 0x4000 #define GC_PMU_PERIGATEONSLEEPSET0_DMAU_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DMAU_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DMAU_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_LSB 0xe -#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_MASK 0x4000 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_LSB 0xf +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_MASK 0x8000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_LSB 0xf -#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_MASK 0x8000 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_LSB 0x10 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_MASK 0x10000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_LSB 0x10 -#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_MASK 0x10000 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_LSB 0x11 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_MASK 0x20000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_LSB 0x11 -#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_MASK 0x20000 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_LSB 0x12 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_MASK 0x40000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_LSB 0x12 -#define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_MASK 0x40000 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_LSB 0x13 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_MASK 0x80000 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_OFFSET 0x70 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_LSB 0x14 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_MASK 0x100000 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_OFFSET 0x70 +#define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_LSB 0x15 +#define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_MASK 0x200000 #define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_LSB 0x13 -#define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_MASK 0x80000 +#define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_LSB 0x16 +#define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_MASK 0x400000 #define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_LSB 0x14 -#define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_MASK 0x100000 +#define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_LSB 0x17 +#define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_MASK 0x800000 #define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_LSB 0x15 -#define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_MASK 0x200000 +#define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_LSB 0x18 +#define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_MASK 0x1000000 #define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_LSB 0x16 -#define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_MASK 0x400000 +#define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_LSB 0x19 +#define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_MASK 0x2000000 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_LSB 0x17 -#define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_MASK 0x800000 +#define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_LSB 0x1a +#define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_MASK 0x4000000 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_TIMER_LSB 0x18 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_TIMER_MASK 0x1000000 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_TIMER_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_TIMER_LSB 0x19 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_TIMER_MASK 0x2000000 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_TIMER_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_LSB 0x1a -#define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_MASK 0x4000000 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_LSB 0x1b +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_MASK 0x8000000 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_OFFSET 0x70 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_LSB 0x1c +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_MASK 0x10000000 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_OFFSET 0x70 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_LSB 0x1d +#define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_MASK 0x20000000 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_LSB 0x1b -#define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_MASK 0x8000000 +#define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_LSB 0x1e +#define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_MASK 0x40000000 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_LSB 0x1c -#define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_MASK 0x10000000 +#define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_LSB 0x1f +#define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_MASK 0x80000000 #define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_LSB 0x1d -#define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_MASK 0x20000000 -#define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS0_CLK_TIMER_LSB 0x1e -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS0_CLK_TIMER_MASK 0x40000000 -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS0_CLK_TIMER_OFFSET 0x70 -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS1_CLK_TIMER_LSB 0x1f -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS1_CLK_TIMER_MASK 0x80000000 -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPSET0_DTIMEHS1_CLK_TIMER_OFFSET 0x70 #define GC_PMU_PERIGATEONSLEEPCLR0_DCAMO0_CLK_LSB 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DCAMO0_CLK_MASK 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DCAMO0_CLK_SIZE 0x1 @@ -15079,268 +15140,298 @@ #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_LSB 0x7 -#define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_MASK 0x80 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_LSB 0x7 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_MASK 0x80 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_OFFSET 0x74 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_LSB 0x8 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_LSB 0x8 -#define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_MASK 0x100 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_LSB 0x9 +#define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_LSB 0x9 -#define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_MASK 0x200 +#define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_LSB 0xa +#define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_LSB 0xa -#define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_MASK 0x400 +#define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_LSB 0xb +#define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_LSB 0xb -#define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_MASK 0x800 +#define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_LSB 0xc +#define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_LSB 0xc -#define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_MASK 0x1000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_LSB 0xd +#define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DMAU_CLK_LSB 0xd -#define GC_PMU_PERIGATEONSLEEPCLR0_DMAU_CLK_MASK 0x2000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DMAU_CLK_LSB 0xe +#define GC_PMU_PERIGATEONSLEEPCLR0_DMAU_CLK_MASK 0x4000 #define GC_PMU_PERIGATEONSLEEPCLR0_DMAU_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DMAU_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DMAU_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_LSB 0xe -#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_MASK 0x4000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_LSB 0xf +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_MASK 0x8000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_LSB 0xf -#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_MASK 0x8000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_LSB 0x10 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_MASK 0x10000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_LSB 0x10 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_MASK 0x10000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_LSB 0x11 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_MASK 0x20000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_LSB 0x11 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_MASK 0x20000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_LSB 0x12 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_MASK 0x40000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_LSB 0x12 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_MASK 0x40000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_LSB 0x13 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_MASK 0x80000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_OFFSET 0x74 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_LSB 0x14 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_MASK 0x100000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_OFFSET 0x74 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_LSB 0x15 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_MASK 0x200000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_LSB 0x13 -#define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_MASK 0x80000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_LSB 0x16 +#define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_MASK 0x400000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_LSB 0x14 -#define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_MASK 0x100000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_LSB 0x17 +#define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_MASK 0x800000 #define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_LSB 0x15 -#define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_MASK 0x200000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_LSB 0x18 +#define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_MASK 0x1000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_LSB 0x16 -#define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_MASK 0x400000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_LSB 0x19 +#define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_MASK 0x2000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_LSB 0x17 -#define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_MASK 0x800000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_LSB 0x1a +#define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_MASK 0x4000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_TIMER_LSB 0x18 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_TIMER_MASK 0x1000000 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_TIMER_LSB 0x19 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_TIMER_MASK 0x2000000 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_LSB 0x1a -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_MASK 0x4000000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_LSB 0x1b +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_MASK 0x8000000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_OFFSET 0x74 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_LSB 0x1c +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_MASK 0x10000000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_OFFSET 0x74 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_LSB 0x1d +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_MASK 0x20000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_LSB 0x1b -#define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_MASK 0x8000000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_LSB 0x1e +#define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_MASK 0x40000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_LSB 0x1c -#define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_MASK 0x10000000 +#define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_LSB 0x1f +#define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_MASK 0x80000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_LSB 0x1d -#define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_MASK 0x20000000 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS0_CLK_TIMER_LSB 0x1e -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS0_CLK_TIMER_MASK 0x40000000 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS0_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS1_CLK_TIMER_LSB 0x1f -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS1_CLK_TIMER_MASK 0x80000000 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_PERIGATEONSLEEPCLR0_DTIMEHS1_CLK_TIMER_OFFSET 0x74 -#define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_LSB 0x0 -#define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_MASK 0x1 +#define GC_PMU_PERIGATEONSLEEPSET1_DTEMP0_CLK_LSB 0x0 +#define GC_PMU_PERIGATEONSLEEPSET1_DTEMP0_CLK_MASK 0x1 +#define GC_PMU_PERIGATEONSLEEPSET1_DTEMP0_CLK_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPSET1_DTEMP0_CLK_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPSET1_DTEMP0_CLK_OFFSET 0x78 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_LSB 0x1 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_OFFSET 0x78 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_LSB 0x2 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_MASK 0x4 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_OFFSET 0x78 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_LSB 0x3 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_MASK 0x8 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_LSB 0x1 -#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_LSB 0x4 +#define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_MASK 0x10 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_LSB 0x2 -#define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_MASK 0x4 +#define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_LSB 0x5 +#define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_MASK 0x20 #define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_LSB 0x3 -#define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_MASK 0x8 +#define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_LSB 0x6 +#define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_MASK 0x40 #define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_LSB 0x4 -#define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_MASK 0x10 +#define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_LSB 0x7 +#define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_MASK 0x80 #define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_LSB 0x5 -#define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_MASK 0x20 +#define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_LSB 0x8 +#define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_MASK 0x100 #define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_LSB 0x6 -#define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_MASK 0x40 +#define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_LSB 0x9 +#define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_MASK 0x200 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_LSB 0x7 -#define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_MASK 0x80 +#define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_LSB 0xa +#define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_MASK 0x400 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_LSB 0x8 -#define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_MASK 0x100 +#define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_LSB 0xb +#define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_MASK 0x800 #define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_LSB 0x9 -#define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_MASK 0x200 +#define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_LSB 0xc +#define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_MASK 0x1000 #define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_LSB 0xa -#define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_MASK 0x400 +#define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_LSB 0xd +#define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_MASK 0x2000 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_LSB 0xb -#define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_MASK 0x800 +#define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_LSB 0xe +#define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_MASK 0x4000 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_LSB 0xc -#define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_MASK 0x1000 +#define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_LSB 0xf +#define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_MASK 0x8000 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_LSB 0xd -#define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_MASK 0x2000 +#define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_LSB 0x10 +#define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_MASK 0x10000 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_OFFSET 0x78 -#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_LSB 0x0 -#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_MASK 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTEMP0_CLK_LSB 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTEMP0_CLK_MASK 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTEMP0_CLK_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTEMP0_CLK_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTEMP0_CLK_OFFSET 0x7c +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_LSB 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_OFFSET 0x7c +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_LSB 0x2 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_MASK 0x4 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_SIZE 0x1 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_OFFSET 0x7c +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_LSB 0x3 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_MASK 0x8 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_LSB 0x1 -#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_LSB 0x4 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_MASK 0x10 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_LSB 0x2 -#define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_MASK 0x4 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_LSB 0x5 +#define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_MASK 0x20 #define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_LSB 0x3 -#define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_MASK 0x8 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_LSB 0x6 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_MASK 0x40 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_LSB 0x4 -#define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_MASK 0x10 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_LSB 0x7 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_MASK 0x80 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_LSB 0x5 -#define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_MASK 0x20 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_LSB 0x8 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_MASK 0x100 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_LSB 0x6 -#define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_MASK 0x40 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_LSB 0x9 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_MASK 0x200 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_LSB 0x7 -#define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_MASK 0x80 +#define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_LSB 0xa +#define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_MASK 0x400 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_LSB 0x8 -#define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_MASK 0x100 +#define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_LSB 0xb +#define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_MASK 0x800 #define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_LSB 0x9 -#define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_MASK 0x200 +#define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_LSB 0xc +#define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_MASK 0x1000 #define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_LSB 0xa -#define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_MASK 0x400 +#define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_LSB 0xd +#define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_MASK 0x2000 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_LSB 0xb -#define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_MASK 0x800 +#define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_LSB 0xe +#define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_MASK 0x4000 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_LSB 0xc -#define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_MASK 0x1000 +#define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_LSB 0xf +#define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_MASK 0x8000 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_OFFSET 0x7c -#define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_LSB 0xd -#define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_MASK 0x2000 +#define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_LSB 0x10 +#define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_MASK 0x10000 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_OFFSET 0x7c @@ -15414,221 +15505,241 @@ #define GC_PMU_RST0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST0_DGLOBALSEC_CLK_TIMER_OFFSET 0x84 -#define GC_PMU_RST0_DGPIO0_LSB 0x7 -#define GC_PMU_RST0_DGPIO0_MASK 0x80 +#define GC_PMU_RST0_DGLOBALSEC_CLK_HS_LSB 0x7 +#define GC_PMU_RST0_DGLOBALSEC_CLK_HS_MASK 0x80 +#define GC_PMU_RST0_DGLOBALSEC_CLK_HS_SIZE 0x1 +#define GC_PMU_RST0_DGLOBALSEC_CLK_HS_DEFAULT 0x0 +#define GC_PMU_RST0_DGLOBALSEC_CLK_HS_OFFSET 0x84 +#define GC_PMU_RST0_DGPIO0_LSB 0x8 +#define GC_PMU_RST0_DGPIO0_MASK 0x100 #define GC_PMU_RST0_DGPIO0_SIZE 0x1 #define GC_PMU_RST0_DGPIO0_DEFAULT 0x0 #define GC_PMU_RST0_DGPIO0_OFFSET 0x84 -#define GC_PMU_RST0_DGPIO1_LSB 0x8 -#define GC_PMU_RST0_DGPIO1_MASK 0x100 +#define GC_PMU_RST0_DGPIO1_LSB 0x9 +#define GC_PMU_RST0_DGPIO1_MASK 0x200 #define GC_PMU_RST0_DGPIO1_SIZE 0x1 #define GC_PMU_RST0_DGPIO1_DEFAULT 0x0 #define GC_PMU_RST0_DGPIO1_OFFSET 0x84 -#define GC_PMU_RST0_DI2C0_CLK_TIMER_LSB 0x9 -#define GC_PMU_RST0_DI2C0_CLK_TIMER_MASK 0x200 +#define GC_PMU_RST0_DI2C0_CLK_TIMER_LSB 0xa +#define GC_PMU_RST0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_RST0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST0_DI2C0_CLK_TIMER_OFFSET 0x84 -#define GC_PMU_RST0_DI2C1_CLK_TIMER_LSB 0xa -#define GC_PMU_RST0_DI2C1_CLK_TIMER_MASK 0x400 +#define GC_PMU_RST0_DI2C1_CLK_TIMER_LSB 0xb +#define GC_PMU_RST0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_RST0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST0_DI2C1_CLK_TIMER_OFFSET 0x84 -#define GC_PMU_RST0_DI2CS0_LSB 0xb -#define GC_PMU_RST0_DI2CS0_MASK 0x800 +#define GC_PMU_RST0_DI2CS0_LSB 0xc +#define GC_PMU_RST0_DI2CS0_MASK 0x1000 #define GC_PMU_RST0_DI2CS0_SIZE 0x1 #define GC_PMU_RST0_DI2CS0_DEFAULT 0x0 #define GC_PMU_RST0_DI2CS0_OFFSET 0x84 -#define GC_PMU_RST0_DKEYMGR0_LSB 0xc -#define GC_PMU_RST0_DKEYMGR0_MASK 0x1000 +#define GC_PMU_RST0_DKEYMGR0_LSB 0xd +#define GC_PMU_RST0_DKEYMGR0_MASK 0x2000 #define GC_PMU_RST0_DKEYMGR0_SIZE 0x1 #define GC_PMU_RST0_DKEYMGR0_DEFAULT 0x0 #define GC_PMU_RST0_DKEYMGR0_OFFSET 0x84 -#define GC_PMU_RST0_DMAU_LSB 0xd -#define GC_PMU_RST0_DMAU_MASK 0x2000 +#define GC_PMU_RST0_DMAU_LSB 0xe +#define GC_PMU_RST0_DMAU_MASK 0x4000 #define GC_PMU_RST0_DMAU_SIZE 0x1 #define GC_PMU_RST0_DMAU_DEFAULT 0x0 #define GC_PMU_RST0_DMAU_OFFSET 0x84 -#define GC_PMU_RST0_DPERI_APB0_LSB 0xe -#define GC_PMU_RST0_DPERI_APB0_MASK 0x4000 +#define GC_PMU_RST0_DPERI_APB0_LSB 0xf +#define GC_PMU_RST0_DPERI_APB0_MASK 0x8000 #define GC_PMU_RST0_DPERI_APB0_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB0_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB0_OFFSET 0x84 -#define GC_PMU_RST0_DPERI_APB1_LSB 0xf -#define GC_PMU_RST0_DPERI_APB1_MASK 0x8000 +#define GC_PMU_RST0_DPERI_APB1_LSB 0x10 +#define GC_PMU_RST0_DPERI_APB1_MASK 0x10000 #define GC_PMU_RST0_DPERI_APB1_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB1_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB1_OFFSET 0x84 -#define GC_PMU_RST0_DPERI_APB2_LSB 0x10 -#define GC_PMU_RST0_DPERI_APB2_MASK 0x10000 +#define GC_PMU_RST0_DPERI_APB2_LSB 0x11 +#define GC_PMU_RST0_DPERI_APB2_MASK 0x20000 #define GC_PMU_RST0_DPERI_APB2_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB2_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB2_OFFSET 0x84 -#define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_LSB 0x11 -#define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_MASK 0x20000 +#define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_LSB 0x12 +#define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_MASK 0x40000 #define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_OFFSET 0x84 -#define GC_PMU_RST0_DPINMUX_AON_LSB 0x12 -#define GC_PMU_RST0_DPINMUX_AON_MASK 0x40000 +#define GC_PMU_RST0_DPERI_APB3_LSB 0x13 +#define GC_PMU_RST0_DPERI_APB3_MASK 0x80000 +#define GC_PMU_RST0_DPERI_APB3_SIZE 0x1 +#define GC_PMU_RST0_DPERI_APB3_DEFAULT 0x0 +#define GC_PMU_RST0_DPERI_APB3_OFFSET 0x84 +#define GC_PMU_RST0_DPERI_APB3_CLK_HS_LSB 0x14 +#define GC_PMU_RST0_DPERI_APB3_CLK_HS_MASK 0x100000 +#define GC_PMU_RST0_DPERI_APB3_CLK_HS_SIZE 0x1 +#define GC_PMU_RST0_DPERI_APB3_CLK_HS_DEFAULT 0x0 +#define GC_PMU_RST0_DPERI_APB3_CLK_HS_OFFSET 0x84 +#define GC_PMU_RST0_DPINMUX_AON_LSB 0x15 +#define GC_PMU_RST0_DPINMUX_AON_MASK 0x200000 #define GC_PMU_RST0_DPINMUX_AON_SIZE 0x1 #define GC_PMU_RST0_DPINMUX_AON_DEFAULT 0x0 #define GC_PMU_RST0_DPINMUX_AON_OFFSET 0x84 -#define GC_PMU_RST0_DPMU_AON_LSB 0x13 -#define GC_PMU_RST0_DPMU_AON_MASK 0x80000 +#define GC_PMU_RST0_DPMU_AON_LSB 0x16 +#define GC_PMU_RST0_DPMU_AON_MASK 0x400000 #define GC_PMU_RST0_DPMU_AON_SIZE 0x1 #define GC_PMU_RST0_DPMU_AON_DEFAULT 0x0 #define GC_PMU_RST0_DPMU_AON_OFFSET 0x84 -#define GC_PMU_RST0_DRBOX0_AON_LSB 0x14 -#define GC_PMU_RST0_DRBOX0_AON_MASK 0x100000 +#define GC_PMU_RST0_DRBOX0_AON_LSB 0x17 +#define GC_PMU_RST0_DRBOX0_AON_MASK 0x800000 #define GC_PMU_RST0_DRBOX0_AON_SIZE 0x1 #define GC_PMU_RST0_DRBOX0_AON_DEFAULT 0x0 #define GC_PMU_RST0_DRBOX0_AON_OFFSET 0x84 -#define GC_PMU_RST0_DRDD0_LSB 0x15 -#define GC_PMU_RST0_DRDD0_MASK 0x200000 +#define GC_PMU_RST0_DRDD0_LSB 0x18 +#define GC_PMU_RST0_DRDD0_MASK 0x1000000 #define GC_PMU_RST0_DRDD0_SIZE 0x1 #define GC_PMU_RST0_DRDD0_DEFAULT 0x0 #define GC_PMU_RST0_DRDD0_OFFSET 0x84 -#define GC_PMU_RST0_DRTC0_AON_LSB 0x16 -#define GC_PMU_RST0_DRTC0_AON_MASK 0x400000 +#define GC_PMU_RST0_DRTC0_AON_LSB 0x19 +#define GC_PMU_RST0_DRTC0_AON_MASK 0x2000000 #define GC_PMU_RST0_DRTC0_AON_SIZE 0x1 #define GC_PMU_RST0_DRTC0_AON_DEFAULT 0x0 #define GC_PMU_RST0_DRTC0_AON_OFFSET 0x84 -#define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_LSB 0x17 -#define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_MASK 0x800000 +#define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_LSB 0x1a +#define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_MASK 0x4000000 #define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_SIZE 0x1 #define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_DEFAULT 0x0 #define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_OFFSET 0x84 -#define GC_PMU_RST0_DSPI0_CLK_TIMER_LSB 0x18 -#define GC_PMU_RST0_DSPI0_CLK_TIMER_MASK 0x1000000 -#define GC_PMU_RST0_DSPI0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_RST0_DSPI0_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_RST0_DSPI0_CLK_TIMER_OFFSET 0x84 -#define GC_PMU_RST0_DSPI1_CLK_TIMER_LSB 0x19 -#define GC_PMU_RST0_DSPI1_CLK_TIMER_MASK 0x2000000 -#define GC_PMU_RST0_DSPI1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_RST0_DSPI1_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_RST0_DSPI1_CLK_TIMER_OFFSET 0x84 -#define GC_PMU_RST0_DSPS0_LSB 0x1a -#define GC_PMU_RST0_DSPS0_MASK 0x4000000 +#define GC_PMU_RST0_DSPI0_CLK_HS_LSB 0x1b +#define GC_PMU_RST0_DSPI0_CLK_HS_MASK 0x8000000 +#define GC_PMU_RST0_DSPI0_CLK_HS_SIZE 0x1 +#define GC_PMU_RST0_DSPI0_CLK_HS_DEFAULT 0x0 +#define GC_PMU_RST0_DSPI0_CLK_HS_OFFSET 0x84 +#define GC_PMU_RST0_DSPI1_CLK_HS_LSB 0x1c +#define GC_PMU_RST0_DSPI1_CLK_HS_MASK 0x10000000 +#define GC_PMU_RST0_DSPI1_CLK_HS_SIZE 0x1 +#define GC_PMU_RST0_DSPI1_CLK_HS_DEFAULT 0x0 +#define GC_PMU_RST0_DSPI1_CLK_HS_OFFSET 0x84 +#define GC_PMU_RST0_DSPS0_LSB 0x1d +#define GC_PMU_RST0_DSPS0_MASK 0x20000000 #define GC_PMU_RST0_DSPS0_SIZE 0x1 #define GC_PMU_RST0_DSPS0_DEFAULT 0x0 #define GC_PMU_RST0_DSPS0_OFFSET 0x84 -#define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_LSB 0x1b -#define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_MASK 0x8000000 +#define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_LSB 0x1e +#define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_MASK 0x40000000 #define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_OFFSET 0x84 -#define GC_PMU_RST0_DSWDP0_LSB 0x1c -#define GC_PMU_RST0_DSWDP0_MASK 0x10000000 +#define GC_PMU_RST0_DSWDP0_LSB 0x1f +#define GC_PMU_RST0_DSWDP0_MASK 0x80000000 #define GC_PMU_RST0_DSWDP0_SIZE 0x1 #define GC_PMU_RST0_DSWDP0_DEFAULT 0x0 #define GC_PMU_RST0_DSWDP0_OFFSET 0x84 -#define GC_PMU_RST0_DTEMP0_LSB 0x1d -#define GC_PMU_RST0_DTEMP0_MASK 0x20000000 -#define GC_PMU_RST0_DTEMP0_SIZE 0x1 -#define GC_PMU_RST0_DTEMP0_DEFAULT 0x0 -#define GC_PMU_RST0_DTEMP0_OFFSET 0x84 -#define GC_PMU_RST0_DTIMEHS0_CLK_TIMER_LSB 0x1e -#define GC_PMU_RST0_DTIMEHS0_CLK_TIMER_MASK 0x40000000 -#define GC_PMU_RST0_DTIMEHS0_CLK_TIMER_SIZE 0x1 -#define GC_PMU_RST0_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_RST0_DTIMEHS0_CLK_TIMER_OFFSET 0x84 -#define GC_PMU_RST0_DTIMEHS1_CLK_TIMER_LSB 0x1f -#define GC_PMU_RST0_DTIMEHS1_CLK_TIMER_MASK 0x80000000 -#define GC_PMU_RST0_DTIMEHS1_CLK_TIMER_SIZE 0x1 -#define GC_PMU_RST0_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 -#define GC_PMU_RST0_DTIMEHS1_CLK_TIMER_OFFSET 0x84 -#define GC_PMU_RST1_DTIMELS0_AON_LSB 0x0 -#define GC_PMU_RST1_DTIMELS0_AON_MASK 0x1 +#define GC_PMU_RST1_DTEMP0_LSB 0x0 +#define GC_PMU_RST1_DTEMP0_MASK 0x1 +#define GC_PMU_RST1_DTEMP0_SIZE 0x1 +#define GC_PMU_RST1_DTEMP0_DEFAULT 0x0 +#define GC_PMU_RST1_DTEMP0_OFFSET 0x88 +#define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_LSB 0x1 +#define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_SIZE 0x1 +#define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_OFFSET 0x88 +#define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_LSB 0x2 +#define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_MASK 0x4 +#define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_SIZE 0x1 +#define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 +#define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_OFFSET 0x88 +#define GC_PMU_RST1_DTIMELS0_AON_LSB 0x3 +#define GC_PMU_RST1_DTIMELS0_AON_MASK 0x8 #define GC_PMU_RST1_DTIMELS0_AON_SIZE 0x1 #define GC_PMU_RST1_DTIMELS0_AON_DEFAULT 0x0 #define GC_PMU_RST1_DTIMELS0_AON_OFFSET 0x88 -#define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_LSB 0x1 -#define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_MASK 0x2 +#define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_LSB 0x4 +#define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_MASK 0x10 #define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_OFFSET 0x88 -#define GC_PMU_RST1_DTRNG0_LSB 0x2 -#define GC_PMU_RST1_DTRNG0_MASK 0x4 +#define GC_PMU_RST1_DTRNG0_LSB 0x5 +#define GC_PMU_RST1_DTRNG0_MASK 0x20 #define GC_PMU_RST1_DTRNG0_SIZE 0x1 #define GC_PMU_RST1_DTRNG0_DEFAULT 0x0 #define GC_PMU_RST1_DTRNG0_OFFSET 0x88 -#define GC_PMU_RST1_DUART0_CLK_TIMER_LSB 0x3 -#define GC_PMU_RST1_DUART0_CLK_TIMER_MASK 0x8 +#define GC_PMU_RST1_DUART0_CLK_TIMER_LSB 0x6 +#define GC_PMU_RST1_DUART0_CLK_TIMER_MASK 0x40 #define GC_PMU_RST1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DUART0_CLK_TIMER_OFFSET 0x88 -#define GC_PMU_RST1_DUART1_CLK_TIMER_LSB 0x4 -#define GC_PMU_RST1_DUART1_CLK_TIMER_MASK 0x10 +#define GC_PMU_RST1_DUART1_CLK_TIMER_LSB 0x7 +#define GC_PMU_RST1_DUART1_CLK_TIMER_MASK 0x80 #define GC_PMU_RST1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DUART1_CLK_TIMER_OFFSET 0x88 -#define GC_PMU_RST1_DUART2_CLK_TIMER_LSB 0x5 -#define GC_PMU_RST1_DUART2_CLK_TIMER_MASK 0x20 +#define GC_PMU_RST1_DUART2_CLK_TIMER_LSB 0x8 +#define GC_PMU_RST1_DUART2_CLK_TIMER_MASK 0x100 #define GC_PMU_RST1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DUART2_CLK_TIMER_OFFSET 0x88 -#define GC_PMU_RST1_DUSB0_LSB 0x6 -#define GC_PMU_RST1_DUSB0_MASK 0x40 +#define GC_PMU_RST1_DUSB0_LSB 0x9 +#define GC_PMU_RST1_DUSB0_MASK 0x200 #define GC_PMU_RST1_DUSB0_SIZE 0x1 #define GC_PMU_RST1_DUSB0_DEFAULT 0x0 #define GC_PMU_RST1_DUSB0_OFFSET 0x88 -#define GC_PMU_RST1_DUSB0_AON_LSB 0x7 -#define GC_PMU_RST1_DUSB0_AON_MASK 0x80 +#define GC_PMU_RST1_DUSB0_AON_LSB 0xa +#define GC_PMU_RST1_DUSB0_AON_MASK 0x400 #define GC_PMU_RST1_DUSB0_AON_SIZE 0x1 #define GC_PMU_RST1_DUSB0_AON_DEFAULT 0x0 #define GC_PMU_RST1_DUSB0_AON_OFFSET 0x88 -#define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_LSB 0x8 -#define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_MASK 0x100 +#define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_LSB 0xb +#define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_MASK 0x800 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_OFFSET 0x88 -#define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_LSB 0x9 -#define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_MASK 0x200 +#define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_LSB 0xc +#define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_MASK 0x1000 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_SIZE 0x1 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_DEFAULT 0x0 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_OFFSET 0x88 -#define GC_PMU_RST1_DVOLT0_LSB 0xa -#define GC_PMU_RST1_DVOLT0_MASK 0x400 +#define GC_PMU_RST1_DVOLT0_LSB 0xd +#define GC_PMU_RST1_DVOLT0_MASK 0x2000 #define GC_PMU_RST1_DVOLT0_SIZE 0x1 #define GC_PMU_RST1_DVOLT0_DEFAULT 0x0 #define GC_PMU_RST1_DVOLT0_OFFSET 0x88 -#define GC_PMU_RST1_DWATCHDOG0_LSB 0xb -#define GC_PMU_RST1_DWATCHDOG0_MASK 0x800 +#define GC_PMU_RST1_DWATCHDOG0_LSB 0xe +#define GC_PMU_RST1_DWATCHDOG0_MASK 0x4000 #define GC_PMU_RST1_DWATCHDOG0_SIZE 0x1 #define GC_PMU_RST1_DWATCHDOG0_DEFAULT 0x0 #define GC_PMU_RST1_DWATCHDOG0_OFFSET 0x88 -#define GC_PMU_RST1_DXO0_AON_LSB 0xc -#define GC_PMU_RST1_DXO0_AON_MASK 0x1000 +#define GC_PMU_RST1_DXO0_AON_LSB 0xf +#define GC_PMU_RST1_DXO0_AON_MASK 0x8000 #define GC_PMU_RST1_DXO0_AON_SIZE 0x1 #define GC_PMU_RST1_DXO0_AON_DEFAULT 0x0 #define GC_PMU_RST1_DXO0_AON_OFFSET 0x88 -#define GC_PMU_RST1_DXO0_CLK_TIMER_AON_LSB 0xd -#define GC_PMU_RST1_DXO0_CLK_TIMER_AON_MASK 0x2000 +#define GC_PMU_RST1_DXO0_CLK_TIMER_AON_LSB 0x10 +#define GC_PMU_RST1_DXO0_CLK_TIMER_AON_MASK 0x10000 #define GC_PMU_RST1_DXO0_CLK_TIMER_AON_SIZE 0x1 #define GC_PMU_RST1_DXO0_CLK_TIMER_AON_DEFAULT 0x0 #define GC_PMU_RST1_DXO0_CLK_TIMER_AON_OFFSET 0x88 -#define GC_PMU_RST1_PERI_MASTER_MATRIX_LSB 0xe -#define GC_PMU_RST1_PERI_MASTER_MATRIX_MASK 0x4000 +#define GC_PMU_RST1_PERI_MASTER_MATRIX_LSB 0x11 +#define GC_PMU_RST1_PERI_MASTER_MATRIX_MASK 0x20000 #define GC_PMU_RST1_PERI_MASTER_MATRIX_SIZE 0x1 #define GC_PMU_RST1_PERI_MASTER_MATRIX_DEFAULT 0x0 #define GC_PMU_RST1_PERI_MASTER_MATRIX_OFFSET 0x88 -#define GC_PMU_RST1_PERI_MATRIX_LSB 0xf -#define GC_PMU_RST1_PERI_MATRIX_MASK 0x8000 +#define GC_PMU_RST1_PERI_MATRIX_LSB 0x12 +#define GC_PMU_RST1_PERI_MATRIX_MASK 0x40000 #define GC_PMU_RST1_PERI_MATRIX_SIZE 0x1 #define GC_PMU_RST1_PERI_MATRIX_DEFAULT 0x0 #define GC_PMU_RST1_PERI_MATRIX_OFFSET 0x88 -#define GC_PMU_RST1_SEC_FABRIC_LSB 0x10 -#define GC_PMU_RST1_SEC_FABRIC_MASK 0x10000 +#define GC_PMU_RST1_SEC_FABRIC_LSB 0x13 +#define GC_PMU_RST1_SEC_FABRIC_MASK 0x80000 #define GC_PMU_RST1_SEC_FABRIC_SIZE 0x1 #define GC_PMU_RST1_SEC_FABRIC_DEFAULT 0x0 #define GC_PMU_RST1_SEC_FABRIC_OFFSET 0x88 -#define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_LSB 0x11 -#define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_MASK 0x20000 +#define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_LSB 0x14 +#define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_MASK 0x100000 #define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_OFFSET 0x88 +#define GC_PMU_RST1_SEC_FABRIC_CLK_HS_LSB 0x15 +#define GC_PMU_RST1_SEC_FABRIC_CLK_HS_MASK 0x200000 +#define GC_PMU_RST1_SEC_FABRIC_CLK_HS_SIZE 0x1 +#define GC_PMU_RST1_SEC_FABRIC_CLK_HS_DEFAULT 0x0 +#define GC_PMU_RST1_SEC_FABRIC_CLK_HS_OFFSET 0x88 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG0_LSB 0x0 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG0_MASK 0x1 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG0_SIZE 0x1 @@ -17634,6 +17745,16 @@ #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE3_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE3_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE3_LVL_OFFSET 0x568 +#define GC_SWDP_TEST_PORT_DISABLE_SWD_LSB 0x0 +#define GC_SWDP_TEST_PORT_DISABLE_SWD_MASK 0x1 +#define GC_SWDP_TEST_PORT_DISABLE_SWD_SIZE 0x1 +#define GC_SWDP_TEST_PORT_DISABLE_SWD_DEFAULT 0x0 +#define GC_SWDP_TEST_PORT_DISABLE_SWD_OFFSET 0x38 +#define GC_SWDP_TEST_PORT_DISABLE_TAP_LSB 0x1 +#define GC_SWDP_TEST_PORT_DISABLE_TAP_MASK 0x2 +#define GC_SWDP_TEST_PORT_DISABLE_TAP_SIZE 0x1 +#define GC_SWDP_TEST_PORT_DISABLE_TAP_DEFAULT 0x0 +#define GC_SWDP_TEST_PORT_DISABLE_TAP_OFFSET 0x38 #define GC_TEMP_VERSION_CHANGE_LSB 0x0 #define GC_TEMP_VERSION_CHANGE_MASK 0xffffff #define GC_TEMP_VERSION_CHANGE_SIZE 0x18 @@ -18157,12 +18278,12 @@ #define GC_TRNG_VERSION_CHANGE_LSB 0x0 #define GC_TRNG_VERSION_CHANGE_MASK 0xffffff #define GC_TRNG_VERSION_CHANGE_SIZE 0x18 -#define GC_TRNG_VERSION_CHANGE_DEFAULT 0x11f6d +#define GC_TRNG_VERSION_CHANGE_DEFAULT 0x12520 #define GC_TRNG_VERSION_CHANGE_OFFSET 0x0 #define GC_TRNG_VERSION_REVISION_LSB 0x18 #define GC_TRNG_VERSION_REVISION_MASK 0xff000000 #define GC_TRNG_VERSION_REVISION_SIZE 0x8 -#define GC_TRNG_VERSION_REVISION_DEFAULT 0x24 +#define GC_TRNG_VERSION_REVISION_DEFAULT 0x26 #define GC_TRNG_VERSION_REVISION_OFFSET 0x0 #define GC_TRNG_INT_ENABLE_INTR_BUFFER_FULL_LSB 0x0 #define GC_TRNG_INT_ENABLE_INTR_BUFFER_FULL_MASK 0x1 diff --git a/util/signer/codesigner.cc b/util/signer/codesigner.cc index 590463b1ce..bdbf09368e 100644 --- a/util/signer/codesigner.cc +++ b/util/signer/codesigner.cc @@ -390,9 +390,10 @@ int main(int argc, char* argv[]) { it.first.c_str(), it.second, fuse_bits[it.first]); } + // Compute fuse_values array, according to manifest and xml. uint32_t fuse_values[FUSE_MAX]; - memset(fuse_values, FUSE_IGNORE, sizeof(fuse_values)); + for (size_t i = 0; i < FUSE_MAX; ++i) fuse_values[i] = FUSE_IGNORE; for (auto x : fuses) { map<string, uint32_t>::const_iterator it = fuse_ids.find(x.first); @@ -421,8 +422,23 @@ int main(int argc, char* argv[]) { } fprintf(stderr, "\n"); + + // Compute info_values array, according to manifest. + uint32_t info_values[INFO_MAX]; + for (size_t i = 0; i < INFO_MAX; ++i) info_values[i] = INFO_IGNORE; + + // TODO: read values from JSON or implement version logic here. + + // Print out info hash input. + fprintf(stderr, "expected info state:\n"); + for (size_t i = 0; i < INFO_MAX; ++i) { + fprintf(stderr, "%08x ", info_values[i]); + } + fprintf(stderr, "\n"); + + // Sign image. - if (image.sign(key, &hdr, fuse_values)) { + if (image.sign(key, &hdr, fuse_values, info_values)) { image.generate(outputFilename, outputFormat == "hex"); } else { fprintf(stderr, "failed to sign\n"); diff --git a/util/signer/common/image.h b/util/signer/common/image.h index c1468bb079..31af8bbb1a 100644 --- a/util/signer/common/image.h +++ b/util/signer/common/image.h @@ -22,7 +22,9 @@ class Image { bool fromIntelHex(const std::string& filename, bool withSignature = true); bool fromElf(const std::string& filename); - bool sign(PublicKey& key, const SignedHeader* hdr, const uint32_t fuses[]); + bool sign(PublicKey& key, const SignedHeader* hdr, + const uint32_t fuses[], + const uint32_t info[]); void generate(const std::string& outputFilename, bool hex_output) const; diff --git a/util/signer/common/signed_header.h b/util/signer/common/signed_header.h index b6929522d9..53c554e150 100644 --- a/util/signer/common/signed_header.h +++ b/util/signer/common/signed_header.h @@ -13,12 +13,16 @@ #define FUSE_IGNORE 0xaaaaaaaa #define FUSE_MAX 160 +#define INFO_MAX 128 +#define INFO_IGNORE 0xaa3c55c3 + typedef struct SignedHeader { #ifdef __cplusplus SignedHeader() : magic(-1), image_size(0) { memset(signature, 'S', sizeof(signature)); memset(tag, 'T', sizeof(tag)); memset(fusemap, 0, sizeof(fusemap)); + memset(infomap, 0, sizeof(infomap)); memset(_pad, 0xdd, sizeof(_pad)); } @@ -26,6 +30,11 @@ typedef struct SignedHeader { assert(n < FUSE_MAX); fusemap[n / 32] |= 1 << (n & 31); } + + void markInfo(uint32_t n) { + assert(n < INFO_MAX); + infomap[n / 32] |= 1 << (n & 31); + } #endif // __cplusplus uint32_t magic; // -1 @@ -38,7 +47,8 @@ typedef struct SignedHeader { uint32_t rx_base; uint32_t rx_max; uint32_t fusemap[FUSE_MAX / (8 * sizeof(uint32_t))]; - uint32_t _pad[256 - 1 - 96 - 7 - 6*1 - 5]; + uint32_t infomap[INFO_MAX / (8 * sizeof(uint32_t))]; + uint32_t _pad[256 - 1 - 96 - 7 - 6*1 - 5 - 4]; } SignedHeader; #ifdef __cplusplus diff --git a/util/signer/image.cc b/util/signer/image.cc index 397143bb7c..c7c4e0a63b 100644 --- a/util/signer/image.cc +++ b/util/signer/image.cc @@ -361,7 +361,8 @@ void Image::store(int adr, int v) { } bool Image::sign(PublicKey& key, const SignedHeader* input_hdr, - const uint32_t fuses[FUSE_MAX]) { + const uint32_t fuses[FUSE_MAX], + const uint32_t info[INFO_MAX]) { BIGNUM* sig = NULL; SignedHeader* hdr = (SignedHeader*)(&mem_[base_]); SHA256_CTX sha256; @@ -371,7 +372,7 @@ bool Image::sign(PublicKey& key, const SignedHeader* input_hdr, struct { uint8_t img_hash[SHA256_DIGEST_LENGTH]; uint8_t fuses_hash[SHA256_DIGEST_LENGTH]; - // TODO: flash_fuses_hash + uint8_t info_hash[SHA256_DIGEST_LENGTH]; } hashes; memcpy(hdr, input_hdr, sizeof(SignedHeader)); @@ -400,6 +401,17 @@ bool Image::sign(PublicKey& key, const SignedHeader* input_hdr, } fprintf(stderr, "\n"); + // Hash info + SHA256_Init(&sha256); + SHA256_Update(&sha256, info, INFO_MAX * sizeof(uint32_t)); + SHA256_Final(hashes.info_hash, &sha256); + + fprintf(stderr, "info hash :"); + for (size_t i = 0; i < sizeof(hashes.info_hash); ++i) { + fprintf(stderr, "%02x", hashes.info_hash[i]); + } + fprintf(stderr, "\n"); + result = key.sign(&hashes, sizeof(hashes), &sig); if (result != 1) { |