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authorShawn Nematbakhsh <shawnn@chromium.org>2015-10-01 14:32:07 -0700
committerchrome-bot <chrome-bot@chromium.org>2015-10-12 22:21:41 -0700
commit98aafe954608ad14bd7c62c4c3c9dbab6fd5343a (patch)
tree3ea8768d313e97736e67a09690959142d2f9daa8
parentea48c412e09619218c56a53523c9457e6cb18204 (diff)
downloadchrome-ec-98aafe954608ad14bd7c62c4c3c9dbab6fd5343a.tar.gz
oak / oak_pd: Enable low-power PD features
- Enable low-power idle on oak_pd. - Have oak_pd follow oak into hibernate. The wake pin on oak_pd will be pulled down until oak wakes, which will generate a low-to-high pulse at oak board_init(). TEST=Manual on oak. Run 'hibernate' on EC console, verify that both EC and PD go to hibernate. Press power button and verify that both EC and PD wake. BUG=chrome-os-partner:46073 BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic33a71654ac46977ff01551d70f6a0dcc0d2b8c0 Reviewed-on: https://chromium-review.googlesource.com/303383 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r--board/oak/board.c8
-rw-r--r--board/oak/gpio.inc2
-rw-r--r--board/oak_pd/board.c13
-rw-r--r--board/oak_pd/board.h3
4 files changed, 24 insertions, 2 deletions
diff --git a/board/oak/board.c b/board/oak/board.c
index ab5befef9c..b34ba21420 100644
--- a/board/oak/board.c
+++ b/board/oak/board.c
@@ -210,6 +210,14 @@ static void board_extpower_buffer_to_soc(void)
/* Initialize board. */
static void board_init(void)
{
+ /*
+ * Assert wake GPIO to PD MCU to wake it from hibernate.
+ * This cannot be done from board_pre_init() (or from any function
+ * called before system_pre_init()), otherwise a spurious wake will
+ * occur -- see stm32 check_reset_cause() WORKAROUND comment.
+ */
+ gpio_set_level(GPIO_USB_PD_VBUS_WAKE, 1);
+
/* Enable Level shift of AC_OK & LID_OPEN signals */
board_extpower_buffer_to_soc();
/* Enable rev1 testing GPIOs */
diff --git a/board/oak/gpio.inc b/board/oak/gpio.inc
index d6450e0795..d93f0bb43c 100644
--- a/board/oak/gpio.inc
+++ b/board/oak/gpio.inc
@@ -128,7 +128,7 @@ GPIO(USB_C0_5V_EN, PIN(D, 8), GPIO_OUT_LOW) /* USBC port 0 5V */
GPIO(USB_C0_CHARGE_L, PIN(D, 9), GPIO_OUT_LOW) /* USBC port 0 charge */
GPIO(USB_C1_5V_EN, PIN(D, 10), GPIO_OUT_LOW) /* USBC port 1 5V */
GPIO(USB_C1_CHARGE_L, PIN(D, 11), GPIO_OUT_LOW) /* USBC port 1 charge */
-GPIO(USB_PD_VBUS_WAKE, PIN(B, 15), GPIO_OUT_LOW) /* PD VBUS wake */
+GPIO(USB_PD_VBUS_WAKE, PIN(B, 15), GPIO_OUT_LOW) /* PD MCU wake */
GPIO(USB_DP_HPD, PIN(F, 3), GPIO_OUT_LOW)
GPIO(USB_C0_DEVMODE_L, PIN(E, 4), GPIO_OUT_HIGH) /* set HSD2 (host mode) path as default */
GPIO(USB_C1_DEVMODE, PIN(E, 2), GPIO_OUT_LOW) /* set HSD1 (host mode) path as default */
diff --git a/board/oak_pd/board.c b/board/oak_pd/board.c
index b02e9ad877..0bac0dcdc7 100644
--- a/board/oak_pd/board.c
+++ b/board/oak_pd/board.c
@@ -112,8 +112,17 @@ DECLARE_CONSOLE_COMMAND(ecint, command_ec_int,
"Toggle EC interrupt line",
NULL);
+static void system_hibernate_deferred(void)
+{
+ ccprintf("EC requested hibernate\n");
+ cflush();
+ system_hibernate(0, 0);
+}
+DECLARE_DEFERRED(system_hibernate_deferred);
+
static int ec_status_host_cmd(struct host_cmd_handler_args *args)
{
+ const struct ec_params_pd_status *p = args->params;
struct ec_response_pd_status *r = args->response;
/*
@@ -123,6 +132,10 @@ static int ec_status_host_cmd(struct host_cmd_handler_args *args)
r->status = ec_int_status;
args->response_size = sizeof(*r);
+ /* Have the PD follow the EC into hibernate. */
+ if (p->status & EC_STATUS_HIBERNATING)
+ hook_call_deferred(system_hibernate_deferred, 0);
+
/*
* If the source of the EC int line was HOST_EVENT, it has
* been acknowledged so can always clear HOST_EVENT bit
diff --git a/board/oak_pd/board.h b/board/oak_pd/board.h
index 52fb775c78..e793c3d434 100644
--- a/board/oak_pd/board.h
+++ b/board/oak_pd/board.h
@@ -44,12 +44,13 @@
#define CONFIG_CONSOLE_HISTORY 2
#undef CONFIG_DEBUG_ASSERT
#define CONFIG_FORCE_CONSOLE_RESUME
+#define CONFIG_HIBERNATE
#define CONFIG_HIBERNATE_WAKEUP_PINS (STM32_PWR_CSR_EWUP2)
#undef CONFIG_HOSTCMD_EVENTS
#define CONFIG_HW_CRC
#define CONFIG_I2C
#undef CONFIG_LID_SWITCH
-#undef CONFIG_LOW_POWER_IDLE
+#define CONFIG_LOW_POWER_IDLE
#define CONFIG_STM_HWTIMER32
#undef CONFIG_TASK_PROFILING
#undef CONFIG_UART_TX_BUF_SIZE