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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-10-14 18:16:27 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-10-15 21:40:33 -0700 |
| commit | ccadc846510cef54ba17561cbddb5c7379a9941f (patch) | |
| tree | b9265658d9f03b8285f156ad4a77cae8476f3cbe | |
| parent | 12209d26ed528c3ceebb5cf94d6d5fadf330fa02 (diff) | |
| download | chrome-ec-ccadc846510cef54ba17561cbddb5c7379a9941f.tar.gz | |
mec1322: i2c: Simplify clk duty cycle calculations
Minimum high / low times are within 50% duty cyle bounds, except for
400KHz low time. With this in mind, simplify the duty cycle calculations
and fix off-by-one errors.
BUG=chrome-os-partner:46188
BRANCH=None
TEST=Verify i2c is still functional on Glados.
Change-Id: Ib08ebc06f334f65d2412222bb6c7a45f407b28c4
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/305577
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
| -rw-r--r-- | chip/mec1322/i2c.c | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/chip/mec1322/i2c.c b/chip/mec1322/i2c.c index 0d3ef5a0da..61f6af7918 100644 --- a/chip/mec1322/i2c.c +++ b/chip/mec1322/i2c.c @@ -56,7 +56,6 @@ struct { static void configure_controller_speed(int controller, int kbps) { - int min_t_low, min_t_high; int t_low, t_high; const int period = I2C_CLOCK / 1000 / kbps; @@ -65,30 +64,26 @@ static void configure_controller_speed(int controller, int kbps) * T_High. * http://www.nxp.com/documents/user_manual/UM10204.pdf */ - if (kbps > 400) { /* Fast mode plus */ - min_t_low = I2C_CLOCK * 0.5 / 1000000 - 1; /* 0.5 us */ - min_t_high = I2C_CLOCK * 0.26 / 1000000 - 1; /* 0.26 us */ + t_low = t_high = period / 2 - 1; MEC1322_I2C_DATA_TIM(controller) = 0x06060601; MEC1322_I2C_DATA_TIM_2(controller) = 0x06; } else if (kbps > 100) { /* Fast mode */ - min_t_low = I2C_CLOCK * 1.3 / 1000000 - 1; /* 1.3 us */ - min_t_high = I2C_CLOCK * 0.6 / 1000000 - 1; /* 0.6 us */ + /* By spec, clk low period is 1.3us min */ + t_low = MAX((int)(I2C_CLOCK * 1.3 / 1000000), period / 2 - 1); + t_high = period - t_low - 2; MEC1322_I2C_DATA_TIM(controller) = 0x040a0a01; MEC1322_I2C_DATA_TIM_2(controller) = 0x0a; } else { /* Standard mode */ - min_t_low = I2C_CLOCK * 4.7 / 1000000 - 1; /* 4.7 us */ - min_t_high = I2C_CLOCK * 4.0 / 1000000 - 1; /* 4.0 us */ + t_low = t_high = period / 2 - 1; MEC1322_I2C_DATA_TIM(controller) = 0x0c4d5006; MEC1322_I2C_DATA_TIM_2(controller) = 0x4d; } - t_low = MAX(min_t_low + 1, period / 2); - t_high = MAX(min_t_high + 1, period - t_low); - + /* Clock periods is one greater than the contents of these fields */ MEC1322_I2C_BUS_CLK(controller) = ((t_high & 0xff) << 8) | (t_low & 0xff); } |