nuc: Switch three GPIOs since lacking interrupt support

Switch three GPIOs since partial group D/E don't support interrupt
SLP_SO_L: GPIOD7 (A18) <-> GPIO34 (B18)
SLP_S4_L: GPIOE0 (A24) <-> GPIO50 (A25)
USB_C1_VBUS_DET_L: GPIOE1 (B30) <-> GPIO61 (B32)

Modified drivers:
1. gpio.inc: switch GPIOs and modify comments

BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none

Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Change-Id: I0aeaeb9628471ed9bc10a909d693af2f2a06469c
Reviewed-on: https://chromium-review.googlesource.com/303296
Commit-Ready: Mulin Chao <mlchao@nuvoton.com>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>

1 files changed, 21 insertions, 21 deletions

diff --git a/board/wheatley/gpio.inc b/board/wheatley/gpio.inc
index 5cfa6c41bf..fd9ab56e95 100644
--- a/board/wheatley/gpio.inc
+++ b/board/wheatley/gpio.inc
@@ -5,32 +5,32 @@
  * found in the LICENSE file.
  */
 
-GPIO_INT(LID_OPEN,           PIN(9,  5), GPIO_INT_BOTH | GPIO_PULL_UP,    lid_interrupt)           /* B34 ->A47 SPIP_MISO for LID_OPEN_EC (CR_SOUT) */
+GPIO_INT(LID_OPEN,           PIN(9,  5), GPIO_INT_BOTH | GPIO_PULL_UP,    lid_interrupt)           /* A47 - SPIP_MISO for LID_OPEN_EC */
 GPIO_INT(AC_PRESENT,         PIN(7,  3), GPIO_INT_BOTH,                   extpower_interrupt)      /* B39 - PS2_CLK3/TA2 for EC_PCH_ACPRESENT */
-GPIO_INT(WP_L,               PIN(7,  1), GPIO_INT_BOTH,                   switch_interrupt)        /* B35 ->B38 PS2_DAT3/TB2 for EC_WP_L (GPO66/ARM#_x86) */
+GPIO_INT(WP_L,               PIN(7,  1), GPIO_INT_BOTH,                   switch_interrupt)        /* B38 - PS2_DAT3/TB2 for EC_WP_L */
 /* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */
-GPIO_INT(POWER_BUTTON_L,     PIN(9,  7), GPIO_INT_BOTH,                   power_button_interrupt)  /* A32 ->A48 GPIO97 for ROP_EC_PWR_BTN_L_R (CR_SIN) */
+GPIO_INT(POWER_BUTTON_L,     PIN(9,  7), GPIO_INT_BOTH,                   power_button_interrupt)  /* A48 - GPIO97 for ROP_EC_PWR_BTN_L_R */
 /* RSMRST from PMIC */
 GPIO_INT(RSMRST_L_PGOOD,     PIN(7,  2), GPIO_INT_BOTH,                   power_signal_interrupt)  /* A36 - PWRGD for ROP_EC_RSMRST_L */
-GPIO_INT(PCH_SLP_S4_L,       PIN(E,  0), GPIO_INT_BOTH,                   power_signal_interrupt)  /* A24 - GPIOE0 for SLP_S4_L */
-GPIO_INT(PCH_SLP_S3_L,       PIN(4,  0), GPIO_INT_BOTH,                   power_signal_interrupt)  /* A21 ->B21 TA1 for SLP_S3_L (ADC3) */
+GPIO_INT(PCH_SLP_S4_L,       PIN(5,  0), GPIO_INT_BOTH,                   power_signal_interrupt)  /* A25 - GPIO50 for SLP_S4_L */
+GPIO_INT(PCH_SLP_S3_L,       PIN(4,  0), GPIO_INT_BOTH,                   power_signal_interrupt)  /* B21 - TA1 for SLP_S3_L */
 /*
  * This pulldown should be removed in future hardware followers. The signal
  * is pulled up in the SoC when the primary rails are on and/or ramping.
  * In order to not get interrupt storms there should be external logic
  * which makes this a true binary signal into the EC.
  */
-GPIO_INT(PCH_SLP_S0_L,       PIN(D,  7), GPIO_INT_BOTH | GPIO_PULL_DOWN,  power_signal_interrupt)  /* A18 - GPIOD7 for SLP_S0_L */
+GPIO_INT(PCH_SLP_S0_L,       PIN(3,  4), GPIO_INT_BOTH | GPIO_PULL_DOWN,  power_signal_interrupt)  /* B18 - GPIO34 for SLP_S0_L */
 GPIO_INT(PCH_SLP_SUS_L,      PIN(B,  1), GPIO_INT_BOTH,                   power_signal_interrupt)  /* A54 - KSO17 for SLP_SUS_L_PCH */
-GPIO_INT(VOLUME_UP_L,        PIN(0,  0), GPIO_INT_FALLING | GPIO_PULL_UP, button_interrupt)        /* A16 ->B68 GPIO00 for VOLUME_UP_L (GPO32/TRIS#) */
+GPIO_INT(VOLUME_UP_L,        PIN(0,  0), GPIO_INT_FALLING | GPIO_PULL_UP, button_interrupt)        /* B68 - GPIO00 for VOLUME_UP_L */
 GPIO_INT(VOLUME_DOWN_L,      PIN(7,  0), GPIO_INT_FALLING | GPIO_PULL_UP, button_interrupt)        /* B36 - PS2_DAT0 for VOLUME_DOWN_L */
 GPIO_INT(PMIC_INT_L,         PIN(6,  2), GPIO_INT_FALLING,                power_signal_interrupt)  /* A31 - PS2_CLK1 for ROP_INT_L */
 GPIO_INT(PD_MCU_INT,         PIN(0,  2), GPIO_INT_FALLING | GPIO_PULL_UP, pd_mcu_interrupt)        /* A01 - GPIO02 for USB_MCU_EC_INT */
 GPIO_INT(USB_C0_VBUS_WAKE_L, PIN(A,  7), GPIO_INT_BOTH,                   vbus0_evt)               /* B56 - PS2_DAT3/TB2/F_DIO3 for USB_C0_VBUS_DET_L */
-GPIO_INT(USB_C1_VBUS_WAKE_L, PIN(E,  1), GPIO_INT_BOTH,                   vbus1_evt)               /* B30 - GPIOE1 for USB_C1_VBUS_DET_L */
-GPIO_INT(USB_C0_BC12_INT_L,  PIN(8,  5), GPIO_INT_FALLING,                usb0_evt)                /* B50 ->A43 RXD for USB_C0_BC12_INT_L (F_DIO1) */
+GPIO_INT(USB_C1_VBUS_WAKE_L, PIN(6,  1), GPIO_INT_BOTH,                   vbus1_evt)               /* B32 - GPIO61 for USB_C1_VBUS_DET_L */
+GPIO_INT(USB_C0_BC12_INT_L,  PIN(8,  5), GPIO_INT_FALLING,                usb0_evt)                /* A43 - RXD for USB_C0_BC12_INT_L */
 GPIO_INT(USB_C1_BC12_INT_L,  PIN(9,  4), GPIO_INT_FALLING,                usb1_evt)                /* B49 - GPIO94 for USB_C1_BC12_INT_L */
-GPIO_INT(TABLET_MODE_L,      PIN(E,  7), GPIO_INT_BOTH | GPIO_PULL_UP,    tablet_mode_interrupt)   /* B53 ->B37 32KCLKIN for TABLET_MODE_EC (F_SCLK) */
+GPIO_INT(TABLET_MODE_L,      PIN(E,  7), GPIO_INT_BOTH | GPIO_PULL_UP,    tablet_mode_interrupt)   /* B37 - 32KCLKIN for TABLET_MODE_EC */
 
 /* Delayed PWR_OK from PMIC */
 GPIO_INT(PMIC_DPWROK,        PIN(C,  3), GPIO_INT_BOTH,                   power_signal_interrupt)  /* A60 - PWM0 for ROP_DSW_PWROK_EC */
@@ -51,36 +51,36 @@ GPIO(I2C3_SDA,               PIN(D,  0), GPIO_INPUT)                      /* B66
 GPIO(PCH_SCI_L,              PIN(7,  6), GPIO_ODR_HIGH)                   /* A38 - SCI# for EC_SCI_L */
 /* KB BL PWM, only connected to TP */
 GPIO(PWM_KBLIGHT,            PIN(C,  4), GPIO_OUT_LOW)                    /* B64 - PWM2 for KB_BL_PWM */
-GPIO(USB1_ENABLE,            PIN(3,  2), GPIO_OUT_LOW)                    /* B68 ->A16 TRIS# for EN_USB_A0_PWR (GPIO00) */
+GPIO(USB1_ENABLE,            PIN(3,  2), GPIO_OUT_LOW)                    /* A16 - TRIS# for EN_USB_A0_PWR */
 GPIO(USB2_ENABLE,            PIN(D,  4), GPIO_OUT_LOW)                    /* B08 - JTAG_TDO1 for EN_USB_A1_PWR */
 GPIO(ENTERING_RW,            PIN(6,  0), GPIO_OUT_LOW)                    /* A30 - PWM7 for EC_ENTERING_RW */
 GPIO(PCH_SMI_L,              PIN(C,  6), GPIO_ODR_HIGH)                   /* B65 - SMI# for EC_SMI_L */
 GPIO(PCH_PWRBTN_L,           PIN(A,  5), GPIO_OUTPUT)                     /* A51 - A20M for EC_PCH_PWR_BTN_L */
 GPIO(USB_C0_DP_HPD,          PIN(6,  7), GPIO_OUT_LOW)                    /* A33 - PS2_CLK0 for USB_C0_DP_HPD */
 GPIO(USB_C1_DP_HPD,          PIN(3,  7), GPIO_OUT_LOW)                    /* B20 - PS2_CLK2 for USB_C1_DP_HPD */
-GPIO(CPU_PROCHOT,            PIN(3,  4), GPIO_OUT_LOW)                    /* B18 - PS2_DAT2 for EC_PCH_PROCHOT */
+GPIO(CPU_PROCHOT,            PIN(D,  7), GPIO_OUT_LOW)                    /* A18 - GPIOD7 for EC_PCH_PROCHOT */
 GPIO(ENABLE_TOUCHPAD,        PIN(A,  6), GPIO_OUT_LOW)                    /* B55 - PS2_CLK3/TA2/F_CS1# for TP_SHDN_L */
 GPIO(BAT_PRESENT_L,          PIN(4,  5), GPIO_INPUT)                      /* B24 - ADC0 for EC_BATT_TMP */
 GPIO(USB_PD_WAKE,            PIN(4,  3), GPIO_OUT_LOW)                    /* B23 - ADC2 for USB_PD_WAKE */
 /* When asserted, ME does not lock security descriptor */
 GPIO(PCH_SEC_DISABLE_L,      PIN(6,  3), GPIO_OUT_HIGH)                   /* B33 - PS2_DAT1 for FLASH_SECURITY_DISABLE_L */
-GPIO(PCH_WAKE_L,             PIN(3,  5), GPIO_ODR_HIGH)                   /* A62 ->A17 - GPIO35/TEST# for EC_PCH_WAKE_L */

-GPIO(EC_FAN1_TTACH,          PIN(9,  3), GPIO_INPUT | GPIO_PULL_UP)       /* A46 - TA1/F_DIO2 for EC_FAN1_TACH (testing only) */
+GPIO(PCH_WAKE_L,             PIN(3,  5), GPIO_ODR_HIGH)                   /* A17 - GPIO35/TEST# for EC_PCH_WAKE_L */

+GPIO(EC_FAN1_TTACH,          PIN(9,  3), GPIO_INPUT | GPIO_PULL_UP)       /* A46 - TA1/F_DIO2 for EC_FAN1_TACH */
 /* Fan PWM output - NC / testing only */
 GPIO(EC_FAN1_PWM,            PIN(C,  2), GPIO_OUT_LOW)                    /* A59 - PWM1 for EC_FAN1_PWM */
 GPIO(PCH_ACOK,               PIN(B,  0), GPIO_OUT_LOW)                    /* B57 - GPIOB0 for ROP_EC_ACOK */
 /* Interrupts from accelerometer / gyro -- not yet implemented */
 GPIO(ACCEL1_INT,             PIN(A,  3), GPIO_INPUT)                      /* A50 - SPIP_MOSI for ACCEL1_INT_L */
 GPIO(ACCEL2_INT,             PIN(3,  3), GPIO_INPUT)                      /* B17 - GPIO33 for ACCEL2_INT_L */
-GPIO(ACCEL3_INT,             PIN(8,  6), GPIO_INPUT)                      /* A17 ->B46 TXD/F_CS1# for ACCELGYRO3_INT_L (GPO35/TEST#) */
-GPIO(WLAN_OFF_L,             PIN(5,  0), GPIO_OUT_LOW)                    /* A17 ->A25 GPO50 for WLAN_OFF_L */

+GPIO(ACCEL3_INT,             PIN(8,  6), GPIO_INPUT)                      /* B46 - TXD/F_CS1# for ACCELGYRO3_INT_L */
+GPIO(WLAN_OFF_L,             PIN(E,  0), GPIO_OUT_LOW)                    /* A24 - GPOE0 for WLAN_OFF_L */

 /* RCIN# line to PCH for 8042 emulation */
 GPIO(PCH_RCIN_L,             PIN(C,  5), GPIO_ODR_HIGH)                   /* A61 - KBRST# for EC_PCH_RCIN_L */
-GPIO(USB2_OTG_VBUSSENSE,     PIN(D,  2), GPIO_OUT_LOW)                    /* B54 ->B67 GPIOD2 for USB2_OTG_VBUSSENSE (F_DIO0) */
+GPIO(USB2_OTG_VBUSSENSE,     PIN(D,  2), GPIO_OUT_LOW)                    /* B67 - GPIOD2 for USB2_OTG_VBUSSENSE */
 GPIO(PCH_RSMRST_L,           PIN(8,  4), GPIO_OUT_LOW)                    /* B45 - GPIO84 for RSMRST_L */
 /* prochot input from devices */
 GPIO(PLATFORM_EC_PROCHOT,    PIN(3,  6), GPIO_INPUT | GPIO_PULL_UP)       /* B19 - GPIO36 for PLATFORM_EC_PROCHOT */
-GPIO(USB_C0_5V_EN,           PIN(0,  1), GPIO_OUT_LOW)                    /* B60 ->B01 GPIO01 for EN_USB_C0_5V_OUT (GPOB6/PWM4/Eng_Strap#) */
+GPIO(USB_C0_5V_EN,           PIN(0,  1), GPIO_OUT_LOW)                    /* B01 - GPIO01 for EN_USB_C0_5V_OUT */
 GPIO(USB_C1_5V_EN,           PIN(E,  5), GPIO_OUT_LOW)                    /* B62 - JTAG_TMS1 for EN_USB_C1_5V_OUT */
 GPIO(USB_C0_CHARGE_EN_L,     PIN(D,  3), GPIO_OUT_LOW)                    /* A64 - TB1 for EN_USB_C0_CHARGE_EC_L */
 GPIO(PP1800_DX_SENSOR_EN,    PIN(0,  3), GPIO_OUT_LOW)                    /* B02 - KSO16 for EN_PP1800_DX_SENSOR */
@@ -90,10 +90,10 @@ GPIO(PP3300_WLAN_EN,         PIN(E,  4), GPIO_OUT_LOW)                    /* A52
 GPIO(BOARD_VERSION1,         PIN(0,  4), GPIO_INPUT)                      /* A02 - KSO13 for EC_BRD_ID1 */
 GPIO(BOARD_VERSION2,         PIN(8,  2), GPIO_INPUT)                      /* B43 - KSO14 for EC_BRD_ID2 */
 GPIO(BOARD_VERSION3,         PIN(8,  3), GPIO_INPUT)                      /* B44 - KSO15 for EC_BRD_ID3 */
-GPIO(SYS_RESET_L,            PIN(6,  1), GPIO_ODR_HIGH)	                  /* B32 - PWROFF# for SYS_RESET_L */
+GPIO(SYS_RESET_L,            PIN(E,  1), GPIO_ODR_HIGH)	                  /* B30 - GPIOE1 for SYS_RESET_L */
 
 /*
- * TODO(crosbug.com/p/40848): These LEDs should be under control of the mec1322
+ * TODO(crosbug.com/p/40848): These LEDs should be under control of the npcx
  * LED control unit. Remove these GPIO definitions once the LED control unit
  * is functional.
  */
@@ -111,7 +111,7 @@ GPIO(PP1800_DX_AUDIO_EN,     PIN(8,  0), GPIO_OUT_LOW)                    /* A39
 /* NC / stuffing option */
 GPIO(PCH_RTCRST,             PIN(C,  1), GPIO_INPUT | GPIO_PULL_UP)       /* A58 - GPIOC1 for EC_PCH_RTCRST */
 GPIO(PMIC_SLP_SUS_L,         PIN(E,  3), GPIO_OUT_LOW)                    /* B51 - GPIOE3 for SLP_SUS_L_PMIC */
-GPIO(USB_C1_CHARGE_EN_L,     PIN(C,  7), GPIO_OUT_LOW)                    /* B09 ->A62 - GPIOC7 for EN_USB_C1_CHARGE_EC_L */

+GPIO(USB_C1_CHARGE_EN_L,     PIN(C,  7), GPIO_OUT_LOW)                    /* A62 - GPIOC7 for EN_USB_C1_CHARGE_EC_L */

 
 /* Alternate functions GPIO definitions */