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authorBill Richardson <wfrichar@chromium.org>2015-11-30 16:47:06 -0800
committerchrome-bot <chrome-bot@chromium.org>2015-12-01 22:36:57 -0800
commit78c2a7ebd83a1c4132aad85a894469fc6d2bb33f (patch)
treed455973d4cfbc61e0bcac728e561b30e005f87b6
parentd263fa5266af980b1833c3a9555bd643a280c82e (diff)
downloadchrome-ec-78c2a7ebd83a1c4132aad85a894469fc6d2bb33f.tar.gz
Cr50: Clean up the GINTSTS USB macros
This just replaces a few manually created macros in chip/g/registers.h with a more programmatic version based on names in chip/g/hw_regdefs.h. BUG=chrome-os-partner:34893 BRANCH=none TEST=make buildall; run it No new functionality, just refactoring. Change-Id: I73ee2ee1ee3f53a0939000822c552deace46f154 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314937 Reviewed-by: Dominic Rizzo <domrizzo@google.com>
-rw-r--r--chip/g/registers.h11
-rw-r--r--chip/g/usb.c14
2 files changed, 9 insertions, 16 deletions
diff --git a/chip/g/registers.h b/chip/g/registers.h
index 9f6cbe702a..f3c724fb37 100644
--- a/chip/g/registers.h
+++ b/chip/g/registers.h
@@ -343,7 +343,9 @@ static inline int x_timehs_addr(unsigned int module, unsigned int timer,
#define GR_USB_GUSBCFG GR_USB_REG(GC_USB_GUSBCFG_OFFSET)
#define GR_USB_GRSTCTL GR_USB_REG(GC_USB_GRSTCTL_OFFSET)
#define GR_USB_GINTSTS GR_USB_REG(GC_USB_GINTSTS_OFFSET)
+#define GINTSTS(bit) (1 << GC_USB_GINTSTS_ ## bit ## _LSB)
#define GR_USB_GINTMSK GR_USB_REG(GC_USB_GINTMSK_OFFSET)
+#define GINTMSK(bit) (1 << GC_USB_GINTMSK_ ## bit ## MSK_LSB)
#define GR_USB_GRXSTSR GR_USB_REG(GC_USB_GRXSTSR_OFFSET)
#define GR_USB_GRXSTSP GR_USB_REG(GC_USB_GRXSTSP_OFFSET)
#define GR_USB_GRXFSIZ GR_USB_REG(GC_USB_GRXFSIZ_OFFSET)
@@ -442,15 +444,6 @@ static inline int x_timehs_addr(unsigned int module, unsigned int timer,
#define GRSTCTL_RXFFLSH (1 << GC_USB_GRSTCTL_RXFFLSH_LSB)
#define GRSTCTL_TXFNUM(n) (((n) << GC_USB_GRSTCTL_TXFNUM_LSB) & GC_USB_GRSTCTL_TXFNUM_MASK)
-#define GINTSTS_RXFLVL (1 << GC_USB_GINTSTS_RXFLVL_LSB)
-#define GINTSTS_SOF (1 << GC_USB_GINTSTS_SOF_LSB)
-#define GINTSTS_GOUTNAKEFF (1 << GC_USB_GINTMSK_GOUTNAKEFFMSK_LSB)
-#define GINTSTS_GINNAKEFF (1 << GC_USB_GINTMSK_GINNAKEFFMSK_LSB)
-#define GINTSTS_USBRST (1 << GC_USB_GINTMSK_USBRSTMSK_LSB)
-#define GINTSTS_ENUMDONE (1 << GC_USB_GINTMSK_ENUMDONEMSK_LSB)
-#define GINTSTS_IEPINT (1 << GC_USB_GINTSTS_IEPINT_LSB)
-#define GINTSTS_OEPINT (1 << GC_USB_GINTSTS_OEPINT_LSB)
-
#define DCFG_DEVSPD_FS (1 << GC_USB_DCFG_DEVSPD_LSB)
#define DCFG_DEVSPD_FS48 (3 << GC_USB_DCFG_DEVSPD_LSB)
#define DCFG_DEVADDR(a) (((a) << GC_USB_DCFG_DEVADDR_LSB) & GC_USB_DCFG_DEVADDR_MASK)
diff --git a/chip/g/usb.c b/chip/g/usb.c
index 13f061a229..f233b6bbc9 100644
--- a/chip/g/usb.c
+++ b/chip/g/usb.c
@@ -429,10 +429,10 @@ void usb_interrupt(void)
{
uint32_t status = GR_USB_GINTSTS;
- if (status & GINTSTS_USBRST)
+ if (status & GINTSTS(USBRST))
usb_reset();
- if (status & (GINTSTS_OEPINT | GINTSTS_IEPINT)) {
+ if (status & (GINTSTS(OEPINT) | GINTSTS(IEPINT))) {
uint32_t daint = GR_USB_DAINT;
int ep;
for (ep = 0; ep < USB_EP_COUNT && daint; ep++, daint >>= 1) {
@@ -443,10 +443,10 @@ void usb_interrupt(void)
}
}
- if (status & GINTSTS_GOUTNAKEFF)
+ if (status & GINTSTS(GOUTNAKEFF))
GR_USB_DCTL = DCTL_CGOUTNAK;
- if (status & GINTSTS_GINNAKEFF)
+ if (status & GINTSTS(GINNAKEFF))
GR_USB_DCTL = DCTL_CGNPINNAK;
/* ack interrupts */
@@ -588,9 +588,9 @@ void usb_init(void)
/* Enable interrupt handlers */
task_enable_irq(GC_IRQNUM_USB0_USBINTR);
/* set interrupts mask : reset/correct tranfer/errors */
- GR_USB_GINTMSK = GINTSTS_GOUTNAKEFF | GINTSTS_GINNAKEFF |
- GINTSTS_USBRST | GINTSTS_ENUMDONE |
- GINTSTS_OEPINT | GINTSTS_IEPINT;
+ GR_USB_GINTMSK = GINTSTS(GOUTNAKEFF) | GINTSTS(GINNAKEFF) |
+ GINTSTS(USBRST) | GINTSTS(ENUMDONE) |
+ GINTSTS(OEPINT) | GINTSTS(IEPINT);
#ifndef CONFIG_USB_INHIBIT_CONNECT
usb_connect();