summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorEwout van Bekkum <ewout@google.com>2016-01-14 15:20:21 -0800
committerchrome-bot <chrome-bot@chromium.org>2016-01-28 00:02:02 -0800
commit347f516d8444a95e0506640f116e102828b89527 (patch)
tree4912ed4c293297c54402b703f3315ab72ddfc3c9
parent7d0152a78b8b6947dd103c01d9fe380f5b55edf6 (diff)
downloadchrome-ec-347f516d8444a95e0506640f116e102828b89527.tar.gz
cr50: updates watchdog and hw clock to use hw regdefs
This commit updates the cr50 watchdog and hwtimer drivers to use the hardware header specified regdefs to determine the frequencies for the cr50 device. BRANCH=None TEST=Verified gettime and watchdog behavior on cr51 BUG=chrome-os-partner:46737 Change-Id: Iec7dc56b160dbec1b71077cecfd5561436d6f3ab Signed-off-by: Ewout van Bekkum <ewout@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/321867 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
-rw-r--r--chip/g/hwtimer.c6
-rw-r--r--chip/g/watchdog.c5
2 files changed, 5 insertions, 6 deletions
diff --git a/chip/g/hwtimer.c b/chip/g/hwtimer.c
index 3c1ef73759..7f5b87ee94 100644
--- a/chip/g/hwtimer.c
+++ b/chip/g/hwtimer.c
@@ -54,11 +54,9 @@ static void update_prescaler(void)
GC_TIMEHS_TIMER1CONTROL_PRE_LSB, 0);
/*
- * We're not yet doing anything to detect the current frequency, we're
- * just hard-coding it. We're also assuming the clock rate is an
- * integer multiple of MHz.
+ * Assume the clock rate is an integer multiple of MHz.
*/
- clock_mul_factor = 30; /* NOTE: prototype board */
+ clock_mul_factor = GC_CONST_FPGA_TIMER_FIXED_FREQ;
clock_div_factor = 0xffffffff / clock_mul_factor;
}
DECLARE_HOOK(HOOK_FREQ_CHANGE, update_prescaler, HOOK_PRIO_DEFAULT);
diff --git a/chip/g/watchdog.c b/chip/g/watchdog.c
index 0568e27161..84ef15cd76 100644
--- a/chip/g/watchdog.c
+++ b/chip/g/watchdog.c
@@ -16,8 +16,9 @@
/* magic value to unlock the watchdog registers */
#define WATCHDOG_MAGIC_WORD 0x1ACCE551
-/* Watchdog expiration : assume 30 Mhz clock for now */
-#define WATCHDOG_PERIOD (CONFIG_WATCHDOG_PERIOD_MS * (30000000 / 1000))
+/* Watchdog expiration */
+#define WATCHDOG_PERIOD (CONFIG_WATCHDOG_PERIOD_MS * \
+ ((GC_CONST_FPGA_JITTER_FIXED_FREQ * 1000000) / 1000))
void trace_and_reset(uint32_t excep_lr, uint32_t excep_sp)
{