diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2016-01-20 18:50:25 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-01-21 12:43:04 -0800 |
| commit | 89bcc93547212bd915b46a4c6df7f4e754cc4f0f (patch) | |
| tree | 05baee4fd6499e1ef876e7c6184ce9584382d832 | |
| parent | d83482a3b0d242ef4b6fa76500fc58a5c5c48122 (diff) | |
| download | chrome-ec-89bcc93547212bd915b46a4c6df7f4e754cc4f0f.tar.gz | |
stm32f0: flash: Don't check protect bits for flash that doesn't exist
Each pair of protect bits locks 4K, so for parts with 64K flash, don't
bother checking STM32_OPTB_WRP23.
BUG=chrome-os-partner:49354
TEST=Run flashrom to protect PD MCU (see repro steps on linked crbug),
reboot and verify system boots into dev mode with all_at_boot and
all_now protect flags set on PD MCU.
BRANCH=glados
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ic375d97c30bfd68940350641c44d5535b0402a2f
Reviewed-on: https://chromium-review.googlesource.com/322823
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | chip/stm32/flash-stm32f0.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/chip/stm32/flash-stm32f0.c b/chip/stm32/flash-stm32f0.c index 85e65c6ac4..229fd108af 100644 --- a/chip/stm32/flash-stm32f0.c +++ b/chip/stm32/flash-stm32f0.c @@ -21,13 +21,18 @@ uint32_t flash_physical_get_protect_flags(void) { uint32_t flags = 0; uint32_t wrp01 = REG32(STM32_OPTB_BASE + STM32_OPTB_WRP01); +#if CONFIG_FLASH_SIZE > 64 * 1024 uint32_t wrp23 = REG32(STM32_OPTB_BASE + STM32_OPTB_WRP23); +#endif if (STM32_FLASH_WRPR == 0) flags |= EC_FLASH_PROTECT_ALL_NOW; - if (wrp01 == 0xff00ff00 && wrp23 == 0xff00ff00) - flags |= EC_FLASH_PROTECT_ALL_AT_BOOT; + if (wrp01 == 0xff00ff00) +#if CONFIG_FLASH_SIZE > 64 * 1024 + if (wrp23 == 0xff00ff00) +#endif + flags |= EC_FLASH_PROTECT_ALL_AT_BOOT; return flags; } |