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authorAnton Staaf <robotboy@chromium.org>2015-07-22 09:11:46 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-07-27 19:30:44 +0000
commit4626177c3b055fdbab6344065d9b335a40ea1c1e (patch)
treea704de5752df739253b0a4b2dcb350075087a1eb
parent3e9bd8027c9317dbf12cdd59d735efd47fb3f1f4 (diff)
downloadchrome-ec-4626177c3b055fdbab6344065d9b335a40ea1c1e.tar.gz
Atomic: Mark the modified uint32_t volatile
The atomic_* functions are often used in contexts where the data they will operate on are volatile (due to being shared between tasks or a task and an interrupt handler). Adding volatile here makes using the atomic_* functions a little easier in those cases and removes a cast from the call sites (which could be obscuring a bug, if for instance the variable was modified to be a uint16_t). Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I71356eb3cf2c0506df38532eee767c7d78f9240e Reviewed-on: https://chromium-review.googlesource.com/287516 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
-rw-r--r--board/twinkie/sniffer.c4
-rw-r--r--chip/stm32/usart_rx_interrupt.c2
-rw-r--r--core/cortex-m/atomic.h10
-rw-r--r--core/cortex-m0/atomic.h10
-rw-r--r--core/host/atomic.h10
-rw-r--r--core/nds32/atomic.h10
6 files changed, 23 insertions, 23 deletions
diff --git a/board/twinkie/sniffer.c b/board/twinkie/sniffer.c
index 2842742627..bb2f0834a5 100644
--- a/board/twinkie/sniffer.c
+++ b/board/twinkie/sniffer.c
@@ -296,9 +296,9 @@ void sniffer_task(void)
ep_buf[u][1] = sample_tstamp[d >> 3];
memcpy_to_usbram(((void *)usb_sram_addr(ep_buf[u] + 2)),
samples[d >> 4]+off, EP_PAYLOAD_SIZE);
- atomic_clear((uint32_t *)&free_usb, 1 << u);
+ atomic_clear(&free_usb, 1 << u);
u = !u;
- atomic_clear((uint32_t *)&filled_dma, 1 << d);
+ atomic_clear(&filled_dma, 1 << d);
}
led_reset_record();
diff --git a/chip/stm32/usart_rx_interrupt.c b/chip/stm32/usart_rx_interrupt.c
index 6a46b3fb11..ea1b4a4c6a 100644
--- a/chip/stm32/usart_rx_interrupt.c
+++ b/chip/stm32/usart_rx_interrupt.c
@@ -31,7 +31,7 @@ static void usart_rx_interrupt_handler(struct usart_config const *config)
byte = STM32_USART_RDR(base);
if (!queue_add_unit(config->producer.queue, &byte))
- atomic_add((uint32_t *) &config->state->rx_dropped, 1);
+ atomic_add(&config->state->rx_dropped, 1);
}
struct usart_rx const usart_rx_interrupt = {
diff --git a/core/cortex-m/atomic.h b/core/cortex-m/atomic.h
index 489db51357..a39f816008 100644
--- a/core/cortex-m/atomic.h
+++ b/core/cortex-m/atomic.h
@@ -30,27 +30,27 @@
: "r" (a), "r" (v) : "cc"); \
} while (0)
-static inline void atomic_clear(uint32_t *addr, uint32_t bits)
+static inline void atomic_clear(uint32_t volatile *addr, uint32_t bits)
{
ATOMIC_OP(bic, addr, bits);
}
-static inline void atomic_or(uint32_t *addr, uint32_t bits)
+static inline void atomic_or(uint32_t volatile *addr, uint32_t bits)
{
ATOMIC_OP(orr, addr, bits);
}
-static inline void atomic_add(uint32_t *addr, uint32_t value)
+static inline void atomic_add(uint32_t volatile *addr, uint32_t value)
{
ATOMIC_OP(add, addr, value);
}
-static inline void atomic_sub(uint32_t *addr, uint32_t value)
+static inline void atomic_sub(uint32_t volatile *addr, uint32_t value)
{
ATOMIC_OP(sub, addr, value);
}
-static inline uint32_t atomic_read_clear(uint32_t *addr)
+static inline uint32_t atomic_read_clear(uint32_t volatile *addr)
{
uint32_t ret, tmp;
diff --git a/core/cortex-m0/atomic.h b/core/cortex-m0/atomic.h
index 62bc2ff370..32260ada07 100644
--- a/core/cortex-m0/atomic.h
+++ b/core/cortex-m0/atomic.h
@@ -27,27 +27,27 @@
: "b" (a), "r" (v) : "cc"); \
} while (0)
-static inline void atomic_clear(uint32_t *addr, uint32_t bits)
+static inline void atomic_clear(uint32_t volatile *addr, uint32_t bits)
{
ATOMIC_OP(bic, addr, bits);
}
-static inline void atomic_or(uint32_t *addr, uint32_t bits)
+static inline void atomic_or(uint32_t volatile *addr, uint32_t bits)
{
ATOMIC_OP(orr, addr, bits);
}
-static inline void atomic_add(uint32_t *addr, uint32_t value)
+static inline void atomic_add(uint32_t volatile *addr, uint32_t value)
{
ATOMIC_OP(add, addr, value);
}
-static inline void atomic_sub(uint32_t *addr, uint32_t value)
+static inline void atomic_sub(uint32_t volatile *addr, uint32_t value)
{
ATOMIC_OP(sub, addr, value);
}
-static inline uint32_t atomic_read_clear(uint32_t *addr)
+static inline uint32_t atomic_read_clear(uint32_t volatile *addr)
{
uint32_t ret;
diff --git a/core/host/atomic.h b/core/host/atomic.h
index 77e9cc6ba8..17721390f8 100644
--- a/core/host/atomic.h
+++ b/core/host/atomic.h
@@ -10,27 +10,27 @@
#include "common.h"
-static inline void atomic_clear(uint32_t *addr, uint32_t bits)
+static inline void atomic_clear(uint32_t volatile *addr, uint32_t bits)
{
__sync_and_and_fetch(addr, ~bits);
}
-static inline void atomic_or(uint32_t *addr, uint32_t bits)
+static inline void atomic_or(uint32_t volatile *addr, uint32_t bits)
{
__sync_or_and_fetch(addr, bits);
}
-static inline void atomic_add(uint32_t *addr, uint32_t value)
+static inline void atomic_add(uint32_t volatile *addr, uint32_t value)
{
__sync_add_and_fetch(addr, value);
}
-static inline void atomic_sub(uint32_t *addr, uint32_t value)
+static inline void atomic_sub(uint32_t volatile *addr, uint32_t value)
{
__sync_sub_and_fetch(addr, value);
}
-static inline uint32_t atomic_read_clear(uint32_t *addr)
+static inline uint32_t atomic_read_clear(uint32_t volatile *addr)
{
return __sync_fetch_and_and(addr, 0);
}
diff --git a/core/nds32/atomic.h b/core/nds32/atomic.h
index 3214067c43..2b49dfe5c1 100644
--- a/core/nds32/atomic.h
+++ b/core/nds32/atomic.h
@@ -11,7 +11,7 @@
#include "common.h"
#include "cpu.h"
-static inline void atomic_clear(uint32_t *addr, uint32_t bits)
+static inline void atomic_clear(uint32_t volatile *addr, uint32_t bits)
{
uint32_t psw = get_psw();
asm volatile ("setgie.d");
@@ -19,7 +19,7 @@ static inline void atomic_clear(uint32_t *addr, uint32_t bits)
set_psw(psw);
}
-static inline void atomic_or(uint32_t *addr, uint32_t bits)
+static inline void atomic_or(uint32_t volatile *addr, uint32_t bits)
{
uint32_t psw = get_psw();
asm volatile ("setgie.d");
@@ -27,7 +27,7 @@ static inline void atomic_or(uint32_t *addr, uint32_t bits)
set_psw(psw);
}
-static inline void atomic_add(uint32_t *addr, uint32_t value)
+static inline void atomic_add(uint32_t volatile *addr, uint32_t value)
{
uint32_t psw = get_psw();
asm volatile ("setgie.d");
@@ -35,7 +35,7 @@ static inline void atomic_add(uint32_t *addr, uint32_t value)
set_psw(psw);
}
-static inline void atomic_sub(uint32_t *addr, uint32_t value)
+static inline void atomic_sub(uint32_t volatile *addr, uint32_t value)
{
uint32_t psw = get_psw();
asm volatile ("setgie.d");
@@ -43,7 +43,7 @@ static inline void atomic_sub(uint32_t *addr, uint32_t value)
set_psw(psw);
}
-static inline uint32_t atomic_read_clear(uint32_t *addr)
+static inline uint32_t atomic_read_clear(uint32_t volatile *addr)
{
uint32_t val;
uint32_t psw = get_psw();