Move CLZ emulation to common code

Move the CLZ instruction emulation C code to the common directory, so it
can be reused for all CPU cores missing a CLZ instruction (e.g. CortexM0).

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=run EC console on STM32F072B Discovery board with Cortex-M0 core,
and pass all available unit-tests on target.

Change-Id: Ief56cac7430fcb0fbced8a8925250c89cbd0bcfc
Reviewed-on: https://chromium-review.googlesource.com/188981
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>

5 files changed, 51 insertions, 39 deletions

diff --git a/common/build.mk b/common/build.mk
index 40b393bc09..fc28dcc0fe 100644
--- a/common/build.mk
+++ b/common/build.mk
@@ -53,6 +53,7 @@ common-$(CONFIG_POWER_BUTTON_X86)+=power_button_x86.o
 common-$(CONFIG_PSTORE)+=pstore_commands.o
 common-$(CONFIG_PWM)+=pwm.o
 common-$(CONFIG_PWM_KBLIGHT)+=pwm_kblight.o
+common-$(CONFIG_SOFTWARE_CLZ)+=clz.o
 common-$(CONFIG_SWITCH)+=switch.o
 common-$(CONFIG_TEMP_SENSOR)+=temp_sensor.o thermal.o
 common-$(CONFIG_USB_PORT_POWER_DUMB)+=usb_port_power_dumb.o
diff --git a/common/clz.c b/common/clz.c
new file mode 100644
index 0000000000..30c987e367
--- /dev/null
+++ b/common/clz.c
@@ -0,0 +1,42 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Software emulation for CLZ instruction
+ */
+
+/**
+ * Count leading zeros
+ *
+ * @param x non null integer.
+ * @return the number of leading 0-bits in x,
+ * starting at the most significant bit position.
+ */
+int __clzsi2(int x)
+{
+	int r = 0;
+
+	if (!x)
+		return 32;
+	if (!(x & 0xffff0000u)) {
+		x <<= 16;
+		r += 16;
+	}
+	if (!(x & 0xff000000u)) {
+		x <<= 8;
+		r += 8;
+	}
+	if (!(x & 0xf0000000u)) {
+		x <<= 4;
+		r += 4;
+	}
+	if (!(x & 0xc0000000u)) {
+		x <<= 2;
+		r += 2;
+	}
+	if (!(x & 0x80000000u)) {
+		x <<= 1;
+		r += 1;
+	}
+	return r;
+}
diff --git a/core/nds32/config_core.h b/core/nds32/config_core.h
index d7a25d27da..750d47b016 100644
--- a/core/nds32/config_core.h
+++ b/core/nds32/config_core.h
@@ -10,6 +10,11 @@
 #define BFD_ARCH nds32
 #define BFD_FORMAT "elf32-nds32le"
 
+/*
+ * The Andestar v3m architecture has no CLZ instruction (contrary to v3),
+ * so let's use the software implementation.
+ */
+#define CONFIG_SOFTWARE_CLZ
 
 /*
  * Force the compiler to use a proper relocation when accessing an external
diff --git a/core/nds32/cpu.c b/core/nds32/cpu.c
index e4dc5db94c..545e930eca 100644
--- a/core/nds32/cpu.c
+++ b/core/nds32/cpu.c
@@ -11,42 +11,3 @@ void cpu_init(void)
 {
 	/* DLM initialization is done in init.S */
 }
-
-/**
- * Count leading zeros
- *
- * @param x non null integer.
- * @return the number of leading 0-bits in x,
- * starting at the most significant bit position.
- *
- * The Andestar v3m architecture has no CLZ instruction (contrary to v3),
- * so let's use the software implementation.
- */
-int __clzsi2(int x)
-{
-	int r = 0;
-
-	if (!x)
-		return 32;
-	if (!(x & 0xffff0000u)) {
-		x <<= 16;
-		r += 16;
-	}
-	if (!(x & 0xff000000u)) {
-		x <<= 8;
-		r += 8;
-	}
-	if (!(x & 0xf0000000u)) {
-		x <<= 4;
-		r += 4;
-	}
-	if (!(x & 0xc0000000u)) {
-		x <<= 2;
-		r += 2;
-	}
-	if (!(x & 0x80000000u)) {
-		x <<= 1;
-		r += 1;
-	}
-	return r;
-}
diff --git a/include/config.h b/include/config.h
index 4950c0ba5a..a8e52f5c7b 100644
--- a/include/config.h
+++ b/include/config.h
@@ -656,6 +656,9 @@
 /* Allow the board to use a GPIO for the SCI# signal. */
 #undef CONFIG_SCI_GPIO
 
+/* Emulate the CLZ (Count Leading Zeros) in software for CPU lacking support */
+#undef CONFIG_SOFTWARE_CLZ
+
 /* Support SPI interfaces */
 #undef CONFIG_SPI