Create board directory for Slippy.

This just copies the board/link stuff into board/slippy (with one formatting
tweak to pass the presubmit check). It builds, but of course is useless.
Customization will follow later.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

  cd src/platform/ec
  make BOARD=slippy

Change-Id: I2ba62812d9199eec776f9da6732921c6281762ab
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49130
Reviewed-by: Randall Spangler <rspangler@chromium.org>

4 files changed, 444 insertions, 0 deletions

diff --git a/board/slippy/board.c b/board/slippy/board.c
new file mode 100644
index 0000000000..ba1a26679d
--- /dev/null
+++ b/board/slippy/board.c
@@ -0,0 +1,194 @@
+/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+/* EC for Link board configuration */
+
+#include "adc.h"
+#include "chip_temp_sensor.h"
+#include "common.h"
+#include "extpower.h"
+#include "gpio.h"
+#include "i2c.h"
+#include "keyboard_scan.h"
+#include "lid_switch.h"
+#include "lm4_adc.h"
+#include "peci.h"
+#include "registers.h"
+#include "switch.h"
+#include "temp_sensor.h"
+#include "timer.h"
+#include "tmp006.h"
+#include "util.h"
+#include "x86_power.h"
+
+/* GPIO signal list.  Must match order from enum gpio_signal. */
+const struct gpio_info gpio_list[GPIO_COUNT] = {
+	/* Inputs with interrupt handlers are first for efficiency */
+	{"POWER_BUTTON_L",       LM4_GPIO_K, (1<<7), GPIO_INT_BOTH,
+	 switch_interrupt},
+	{"LID_OPEN",             LM4_GPIO_K, (1<<5), GPIO_INT_BOTH,
+	 lid_interrupt},
+	/* Other inputs */
+	{"THERMAL_DATA_READY_L", LM4_GPIO_B, (1<<4), 0, NULL},
+	{"AC_PRESENT",           LM4_GPIO_H, (1<<3), GPIO_INT_BOTH,
+	 extpower_interrupt},
+	{"BOARD_VERSION1",       LM4_GPIO_H, (1<<6), 0, NULL},
+	{"BOARD_VERSION2",       LM4_GPIO_L, (1<<6), 0, NULL},
+	{"BOARD_VERSION3",       LM4_GPIO_L, (1<<7), 0, NULL},
+	{"PCH_BKLTEN",           LM4_GPIO_J, (1<<3), GPIO_INT_BOTH,
+	 switch_interrupt},
+	{"PCH_SLP_A_L",          LM4_GPIO_G, (1<<5), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PCH_SLP_ME_CSW_DEV_L", LM4_GPIO_G, (1<<4), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PCH_SLP_S3_L",         LM4_GPIO_J, (1<<0), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PCH_SLP_S4_L",         LM4_GPIO_J, (1<<1), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PCH_SLP_S5_L",         LM4_GPIO_J, (1<<2), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PCH_SLP_SUS_L",        LM4_GPIO_G, (1<<3), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PCH_SUSWARN_L",        LM4_GPIO_G, (1<<2), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PGOOD_1_5V_DDR",       LM4_GPIO_K, (1<<0), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PGOOD_1_5V_PCH",       LM4_GPIO_K, (1<<1), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PGOOD_1_8VS",          LM4_GPIO_K, (1<<3), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PGOOD_5VALW",          LM4_GPIO_H, (1<<0), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PGOOD_CPU_CORE",       LM4_GPIO_M, (1<<3), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PGOOD_VCCP",           LM4_GPIO_K, (1<<2), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PGOOD_VCCSA",          LM4_GPIO_H, (1<<1), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"PGOOD_VGFX_CORE",      LM4_GPIO_D, (1<<2), GPIO_INT_BOTH,
+	 x86_power_interrupt},
+	{"RECOVERY_L",           LM4_GPIO_H, (1<<7), GPIO_INT_BOTH,
+	 switch_interrupt},
+	{"USB1_STATUS_L",        LM4_GPIO_E, (1<<7), 0, NULL},
+	{"USB2_STATUS_L",        LM4_GPIO_E, (1<<1), 0, NULL},
+	{"WRITE_PROTECT",        LM4_GPIO_J, (1<<4), GPIO_INT_BOTH,
+	 switch_interrupt},
+	/* Outputs; all unasserted by default except for reset signals */
+	{"CPU_PROCHOT",          LM4_GPIO_F, (1<<2), GPIO_OUT_LOW, NULL},
+	{"ENABLE_1_5V_DDR",      LM4_GPIO_H, (1<<5), GPIO_OUT_LOW, NULL},
+	{"ENABLE_5VALW",         LM4_GPIO_K, (1<<4), GPIO_OUT_HIGH, NULL},
+	{"ENABLE_BACKLIGHT",     LM4_GPIO_H, (1<<4), GPIO_OUT_LOW, NULL},
+	{"ENABLE_TOUCHPAD",      LM4_GPIO_C, (1<<6), GPIO_OUT_LOW, NULL},
+	{"ENABLE_VCORE",         LM4_GPIO_F, (1<<7), GPIO_OUT_LOW, NULL},
+	{"ENABLE_VS",            LM4_GPIO_G, (1<<6), GPIO_OUT_LOW, NULL},
+	{"ENABLE_WLAN",          LM4_GPIO_Q, (1<<5), GPIO_OUT_LOW, NULL},
+	{"ENTERING_RW",          LM4_GPIO_J, (1<<5), GPIO_OUT_LOW, NULL},
+	{"LIGHTBAR_RESET_L",     LM4_GPIO_B, (1<<1), GPIO_OUT_LOW, NULL},
+	{"PCH_A20GATE",          LM4_GPIO_Q, (1<<6), GPIO_OUT_LOW, NULL},
+	{"PCH_DPWROK",           LM4_GPIO_G, (1<<0), GPIO_OUT_LOW, NULL},
+	/*
+	 * HDA_SDO is technically an output, but we need to leave it as an
+	 * input until we drive it high.  So can't use open-drain (HI_Z).
+	 */
+	{"PCH_HDA_SDO",          LM4_GPIO_G, (1<<1), GPIO_INPUT, NULL},
+	{"PCH_WAKE_L",           LM4_GPIO_F, (1<<0), GPIO_OUT_HIGH, NULL},
+	{"PCH_NMI_L",            LM4_GPIO_M, (1<<2), GPIO_OUT_HIGH, NULL},
+	{"PCH_PWRBTN_L",         LM4_GPIO_G, (1<<7), GPIO_OUT_HIGH, NULL},
+	{"PCH_PWROK",            LM4_GPIO_F, (1<<5), GPIO_OUT_LOW, NULL},
+	{"PCH_RCIN_L",           LM4_GPIO_Q, (1<<7), GPIO_HI_Z, NULL},
+	{"PCH_RSMRST_L",         LM4_GPIO_F, (1<<1), GPIO_OUT_LOW, NULL},
+	{"PCH_RTCRST_L",         LM4_GPIO_F, (1<<6), GPIO_HI_Z, NULL},
+	{"PCH_SMI_L",            LM4_GPIO_F, (1<<4), GPIO_OUT_HIGH, NULL},
+	{"PCH_SRTCRST_L",        LM4_GPIO_C, (1<<7), GPIO_HI_Z, NULL},
+	{"PCH_SUSACK_L",         LM4_GPIO_F, (1<<3), GPIO_OUT_HIGH, NULL},
+	{"RADIO_ENABLE_WLAN",    LM4_GPIO_D, (1<<0), GPIO_OUT_LOW, NULL},
+	{"RADIO_ENABLE_BT",      LM4_GPIO_D, (1<<1), GPIO_OUT_LOW, NULL},
+	{"SPI_CS_L",             LM4_GPIO_A, (1<<3), GPIO_HI_Z, NULL},
+	{"TOUCHSCREEN_RESET_L",  LM4_GPIO_B, (1<<0), GPIO_OUT_LOW, NULL},
+	{"USB1_CTL1",            LM4_GPIO_E, (1<<2), GPIO_OUT_LOW, NULL},
+	{"USB1_CTL2",            LM4_GPIO_E, (1<<3), GPIO_OUT_LOW, NULL},
+	{"USB1_CTL3",            LM4_GPIO_E, (1<<4), GPIO_OUT_LOW, NULL},
+	{"USB1_ENABLE",          LM4_GPIO_E, (1<<5), GPIO_OUT_LOW, NULL},
+	{"USB1_ILIM_SEL",        LM4_GPIO_E, (1<<6), GPIO_OUT_LOW, NULL},
+	{"USB2_CTL1",            LM4_GPIO_D, (1<<4), GPIO_OUT_LOW, NULL},
+	{"USB2_CTL2",            LM4_GPIO_D, (1<<5), GPIO_OUT_LOW, NULL},
+	{"USB2_CTL3",            LM4_GPIO_D, (1<<6), GPIO_OUT_LOW, NULL},
+	{"USB2_ENABLE",          LM4_GPIO_D, (1<<7), GPIO_OUT_LOW, NULL},
+	{"USB2_ILIM_SEL",        LM4_GPIO_E, (1<<0), GPIO_OUT_LOW, NULL},
+};
+
+/* ADC channels. Must be in the exactly same order as in enum adc_channel. */
+const struct adc_t adc_channels[ADC_CH_COUNT] = {
+	/* EC internal temperature is calculated by
+	 * 273 + (295 - 450 * ADC_VALUE / ADC_READ_MAX) / 2
+	 * = -225 * ADC_VALUE / ADC_READ_MAX + 420.5
+	 */
+	{"ECTemp", LM4_ADC_SEQ0, -225, ADC_READ_MAX, 420,
+	 LM4_AIN_NONE, 0x0e /* TS0 | IE0 | END0 */, 0, 0},
+
+	/* Charger current is mapped from 0~4000mA to 0~1.6V.
+	 * And ADC maps 0~3.3V to ADC_READ_MAX.
+	 */
+	{"ChargerCurrent", LM4_ADC_SEQ1, 33 * 4000, ADC_READ_MAX * 16, 0,
+	 LM4_AIN(11), 0x06 /* IE0 | END0 */, LM4_GPIO_B, (1<<5)},
+};
+
+/* I2C ports */
+const struct i2c_port_t i2c_ports[I2C_PORTS_USED] = {
+	/* Note: battery and charger share a port.  Only include it once in
+	 * this list so we don't double-initialize it. */
+	{"batt_chg", I2C_PORT_BATTERY,  100},
+	{"lightbar", I2C_PORT_LIGHTBAR, 400},
+	{"thermal",  I2C_PORT_THERMAL,  100},
+};
+
+#define TEMP_PCH_REG_ADDR	((0x41 << 1) | I2C_FLAG_BIG_ENDIAN)
+#define TEMP_CHARGER_REG_ADDR	((0x43 << 1) | I2C_FLAG_BIG_ENDIAN)
+#define TEMP_USB_REG_ADDR	((0x46 << 1) | I2C_FLAG_BIG_ENDIAN)
+#define TEMP_HINGE_REG_ADDR	((0x44 << 1) | I2C_FLAG_BIG_ENDIAN)
+
+#define TEMP_PCH_ADDR TMP006_ADDR(I2C_PORT_THERMAL, TEMP_PCH_REG_ADDR)
+#define TEMP_CHARGER_ADDR TMP006_ADDR(I2C_PORT_THERMAL, TEMP_CHARGER_REG_ADDR)
+#define TEMP_USB_ADDR TMP006_ADDR(I2C_PORT_THERMAL, TEMP_USB_REG_ADDR)
+#define TEMP_HINGE_ADDR TMP006_ADDR(I2C_PORT_THERMAL, TEMP_HINGE_REG_ADDR)
+
+/* Temperature sensors data; must be in same order as enum temp_sensor_id. */
+const struct temp_sensor_t temp_sensors[TEMP_SENSOR_COUNT] = {
+#ifdef CONFIG_TMP006
+	{"I2C-USB C-Die", TEMP_SENSOR_TYPE_IGNORED, tmp006_get_val, 0, 7},
+	{"I2C-USB C-Object", TEMP_SENSOR_TYPE_IGNORED, tmp006_get_val, 1, 7},
+	{"I2C-PCH D-Die", TEMP_SENSOR_TYPE_BOARD, tmp006_get_val, 2, 7},
+	{"I2C-PCH D-Object", TEMP_SENSOR_TYPE_CASE, tmp006_get_val, 3, 7},
+	{"I2C-Hinge C-Die", TEMP_SENSOR_TYPE_IGNORED, tmp006_get_val, 4, 7},
+	{"I2C-Hinge C-Object", TEMP_SENSOR_TYPE_IGNORED, tmp006_get_val, 5, 7},
+	{"I2C-Charger D-Die", TEMP_SENSOR_TYPE_BOARD, tmp006_get_val, 6, 7},
+	{"I2C-Charger D-Object", TEMP_SENSOR_TYPE_CASE, tmp006_get_val, 7, 7},
+#endif
+#ifdef CONFIG_ADC
+	{"ECInternal", TEMP_SENSOR_TYPE_BOARD, chip_temp_sensor_get_val, 0, 4},
+#endif
+#ifdef CONFIG_PECI
+	{"PECI", TEMP_SENSOR_TYPE_CPU, peci_temp_sensor_get_val, 0, 2},
+#endif
+};
+
+const struct tmp006_t tmp006_sensors[TMP006_COUNT] = {
+	{"USB C", TEMP_USB_ADDR},
+	{"PCH D", TEMP_PCH_ADDR},
+	{"Hinge C", TEMP_HINGE_ADDR},
+	{"Charger D", TEMP_CHARGER_ADDR},
+};
+
+struct keyboard_scan_config keyscan_config = {
+	.output_settle_us = 40,
+	.debounce_down_us = 6 * MSEC,
+	.debounce_up_us = 30 * MSEC,
+	.scan_period_us = 1500,
+	.min_post_scan_delay_us = 1000,
+	.poll_timeout_us = SECOND,
+	.actual_key_mask = {
+		0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
+		0xa4, 0xff, 0xf6, 0x55, 0xfa, 0xc8  /* full set */
+	},
+};
diff --git a/board/slippy/board.h b/board/slippy/board.h
new file mode 100644
index 0000000000..e117d65696
--- /dev/null
+++ b/board/slippy/board.h
@@ -0,0 +1,208 @@
+/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Configuration for Link mainboard */
+
+#ifndef __BOARD_H
+#define __BOARD_H
+
+/* Debug features */
+#define CONFIG_ASSERT_HELP
+#define CONFIG_CONSOLE_CMDHELP
+#define CONFIG_PANIC_HELP
+#define CONFIG_TASK_PROFILING
+
+/* Optional features */
+#define CONFIG_SMART_BATTERY
+#define CONFIG_BATTERY_LINK
+#define CONFIG_CHARGER
+#define CONFIG_CHARGER_BQ24725
+#ifdef HAS_TASK_CHIPSET
+#define CONFIG_CHIPSET_X86
+#endif
+#define CONFIG_CUSTOM_KEYSCAN
+#define CONFIG_EXTPOWER_GPIO
+#ifdef HAS_TASK_KEYPROTO
+#define CONFIG_KEYBOARD_PROTOCOL_8042
+#endif
+#define CONFIG_LID_SWITCH
+#define CONFIG_LPC
+#define CONFIG_ONEWIRE
+#define CONFIG_ONEWIRE_LED
+#define CONFIG_PECI
+#define CONFIG_PWM
+#define CONFIG_TEMP_SENSOR
+#define CONFIG_TMP006
+#define CONFIG_USB_CHARGE
+
+#ifndef __ASSEMBLER__
+
+/* Fan PWM channels */
+#define FAN_CH_CPU       0  /* CPU fan */
+#define FAN_CH_KBLIGHT   1  /* Keyboard backlight */
+#define FAN_CH_POWER_LED 5  /* Power adapter LED */
+
+enum adc_channel {
+	/* EC internal die temperature in degrees K. */
+	ADC_CH_EC_TEMP = 0,
+	/* Charger current in mA. */
+	ADC_CH_CHARGER_CURRENT,
+
+	ADC_CH_COUNT
+};
+
+/* Charger module */
+/* Set charger input current limit
+ * Note - this value should depend on external power adapter,
+ *        designed charging voltage, and the maximum power of
+ *        a running system.
+ *        Following value 4032 mA is the maximum input limit
+ *        on Link's design.
+ */
+#define CONFIG_CHARGER_INPUT_CURRENT 4032
+#define CONFIG_BQ24725_R_SNS 10 /* 10 mOhm charge sense resistor */
+#define CONFIG_BQ24725_R_AC  20 /* 20 mOhm input current sense resistor */
+
+/* Board specific charging current limit
+ * The current constrant of all components on the charging path.
+ */
+#define CONFIG_CHARGING_CURRENT_LIMIT 3000 /* PL102 inductor 3.0A(3.8A) */
+
+/* I2C ports */
+#define I2C_PORT_BATTERY 0
+#define I2C_PORT_CHARGER 0  /* Note: proto0 used port 1 */
+#define I2C_PORT_THERMAL 5
+#define I2C_PORT_LIGHTBAR 1
+#define I2C_PORT_REGULATOR 0
+/* There are only 3 I2C ports used because battery and charger share a port */
+#define I2C_PORTS_USED 3
+
+/* 13x8 keyboard scanner uses an entire GPIO bank for row inputs */
+#define KB_SCAN_ROW_IRQ  LM4_IRQ_GPION
+#define KB_SCAN_ROW_GPIO LM4_GPIO_N
+
+/* Host connects to keyboard controller module via LPC */
+#define HOST_KB_BUS_LPC
+
+/* USB charge port */
+#define USB_CHARGE_PORT_COUNT 2
+
+/* GPIOs for second UART port */
+#define CONFIG_UART1_GPIOS_PC4_5
+
+/* GPIO signal definitions. */
+enum gpio_signal {
+	/* Inputs with interrupt handlers are first for efficiency */
+	GPIO_POWER_BUTTON_L = 0,   /* Power button */
+	GPIO_LID_OPEN,             /* Lid switch */
+	GPIO_THERMAL_DATA_READY_L, /* Data ready from I2C thermal sensor */
+	/* Other inputs */
+	GPIO_AC_PRESENT,           /* AC power present */
+	GPIO_BOARD_VERSION1,       /* Board version stuffing resistor 1 */
+	GPIO_BOARD_VERSION2,       /* Board version stuffing resistor 2 */
+	GPIO_BOARD_VERSION3,       /* Board version stuffing resistor 3 */
+	GPIO_PCH_BKLTEN,           /* Backlight enable signal from PCH */
+	GPIO_PCH_SLP_A_L,          /* SLP_A# signal from PCH */
+	GPIO_PCH_SLP_ME_CSW_DEV_L, /* SLP_ME_CSW_DEV# signal from PCH */
+	GPIO_PCH_SLP_S3_L,         /* SLP_S3# signal from PCH */
+	GPIO_PCH_SLP_S4_L,         /* SLP_S4# signal from PCH */
+	GPIO_PCH_SLP_S5_L,         /* SLP_S5# signal from PCH */
+	GPIO_PCH_SLP_SUS_L,        /* SLP_SUS# signal from PCH */
+	GPIO_PCH_SUSWARN_L,        /* SUSWARN# signal from PCH */
+	GPIO_PGOOD_1_5V_DDR,       /* Power good on +1.5V_DDR */
+	GPIO_PGOOD_1_5V_PCH,       /* Power good on +1.5V_PCH */
+	GPIO_PGOOD_1_8VS,          /* Power good on +1.8VS */
+	GPIO_PGOOD_5VALW,          /* Power good on +5VALW */
+	GPIO_PGOOD_CPU_CORE,       /* Power good on +CPU_CORE */
+	GPIO_PGOOD_VCCP,           /* Power good on +VCCP */
+	GPIO_PGOOD_VCCSA,          /* Power good on +VCCSA */
+	GPIO_PGOOD_VGFX_CORE,      /* Power good on +VGFX_CORE */
+	GPIO_RECOVERY_L,           /* Recovery signal from servo */
+	GPIO_USB1_STATUS_L,        /* USB charger port 1 status output */
+	GPIO_USB2_STATUS_L,        /* USB charger port 2 status output */
+	GPIO_WRITE_PROTECT,        /* Write protect input */
+	/* Outputs */
+	GPIO_CPU_PROCHOT,          /* Force CPU to think it's overheated */
+	GPIO_ENABLE_1_5V_DDR,      /* Enable +1.5V_DDR supply */
+	GPIO_ENABLE_5VALW,         /* Enable +5V always on rail */
+	GPIO_ENABLE_BACKLIGHT,     /* Enable backlight power */
+	GPIO_ENABLE_TOUCHPAD,      /* Enable touchpad power */
+	GPIO_ENABLE_VCORE,         /* Enable +CPU_CORE and +VGFX_CORE */
+	GPIO_ENABLE_VS,            /* Enable VS power supplies */
+	GPIO_ENABLE_WLAN,          /* Enable WLAN module power (+3VS_WLAN) */
+	GPIO_ENTERING_RW,          /* Indicate when EC is entering RW code */
+	GPIO_LIGHTBAR_RESET_L,     /* Reset lightbar controllers */
+	GPIO_PCH_A20GATE,          /* A20GATE signal to PCH */
+	GPIO_PCH_DPWROK,           /* DPWROK signal to PCH */
+	GPIO_PCH_HDA_SDO,          /* HDA_SDO signal to PCH; when high, ME
+				    * ignores security descriptor */
+	GPIO_PCH_WAKE_L,           /* Wake signal output to PCH */
+	GPIO_PCH_NMI_L,            /* Non-maskable interrupt pin to PCH */
+	GPIO_PCH_PWRBTN_L,         /* Power button output to PCH */
+	GPIO_PCH_PWROK,            /* PWROK / APWROK signals to PCH */
+	GPIO_PCH_RCIN_L,           /* RCIN# signal to PCH */
+	GPIO_PCH_RSMRST_L,         /* Reset PCH resume power plane logic */
+	GPIO_PCH_RTCRST_L,         /* Reset PCH RTC well */
+	GPIO_PCH_SMI_L,            /* System management interrupt to PCH */
+	GPIO_PCH_SRTCRST_L,        /* Reset PCH ME RTC well */
+	GPIO_PCH_SUSACK_L,         /* Acknowledge PCH SUSWARN# signal */
+	GPIO_RADIO_ENABLE_WLAN,    /* Enable WLAN radio */
+	GPIO_RADIO_ENABLE_BT,      /* Enable bluetooth radio */
+	GPIO_SPI_CS_L,             /* SPI chip select */
+	GPIO_TOUCHSCREEN_RESET_L,  /* Reset touch screen */
+	GPIO_USB1_CTL1,            /* USB charger port 1 CTL1 output */
+	GPIO_USB1_CTL2,            /* USB charger port 1 CTL2 output */
+	GPIO_USB1_CTL3,            /* USB charger port 1 CTL3 output */
+	GPIO_USB1_ENABLE,          /* USB charger port 1 enable */
+	GPIO_USB1_ILIM_SEL,        /* USB charger port 1 ILIM_SEL output */
+	GPIO_USB2_CTL1,            /* USB charger port 2 CTL1 output */
+	GPIO_USB2_CTL2,            /* USB charger port 2 CTL2 output */
+	GPIO_USB2_CTL3,            /* USB charger port 2 CTL3 output */
+	GPIO_USB2_ENABLE,          /* USB charger port 2 enable */
+	GPIO_USB2_ILIM_SEL,        /* USB charger port 2 ILIM_SEL output */
+
+	/* Number of GPIOs; not an actual GPIO */
+	GPIO_COUNT
+};
+
+enum temp_sensor_id {
+	/* TMP006 U20, die/object temperature near Mini-DP / USB connectors */
+	TEMP_SENSOR_I2C_U20_DIE = 0,
+	TEMP_SENSOR_I2C_U20_OBJECT,
+	/* TMP006 U11, die/object temperature near PCH */
+	TEMP_SENSOR_I2C_U11_DIE,
+	TEMP_SENSOR_I2C_U11_OBJECT,
+	/* TMP006 U27, die/object temperature near hinge */
+	TEMP_SENSOR_I2C_U27_DIE,
+	TEMP_SENSOR_I2C_U27_OBJECT,
+	/* TMP006 U14, die/object temperature near battery charger */
+	TEMP_SENSOR_I2C_U14_DIE,
+	TEMP_SENSOR_I2C_U14_OBJECT,
+	/* EC internal temperature sensor */
+	TEMP_SENSOR_EC_INTERNAL,
+	/* CPU die temperature via PECI */
+	TEMP_SENSOR_CPU_PECI,
+
+	TEMP_SENSOR_COUNT
+};
+
+/* The number of TMP006 sensor chips on the board. */
+#define TMP006_COUNT 4
+
+/* Target value for BOOTCFG. This is set to PE2/USB1_CTL1, which has an external
+ * pullup. If this signal is pulled to ground when the EC boots, the EC will get
+ * into the boot loader and we can recover bricked EC. */
+#define BOOTCFG_VALUE 0x7fff88fe
+
+/* Known board versions for system_get_board_version(). */
+enum board_version {
+	BOARD_VERSION_PROTO1 = 0,
+	BOARD_VERSION_EVT = 1,
+};
+
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __BOARD_H */
diff --git a/board/slippy/build.mk b/board/slippy/build.mk
new file mode 100644
index 0000000000..1843369ed4
--- /dev/null
+++ b/board/slippy/build.mk
@@ -0,0 +1,12 @@
+# -*- makefile -*-
+# Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+# the IC is TI Stellaris LM4
+CHIP:=lm4
+
+board-y=board.o
diff --git a/board/slippy/ec.tasklist b/board/slippy/ec.tasklist
new file mode 100644
index 0000000000..07a0eb1d29
--- /dev/null
+++ b/board/slippy/ec.tasklist
@@ -0,0 +1,30 @@
+/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
+ * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
+ * where :
+ * 'n' is the name of the task
+ * 'r' is the main routine of the task
+ * 'd' is an opaque parameter passed to the routine at startup
+ * 's' is the stack size in bytes; must be a multiple of 8
+ */
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(VBOOTHASH, vboot_hash_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(LIGHTBAR, lightbar_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(THERMAL, thermal_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(SWITCH, switch_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)