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authorDuncan Laurie <dlaurie@google.com>2017-06-06 09:11:41 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-06-06 14:36:30 -0700
commit9565b8ba06633e840fe9db356973ea21bba68c49 (patch)
treed08871c79be55910c006c24fb52b56ec275aefd7
parent51f5875da6b542f7947cd7ca9efdbd61b5d937ce (diff)
downloadchrome-ec-9565b8ba06633e840fe9db356973ea21bba68c49.tar.gz
eve: Set VCCIO rail to 0.85 and disable low power
Set the VCCIO rail to 0.85V where it should be for Y-series parts instead of forcing it to 1.0V. The EDS is pretty clear that pushing this voltage higher on Y-series parts will have significant power penalty. (up to 250mW at 0.95V) We also don't want this rail dropping in low power mode, which shoudln't be happening as S0ix is disabled so SLP_S0 shouldn't assert, but just in case disable this as well. BUG=b:35587084 BRANCH=eve TEST=stress testing on Eve EVT units Change-Id: I5535fe0d894f283a8d453d61101dfeb6b9287b7c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/525836 Reviewed-by: Todd Broch <tbroch@chromium.org>
-rw-r--r--board/eve/board.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/board/eve/board.c b/board/eve/board.c
index 85f82b6932..8ef4746692 100644
--- a/board/eve/board.c
+++ b/board/eve/board.c
@@ -358,10 +358,9 @@ static void board_pmic_init(void)
/*
* Set V085ACNT / V0.85A Control Register:
- * Lower power mode = 0.7V.
- * Nominal output = 1.0V.
+ * Nominal output = 0.85V.
*/
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x7a);
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x2a);
/* VRMODECTRL - disable low-power mode for all rails */
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3b, 0x1f);