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| author | Randall Spangler <rspangler@chromium.org> | 2015-04-17 10:40:00 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-04-17 20:53:53 +0000 |
| commit | 70be5168154e555ae044884747b8c4c7dfba3fc8 (patch) | |
| tree | 903c913d208c4d5e0ac7b9ea12c1933c532cbfae | |
| parent | 932eb3ddcab387c0207cd6596ef58427358b8c5f (diff) | |
| download | chrome-ec-70be5168154e555ae044884747b8c4c7dfba3fc8.tar.gz | |
samus_pd: Don't put pstate in a separate erase block
This frees up 4KB of space for EC_RO, so both it and EC_RW can expand
to 64KB instead of 60KB.
Note that if a EC-RW with this change is written on a system with an
old EC-RO without this change, the new EC-RW will be unable to
enable/disable flash protection (because it won't be able to change
the pstate in the separate block used by the old EC-RO). So this
should NOT be picked to the samus branch.
BUG=chromium:476659
BRANCH=none
TEST=sudo fmap_decode build/samus_pd/ec.bin
Note that EC_RO is now 0x10000 bytes, not 0xf000 bytes.
Add a bunch of dummy printf()'s and see that EC_RO code size can go
past 0xf000 bytes, where without this change it overflows the .rodata
segment and fails to build.
Change-Id: I67ec3e2c787a467f87e52a83d3bd81b79f1ffa61
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/266115
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | board/samus_pd/board.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/board/samus_pd/board.h b/board/samus_pd/board.h index f2cd65ef96..877e12798f 100644 --- a/board/samus_pd/board.h +++ b/board/samus_pd/board.h @@ -65,6 +65,11 @@ #define CONFIG_VBOOT_HASH #undef CONFIG_WATCHDOG_HELP +/* Use PSTATE embedded in the RO image, not in its own erase block */ +#undef CONFIG_FLASH_PSTATE_BANK +#undef CONFIG_FW_PSTATE_SIZE +#define CONFIG_FW_PSTATE_SIZE 0 + /* I2C ports configuration */ #define I2C_PORT_MASTER 1 #define I2C_PORT_SLAVE 0 |