diff options
| author | Craig Hesling <hesling@chromium.org> | 2019-12-09 11:46:13 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-12-16 18:09:06 +0000 |
| commit | c13071f4e5625ac1aee104a7127d712add0c7808 (patch) | |
| tree | 759ec0baa1262308228ed6684302999d7554e35d | |
| parent | 25002abca7e900d6473b40354c8bc79c4dfa11c7 (diff) | |
| download | chrome-ec-c13071f4e5625ac1aee104a7127d712add0c7808.tar.gz | |
stm32h7: Cleanup reset reg constants
This brings no change in functionality.
BRANCH=nocturne,hatch
BUG=none
TEST=make buildall -j
Change-Id: I03ed72ba07affb9b6a8757c1a2154ca31283bb97
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958845
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
| -rw-r--r-- | chip/stm32/registers-stm32h7.h | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/chip/stm32/registers-stm32h7.h b/chip/stm32/registers-stm32h7.h index 895957d378..d02aaf1249 100644 --- a/chip/stm32/registers-stm32h7.h +++ b/chip/stm32/registers-stm32h7.h @@ -556,17 +556,21 @@ /* Reset causes definitions */ #define STM32_RCC_RESET_CAUSE STM32_RCC_RSR -#define RESET_CAUSE_WDG 0x14000000 -#define RESET_CAUSE_SFT 0x01000000 -#define RESET_CAUSE_POR 0x00800000 -#define RESET_CAUSE_PIN 0x00400000 -#define RESET_CAUSE_OTHER 0xfffe0000 -#define RESET_CAUSE_RMVF 0x00010000 +#define RESET_CAUSE_WDG (BIT(28)|BIT(26)) +#define RESET_CAUSE_SFT BIT(24) +#define RESET_CAUSE_POR BIT(23) +#define RESET_CAUSE_PIN BIT(22) +#define RESET_CAUSE_OTHER (BIT(31)|BIT(30)|BIT(29)|BIT(28)| \ + BIT(27)|BIT(26)|BIT(25)|BIT(24)| \ + BIT(23)|BIT(22)|BIT(21)|BIT(20)| \ + BIT(19)|BIT(18)|BIT(17)) +#define RESET_CAUSE_RMVF BIT(16) + /* Power cause in PWR CPUCR register (Standby&Stop modes) */ #define STM32_PWR_RESET_CAUSE STM32_PWR_CPUCR #define STM32_PWR_RESET_CAUSE_CLR STM32_PWR_CPUCR -#define RESET_CAUSE_SBF 0x00000040 -#define RESET_CAUSE_SBF_CLR 0x00000200 +#define RESET_CAUSE_SBF BIT(6) +#define RESET_CAUSE_SBF_CLR BIT(9) /* --- Watchdogs --- */ |