diff options
author | Philip Chen <philipchen@google.com> | 2017-10-12 18:29:09 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-10-17 02:37:35 -0700 |
commit | ebcbc5d5f284aacae3a09c12d426bc5187db4f27 (patch) | |
tree | 7c00445fc63664bce47f4f0274da7d7f52130c2b | |
parent | ee7716b54430f54621fd412367ea1bceeaf24b61 (diff) | |
download | chrome-ec-ebcbc5d5f284aacae3a09c12d426bc5187db4f27.tar.gz |
scarlet: Fix SPI master
Add startup/shutdown code for SPI2.
Fix mapping for DMA channels.
Set the initial level as high for CS pins.
BUG=b:67694935, b:64798990
BRANCH=none
TEST=boot scarlet rev1 without seeing auxiliary watchdog triggered,
see reasonable accel and gyro measurement from 'accelread'
Change-Id: Icb79c3b716adb90804231032505c31148b88a9ee
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/717735
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Alexandru M Stan <amstan@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r-- | board/scarlet/board.c | 28 | ||||
-rw-r--r-- | board/scarlet/gpio.inc | 4 |
2 files changed, 27 insertions, 5 deletions
diff --git a/board/scarlet/board.c b/board/scarlet/board.c index 154c72f9bb..d83e575fec 100644 --- a/board/scarlet/board.c +++ b/board/scarlet/board.c @@ -250,6 +250,15 @@ int pd_snk_is_vbus_provided(int port) static void board_spi_enable(void) { + gpio_config_module(MODULE_SPI_MASTER, 1); + + /* Enable clocks to SPI2 module */ + STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; + + /* Reset SPI2 */ + STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; + STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; + spi_enable(CONFIG_SPI_ACCEL_PORT, 1); } DECLARE_HOOK(HOOK_CHIPSET_STARTUP, @@ -274,6 +283,11 @@ static void board_spi_disable(void) msleep(10); spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + + /* Disable clocks to SPI2 module */ + STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; + + gpio_config_module(MODULE_SPI_MASTER, 0); } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_spi_disable, @@ -291,6 +305,10 @@ static void board_init(void) /* Enable interrupts from BMI160 sensor. */ gpio_enable_interrupt(GPIO_ACCEL_INT_L); + /* Set SPI2 pins to high speed */ + /* pins D0/D1/D3/D4 */ + STM32_GPIO_OSPEEDR(GPIO_D) |= 0x000003cf; + /* Sensor Init */ if (system_jumped_to_this_image() && chipset_in_state(CHIPSET_STATE_ON)) board_spi_enable(); @@ -301,10 +319,14 @@ void board_config_pre_init(void) { STM32_RCC_AHBENR |= STM32_RCC_HB_DMA1; /* - * Remap USART1 DMA: - * Ch4 : USART1_TX / Ch5 : USART1_RX + * Remap USART1 and SPI2 DMA: + * + * Ch4: USART1_TX / Ch5: USART1_RX + * Ch6: SPI2_RX / Ch7: SPI2_TX */ - STM32_DMA_CSELR(STM32_DMAC_CH4) = (1 << 15) | (1 << 19); + STM32_DMA_CSELR(STM32_DMAC_CH4) = (1 << 15) | (1 << 19) | + (1 << 20) | (1 << 21) | + (1 << 24) | (1 << 25); } void board_hibernate(void) diff --git a/board/scarlet/gpio.inc b/board/scarlet/gpio.inc index 4cb2272c0f..e88319814f 100644 --- a/board/scarlet/gpio.inc +++ b/board/scarlet/gpio.inc @@ -59,8 +59,8 @@ GPIO(I2C1_SDA, PIN(B, 11), GPIO_INPUT) GPIO(BOARD_ID, PIN(C, 0), GPIO_ANALOG) /* SPI sensors */ -GPIO(SPI_BARO_CS_L, PIN(B, 12), GPIO_OUT_LOW) -GPIO(SPI_ACCEL_CS_L, PIN(D, 0), GPIO_OUT_LOW) +GPIO(SPI_BARO_CS_L, PIN(B, 12), GPIO_OUT_HIGH) +GPIO(SPI_ACCEL_CS_L, PIN(D, 0), GPIO_OUT_HIGH) /* Scarlet LEDs */ GPIO(BAT_LED_GREEN, PIN(E, 9), GPIO_ODR_HIGH) |