lazor: Copy board level code to lazor zephyr project

Copy board level code for lazor to lazor zephyr project.
Minimal changes to code.

BUG=b:217460464
TEST=zmake configure -b lazor
BRANCH=none

Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Ic806eecd7ed8ebd0b3dcf022a231cebaf29b7b0d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3431605
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>

10 files changed, 1004 insertions, 14 deletions

diff --git a/zephyr/projects/trogdor/lazor/CMakeLists.txt b/zephyr/projects/trogdor/lazor/CMakeLists.txt
index 24184946b4..e9a2c8a20f 100644
--- a/zephyr/projects/trogdor/lazor/CMakeLists.txt
+++ b/zephyr/projects/trogdor/lazor/CMakeLists.txt
@@ -9,22 +9,14 @@ project(lazor)
 
 zephyr_library_include_directories(include)
 
-set(PLATFORM_EC_BASEBOARD "${PLATFORM_EC}/baseboard/trogdor" CACHE PATH
-    "Path to the platform/ec baseboard directory")
-set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/lazor" CACHE PATH
-  "Path to the platform/ec board directory")
-
 zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC
-  "${PLATFORM_EC_BASEBOARD}/hibernate.c"
-  "${PLATFORM_EC_BASEBOARD}/power.c"
-  "${PLATFORM_EC_BASEBOARD}/usb_pd_policy.c"
-  "${PLATFORM_EC_BOARD}/usbc_config.c")
+  "src/power.c"
+  "src/usb_pd_policy.c"
+  "src/usbc_config.c")
 
 zephyr_library_sources(
-  "${PLATFORM_EC_BOARD}/hibernate.c"
-  "${PLATFORM_EC_BOARD}/sku.c"
-  "${PLATFORM_EC_BOARD}/switchcap.c"
-  "${PLATFORM_EC_BOARD}/usbc_config.c")
+  "src/sku.c"
+  "src/switchcap.c")
 
 # Board specific implementation
 zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C
diff --git a/zephyr/projects/trogdor/lazor/include/sku.h b/zephyr/projects/trogdor/lazor/include/sku.h
new file mode 100644
index 0000000000..492d1623dd
--- /dev/null
+++ b/zephyr/projects/trogdor/lazor/include/sku.h
@@ -0,0 +1,17 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Lazor board-specific SKU configuration */
+
+#ifndef __ZEPHYR_LAZOR_SKU_H
+#define __ZEPHYR_LAZOR_SKU_H
+
+int board_get_version(void);
+int board_is_clamshell(void);
+int board_has_da9313(void);
+int board_has_ln9310(void);
+int board_has_buck_ic(void);
+
+#endif /* __ZEPHYR_LAZOR_SKU_H */
diff --git a/zephyr/projects/trogdor/lazor/include/usbc_config.h b/zephyr/projects/trogdor/lazor/include/usbc_config.h
new file mode 100644
index 0000000000..a3ceb6694e
--- /dev/null
+++ b/zephyr/projects/trogdor/lazor/include/usbc_config.h
@@ -0,0 +1,20 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* lazor board-specific USB-C configuration */
+
+#ifndef __ZEPHYR_LAZOR_USBC_CONFIG_H
+#define __ZEPHYR_LAZOR_USBC_CONFIG_H
+
+#include "gpio.h"
+
+void tcpc_alert_event(enum gpio_signal signal);
+void usb0_evt(enum gpio_signal signal);
+void usb1_evt(enum gpio_signal signal);
+void usba_oc_interrupt(enum gpio_signal signal);
+void ppc_interrupt(enum gpio_signal signal);
+void board_connect_c0_sbu(enum gpio_signal s);
+
+#endif /* __ZEPHYR_LAZOR_USBC_CONFIG_H */
diff --git a/zephyr/projects/trogdor/lazor/src/hibernate.c b/zephyr/projects/trogdor/lazor/src/hibernate.c
new file mode 100644
index 0000000000..ab7cd8b727
--- /dev/null
+++ b/zephyr/projects/trogdor/lazor/src/hibernate.c
@@ -0,0 +1,46 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "common.h"
+#include "sku.h"
+#include "system.h"
+#include "usbc_ppc.h"
+
+void board_hibernate(void)
+{
+	int i;
+
+	if (!board_is_clamshell()) {
+		/*
+		 * Sensors are unpowered in hibernate. Apply PD to the
+		 * interrupt lines such that they don't float.
+		 */
+		gpio_set_flags(GPIO_ACCEL_GYRO_INT_L,
+			       GPIO_INPUT | GPIO_PULL_DOWN);
+		gpio_set_flags(GPIO_LID_ACCEL_INT_L,
+			       GPIO_INPUT | GPIO_PULL_DOWN);
+	}
+
+	/*
+	 * Board rev 5+ has the hardware fix. Don't need the following
+	 * workaround.
+	 */
+	if (system_get_board_version() >= 5)
+		return;
+
+	/*
+	 * Enable the PPC power sink path before EC enters hibernate;
+	 * otherwise, ACOK won't go High and can't wake EC up. Check the
+	 * bug b/170324206 for details.
+	 */
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++)
+		ppc_vbus_sink_enable(i, 1);
+}
+
+void board_hibernate_late(void)
+{
+	/* Set the hibernate GPIO to turn off the rails */
+	gpio_set_level(GPIO_HIBERNATE_L, 0);
+}
diff --git a/zephyr/projects/trogdor/lazor/src/led.c b/zephyr/projects/trogdor/lazor/src/led.c
index 737be33b1d..a35eb042f9 100644
--- a/zephyr/projects/trogdor/lazor/src/led.c
+++ b/zephyr/projects/trogdor/lazor/src/led.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  *
diff --git a/zephyr/projects/trogdor/lazor/src/power.c b/zephyr/projects/trogdor/lazor/src/power.c
new file mode 100644
index 0000000000..354bfabbfd
--- /dev/null
+++ b/zephyr/projects/trogdor/lazor/src/power.c
@@ -0,0 +1,38 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "gpio.h"
+#include "hooks.h"
+#include "power.h"
+#include "task.h"
+
+void board_chipset_pre_init(void)
+{
+	/* Turn on the 3.3V rail */
+	gpio_set_level(GPIO_EN_PP3300_A, 1);
+
+	/* Turn on the 5V rail. */
+#ifdef CONFIG_POWER_PP5000_CONTROL
+	power_5v_enable(task_get_current(), 1);
+#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
+	gpio_set_level(GPIO_EN_PP5000, 1);
+#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
+}
+DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, board_chipset_pre_init, HOOK_PRIO_DEFAULT);
+
+void board_chipset_shutdown_complete(void)
+{
+	/* Turn off the 5V rail. */
+#ifdef CONFIG_POWER_PP5000_CONTROL
+	power_5v_enable(task_get_current(), 0);
+#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
+	gpio_set_level(GPIO_EN_PP5000, 0);
+#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
+
+	/* Turn off the 3.3V and 5V rails. */
+	gpio_set_level(GPIO_EN_PP3300_A, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN_COMPLETE, board_chipset_shutdown_complete,
+		HOOK_PRIO_DEFAULT);
diff --git a/zephyr/projects/trogdor/lazor/src/sku.c b/zephyr/projects/trogdor/lazor/src/sku.c
new file mode 100644
index 0000000000..d98f8342be
--- /dev/null
+++ b/zephyr/projects/trogdor/lazor/src/sku.c
@@ -0,0 +1,93 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "common.h"
+#include "config.h"
+#include "console.h"
+#include "driver/ln9310.h"
+#include "tcpm/ps8xxx_public.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "sku.h"
+#include "system.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+static uint8_t sku_id;
+
+enum board_model {
+	LAZOR,
+	LIMOZEEN,
+	UNKNOWN,
+};
+
+static const char *const model_name[] = {
+	"LAZOR",
+	"LIMOZEEN",
+	"UNKNOWN",
+};
+
+static enum board_model get_model(void)
+{
+	if (sku_id == 0 || sku_id == 1 || sku_id == 2 || sku_id == 3)
+		return LAZOR;
+	if (sku_id == 4 || sku_id == 5 || sku_id == 6)
+		return LIMOZEEN;
+	return UNKNOWN;
+}
+
+/* Read SKU ID from GPIO and initialize variables for board variants */
+static void sku_init(void)
+{
+	sku_id = system_get_sku_id();
+	CPRINTS("SKU: %u (%s)", sku_id, model_name[get_model()]);
+}
+DECLARE_HOOK(HOOK_INIT, sku_init, HOOK_PRIO_INIT_I2C + 1);
+
+enum battery_cell_type board_get_battery_cell_type(void)
+{
+	switch (get_model()) {
+	case LIMOZEEN:
+		return BATTERY_CELL_TYPE_3S;
+	default:
+		return BATTERY_CELL_TYPE_UNKNOWN;
+	}
+}
+
+int board_is_clamshell(void)
+{
+	return get_model() == LIMOZEEN;
+}
+
+__override uint16_t board_get_ps8xxx_product_id(int port)
+{
+	/*
+	 * Lazor (SKU_ID: 0, 1, 2, 3) rev 3+ changes TCPC from PS8751 to
+	 * PS8805.
+	 *
+	 * Limozeen (SKU_ID: 4, 5, 6) all-rev uses PS8805.
+	 */
+	if (get_model() == LAZOR && system_get_board_version() < 3)
+		return PS8751_PRODUCT_ID;
+
+	return PS8805_PRODUCT_ID;
+}
+
+int board_has_da9313(void)
+{
+	return get_model() == LAZOR;
+}
+
+int board_has_buck_ic(void)
+{
+	return get_model() == LIMOZEEN && system_get_board_version() >= 8;
+}
+
+int board_has_ln9310(void)
+{
+	return get_model() == LIMOZEEN && system_get_board_version() < 8;
+}
diff --git a/zephyr/projects/trogdor/lazor/src/switchcap.c b/zephyr/projects/trogdor/lazor/src/switchcap.c
new file mode 100644
index 0000000000..f362ec8a69
--- /dev/null
+++ b/zephyr/projects/trogdor/lazor/src/switchcap.c
@@ -0,0 +1,121 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "common.h"
+#include "config.h"
+#include "console.h"
+#include "driver/ln9310.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "i2c.h"
+#include "power/qcom.h"
+#include "system.h"
+#include "sku.h"
+
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
+
+/* LN9310 switchcap */
+const struct ln9310_config_t ln9310_config = {
+	.i2c_port = I2C_PORT_POWER,
+	.i2c_addr_flags = LN9310_I2C_ADDR_0_FLAGS,
+};
+
+static void switchcap_init(void)
+{
+	if (board_has_da9313()) {
+		CPRINTS("Use switchcap: DA9313");
+
+		/*
+		 * When the chip in power down mode, it outputs high-Z.
+		 * Set pull-down to avoid floating.
+		 */
+		gpio_set_flags(GPIO_DA9313_GPIO0, GPIO_INPUT | GPIO_PULL_DOWN);
+
+		/*
+		 * Configure DA9313 enable, push-pull output. Don't set the
+		 * level here; otherwise, it will override its value and
+		 * shutdown the switchcap when sysjump to RW.
+		 */
+		gpio_set_flags(GPIO_SWITCHCAP_ON, GPIO_OUTPUT);
+	} else if (board_has_ln9310()) {
+		CPRINTS("Use switchcap: LN9310");
+
+		/* Configure and enable interrupt for LN9310 */
+		gpio_set_flags(GPIO_SWITCHCAP_PG_INT_L, GPIO_INT_FALLING);
+		gpio_enable_interrupt(GPIO_SWITCHCAP_PG_INT_L);
+
+		/*
+		 * Configure LN9310 enable, open-drain output. Don't set the
+		 * level here; otherwise, it will override its value and
+		 * shutdown the switchcap when sysjump to RW.
+		 *
+		 * Note that the gpio.inc configures it GPIO_OUT_LOW. When
+		 * sysjump to RW, will output push-pull a short period of
+		 * time. As it outputs LOW, should be fine.
+		 *
+		 * This GPIO changes like:
+		 * (1) EC boots from RO -> high-Z
+		 * (2) GPIO init according to gpio.inc -> push-pull LOW
+		 * (3) This function configures it -> open-drain HIGH
+		 * (4) Power sequence turns on the switchcap -> open-drain LOW
+		 * (5) EC sysjumps to RW
+		 * (6) GPIO init according to gpio.inc -> push-pull LOW
+		 * (7) This function configures it -> open-drain LOW
+		 */
+		gpio_set_flags(GPIO_SWITCHCAP_ON_L,
+			       GPIO_OUTPUT | GPIO_OPEN_DRAIN);
+
+		/* Only configure the switchcap if not sysjump */
+		if (!system_jumped_late()) {
+			/*
+			 * Deassert the enable pin (set it HIGH), so the
+			 * switchcap won't be enabled after the switchcap is
+			 * configured from standby mode to switching mode.
+			 */
+			gpio_set_level(GPIO_SWITCHCAP_ON_L, 1);
+			ln9310_init();
+		}
+	} else if (board_has_buck_ic()) {
+		CPRINTS("Use Buck IC");
+	} else {
+		CPRINTS("ERROR: No switchcap solution");
+	}
+}
+DECLARE_HOOK(HOOK_INIT, switchcap_init, HOOK_PRIO_DEFAULT);
+
+void board_set_switchcap_power(int enable)
+{
+	if (board_has_da9313()) {
+		gpio_set_level(GPIO_SWITCHCAP_ON, enable);
+	} else if (board_has_ln9310()) {
+		gpio_set_level(GPIO_SWITCHCAP_ON_L, !enable);
+		ln9310_software_enable(enable);
+	} else if (board_has_buck_ic()) {
+		gpio_set_level(GPIO_VBOB_EN, enable);
+	}
+}
+
+int board_is_switchcap_enabled(void)
+{
+	if (board_has_da9313())
+		return gpio_get_level(GPIO_SWITCHCAP_ON);
+	else if (board_has_ln9310())
+		return !gpio_get_level(GPIO_SWITCHCAP_ON_L);
+
+	/* Board has buck ic*/
+	return gpio_get_level(GPIO_VBOB_EN);
+}
+
+int board_is_switchcap_power_good(void)
+{
+	if (board_has_da9313())
+		return gpio_get_level(GPIO_DA9313_GPIO0);
+	else if (board_has_ln9310())
+		return ln9310_power_good();
+
+	/* Board has buck ic no way to check POWER GOOD */
+	return 1;
+}
diff --git a/zephyr/projects/trogdor/lazor/src/usb_pd_policy.c b/zephyr/projects/trogdor/lazor/src/usb_pd_policy.c
new file mode 100644
index 0000000000..be9cc92589
--- /dev/null
+++ b/zephyr/projects/trogdor/lazor/src/usb_pd_policy.c
@@ -0,0 +1,260 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "charge_manager.h"
+#include "chipset.h"
+#include "console.h"
+#include "gpio.h"
+#include "system.h"
+#include "usb_mux.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+int pd_check_vconn_swap(int port)
+{
+	/* In G3, do not allow vconn swap since PP5000 rail is off */
+	return gpio_get_level(GPIO_EN_PP5000);
+}
+
+static uint8_t vbus_en[CONFIG_USB_PD_PORT_MAX_COUNT];
+#if CONFIG_USB_PD_PORT_MAX_COUNT == 1
+static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = {TYPEC_RP_1A5};
+#else
+static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = {TYPEC_RP_1A5,
+							TYPEC_RP_1A5};
+#endif
+
+static void board_vbus_update_source_current(int port)
+{
+	/* Both port are controlled by PPC SN5S330. */
+	ppc_set_vbus_source_current_limit(port, vbus_rp[port]);
+	ppc_vbus_source_enable(port, vbus_en[port]);
+}
+
+void pd_power_supply_reset(int port)
+{
+	int prev_en;
+
+	prev_en = vbus_en[port];
+
+	/* Disable VBUS */
+	vbus_en[port] = 0;
+	board_vbus_update_source_current(port);
+
+	/* Enable discharge if we were previously sourcing 5V */
+	if (prev_en)
+		pd_set_vbus_discharge(port, 1);
+
+	/* notify host of power info change */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+int pd_set_power_supply_ready(int port)
+{
+	/* Disable charging */
+	board_vbus_sink_enable(port, 0);
+
+	pd_set_vbus_discharge(port, 0);
+
+	/* Provide VBUS */
+	vbus_en[port] = 1;
+	board_vbus_update_source_current(port);
+
+	/* notify host of power info change */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+	return EC_SUCCESS; /* we are ready */
+}
+
+int board_vbus_source_enabled(int port)
+{
+	return vbus_en[port];
+}
+
+__override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp)
+{
+	vbus_rp[port] = rp;
+	board_vbus_update_source_current(port);
+}
+
+int pd_snk_is_vbus_provided(int port)
+{
+	return tcpm_check_vbus_level(port, VBUS_PRESENT);
+}
+
+/* ----------------- Vendor Defined Messages ------------------ */
+#ifdef CONFIG_USB_PD_ALT_MODE_DFP
+__override int svdm_dp_config(int port, uint32_t *payload)
+{
+	int opos = pd_alt_mode(port, TCPCI_MSG_SOP, USB_SID_DISPLAYPORT);
+	uint8_t pin_mode = get_dp_pin_mode(port);
+
+	if (!pin_mode)
+		return 0;
+
+	/*
+	 * Defer setting the usb_mux until HPD goes high, svdm_dp_attention().
+	 * The AP only supports one DP phy. An external DP mux switches between
+	 * the two ports. Should switch those muxes when it is really used,
+	 * i.e. HPD high; otherwise, the real use case is preempted, like:
+	 *  (1) plug a dongle without monitor connected to port-0,
+	 *  (2) plug a dongle without monitor connected to port-1,
+	 *  (3) plug a monitor to the port-1 dongle.
+	 */
+
+	payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+			 CMD_DP_CONFIG | VDO_OPOS(opos));
+	payload[1] = VDO_DP_CFG(pin_mode,      /* pin mode */
+				1,             /* DPv1.3 signaling */
+				2);            /* UFP connected */
+	return 2;
+};
+
+__override void svdm_dp_post_config(int port)
+{
+	dp_flags[port] |= DP_FLAGS_DP_ON;
+}
+
+/**
+ * Is the port fine to be muxed its DisplayPort lines?
+ *
+ * Only one port can be muxed to DisplayPort at a time.
+ *
+ * @param port	Port number of TCPC.
+ * @return	1 is fine; 0 is bad as other port is already muxed;
+ */
+static int is_dp_muxable(int port)
+{
+	int i;
+
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++)
+		if (i != port) {
+			if (usb_mux_get(i) & USB_PD_MUX_DP_ENABLED)
+				return 0;
+		}
+
+	return 1;
+}
+
+__override int svdm_dp_attention(int port, uint32_t *payload)
+{
+	enum gpio_signal hpd = GPIO_DP_HOT_PLUG_DET;
+	int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
+	int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
+	int cur_lvl = gpio_get_level(hpd);
+	mux_state_t mux_state;
+
+	dp_status[port] = payload[1];
+
+	if (!is_dp_muxable(port)) {
+		/* TODO(waihong): Info user? */
+		CPRINTS("p%d: The other port is already muxed.", port);
+		return 0;
+	}
+
+	/*
+	 * Initial implementation to handle HPD. Only the first-plugged port
+	 * works, i.e. sending HPD signal to AP. The second-plugged port
+	 * will be ignored.
+	 *
+	 * TODO(waihong): Continue the above case, if the first-plugged port
+	 * is then unplugged, switch to the second-plugged port and signal AP?
+	 */
+	if (lvl) {
+		/*
+		 * Enable and switch the DP port selection mux to the
+		 * correct port.
+		 *
+		 * TODO(waihong): Better to move switching DP mux to
+		 * the usb_mux abstraction.
+		 */
+		gpio_set_level(GPIO_DP_MUX_SEL, port == 1);
+		gpio_set_level(GPIO_DP_MUX_OE_L, 0);
+
+		/* Connect the SBU lines in PPC chip. */
+		if (IS_ENABLED(CONFIG_USBC_PPC_SBU))
+			ppc_set_sbu(port, 1);
+
+		/*
+		 * Connect the USB SS/DP lines in TCPC chip.
+		 *
+		 * When mf_pref not true, still use the dock muxing
+		 * because of the board USB-C topology (limited to 2
+		 * lanes DP).
+		 */
+		usb_mux_set(port, USB_PD_MUX_DOCK,
+			    USB_SWITCH_CONNECT,
+			    polarity_rm_dts(pd_get_polarity(port)));
+	} else {
+		/* Disconnect the DP port selection mux. */
+		gpio_set_level(GPIO_DP_MUX_OE_L, 1);
+		gpio_set_level(GPIO_DP_MUX_SEL, 0);
+
+		/* Disconnect the SBU lines in PPC chip. */
+		if (IS_ENABLED(CONFIG_USBC_PPC_SBU))
+			ppc_set_sbu(port, 0);
+
+		/* Disconnect the DP but keep the USB SS lines in TCPC chip. */
+		usb_mux_set(port, USB_PD_MUX_USB_ENABLED,
+			    USB_SWITCH_CONNECT,
+			    polarity_rm_dts(pd_get_polarity(port)));
+	}
+
+	if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) &&
+	    (irq || lvl))
+		/*
+		 * Wake up the AP.  IRQ or level high indicates a DP sink is now
+		 * present.
+		 */
+		pd_notify_dp_alt_mode_entry(port);
+
+	/* Configure TCPC for the HPD event, for proper muxing */
+	mux_state = (lvl ? USB_PD_MUX_HPD_LVL : USB_PD_MUX_HPD_LVL_DEASSERTED) |
+		    (irq ? USB_PD_MUX_HPD_IRQ : USB_PD_MUX_HPD_IRQ_DEASSERTED);
+	usb_mux_hpd_update(port, mux_state);
+
+	/* Signal AP for the HPD event, through GPIO to AP */
+	if (irq & cur_lvl) {
+		uint64_t now = get_time().val;
+		/* Wait for the minimum spacing between IRQ_HPD if needed */
+		if (now < svdm_hpd_deadline[port])
+			usleep(svdm_hpd_deadline[port] - now);
+
+		/* Generate IRQ_HPD pulse */
+		gpio_set_level(hpd, 0);
+		usleep(HPD_DSTREAM_DEBOUNCE_IRQ);
+		gpio_set_level(hpd, 1);
+
+		/* Set the minimum time delay (2ms) for the next HPD IRQ */
+		svdm_hpd_deadline[port] = get_time().val +
+			HPD_USTREAM_DEBOUNCE_LVL;
+	} else if (irq & !lvl) {
+		CPRINTF("ERR:HPD:IRQ&LOW\n");
+		return 0;
+	}
+	gpio_set_level(hpd, lvl);
+	/* Set the minimum time delay (2ms) for the next HPD IRQ */
+	svdm_hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL;
+
+	return 1;
+}
+
+__override void svdm_exit_dp_mode(int port)
+{
+	if (is_dp_muxable(port)) {
+		/* Disconnect the DP port selection mux. */
+		gpio_set_level(GPIO_DP_MUX_OE_L, 1);
+		gpio_set_level(GPIO_DP_MUX_SEL, 0);
+
+		/* Signal AP for the HPD low event */
+		usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED |
+					 USB_PD_MUX_HPD_IRQ_DEASSERTED);
+		gpio_set_level(GPIO_DP_HOT_PLUG_DET, 0);
+	}
+}
+#endif /* CONFIG_USB_PD_ALT_MODE_DFP */
diff --git a/zephyr/projects/trogdor/lazor/src/usbc_config.c b/zephyr/projects/trogdor/lazor/src/usbc_config.c
new file mode 100644
index 0000000000..a9d5bb153a
--- /dev/null
+++ b/zephyr/projects/trogdor/lazor/src/usbc_config.c
@@ -0,0 +1,403 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Lazor board-specific USB-C configuration */
+
+#include "battery_fuel_gauge.h"
+#include "bc12/pi3usb9201_public.h"
+#include "charger.h"
+#include "charger/isl923x_public.h"
+#include "charge_manager.h"
+#include "charge_state.h"
+#include "common.h"
+#include "config.h"
+#include "driver/ln9310.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "ppc/sn5s330_public.h"
+#include "system.h"
+#include "tcpm/ps8xxx_public.h"
+#include "tcpm/tcpci.h"
+#include "timer.h"
+#include "usb_pd.h"
+#include "usbc_config.h"
+#include "usb_mux.h"
+#include "usbc_ocp.h"
+#include "usbc_ppc.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+const struct charger_config_t chg_chips[] = {
+	{
+		.i2c_port = I2C_PORT_CHARGER,
+		.i2c_addr_flags = ISL923X_ADDR_FLAGS,
+		.drv = &isl923x_drv,
+	},
+};
+
+int charger_profile_override(struct charge_state_data *curr)
+{
+	int usb_mv;
+	int port;
+
+	if (curr->state != ST_CHARGE)
+		return 0;
+
+	/* Lower the max requested voltage to 5V when battery is full. */
+	if (chipset_in_state(CHIPSET_STATE_ANY_OFF) &&
+	    !(curr->batt.flags & BATT_FLAG_BAD_STATUS) &&
+	    !(curr->batt.flags & BATT_FLAG_WANT_CHARGE) &&
+	    (curr->batt.status & STATUS_FULLY_CHARGED))
+		usb_mv = 5000;
+	else
+		usb_mv = PD_MAX_VOLTAGE_MV;
+
+	if (pd_get_max_voltage() != usb_mv) {
+		CPRINTS("VBUS limited to %dmV", usb_mv);
+		for (port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; port++)
+			pd_set_external_voltage_limit(port, usb_mv);
+	}
+
+	return 0;
+}
+
+enum ec_status charger_profile_override_get_param(uint32_t param,
+						  uint32_t *value)
+{
+	return EC_RES_INVALID_PARAM;
+}
+
+enum ec_status charger_profile_override_set_param(uint32_t param,
+						  uint32_t value)
+{
+	return EC_RES_INVALID_PARAM;
+}
+
+void usb0_evt(enum gpio_signal signal)
+{
+	task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12);
+}
+
+void usb1_evt(enum gpio_signal signal)
+{
+	task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12);
+}
+
+static void usba_oc_deferred(void)
+{
+	/* Use next number after all USB-C ports to indicate the USB-A port */
+	board_overcurrent_event(CONFIG_USB_PD_PORT_MAX_COUNT,
+				!gpio_get_level(GPIO_USB_A0_OC_ODL));
+}
+DECLARE_DEFERRED(usba_oc_deferred);
+
+void usba_oc_interrupt(enum gpio_signal signal)
+{
+	hook_call_deferred(&usba_oc_deferred_data, 0);
+}
+
+void ppc_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_SWCTL_INT_ODL:
+		sn5s330_interrupt(0);
+		break;
+	case GPIO_USB_C1_SWCTL_INT_ODL:
+		sn5s330_interrupt(1);
+		break;
+	default:
+		break;
+	}
+}
+
+static void board_connect_c0_sbu_deferred(void)
+{
+	/*
+	 * If CCD_MODE_ODL asserts, it means there's a debug accessory connected
+	 * and we should enable the SBU FETs.
+	 */
+	ppc_set_sbu(0, 1);
+}
+DECLARE_DEFERRED(board_connect_c0_sbu_deferred);
+
+void board_connect_c0_sbu(enum gpio_signal s)
+{
+	hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0);
+}
+
+/* GPIO Interrupt Handlers */
+void tcpc_alert_event(enum gpio_signal signal)
+{
+	int port = -1;
+
+	switch (signal) {
+	case GPIO_USB_C0_PD_INT_ODL:
+		port = 0;
+		break;
+	case GPIO_USB_C1_PD_INT_ODL:
+		port = 1;
+		break;
+	default:
+		return;
+	}
+
+	schedule_deferred_pd_interrupt(port);
+}
+
+/* Power Path Controller */
+struct ppc_config_t ppc_chips[] = {
+	{
+		.i2c_port = I2C_PORT_TCPC0,
+		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
+		.drv = &sn5s330_drv
+	},
+	{
+		.i2c_port = I2C_PORT_TCPC1,
+		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
+		.drv = &sn5s330_drv
+	},
+};
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+/* TCPC mux configuration */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	{
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_TCPC0,
+			.addr_flags = PS8751_I2C_ADDR1_FLAGS,
+		},
+		.drv = &ps8xxx_tcpm_drv,
+	},
+	{
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_TCPC1,
+			.addr_flags = PS8751_I2C_ADDR1_FLAGS,
+		},
+		.drv = &ps8xxx_tcpm_drv,
+	},
+};
+
+/*
+ * Port-0/1 USB mux driver.
+ *
+ * The USB mux is handled by TCPC chip and the HPD update is through a GPIO
+ * to AP. But the TCPC chip is also needed to know the HPD status; otherwise,
+ * the mux misbehaves.
+ */
+const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	{
+		.usb_port = 0,
+		.driver = &tcpci_tcpm_usb_mux_driver,
+		.hpd_update = &ps8xxx_tcpc_update_hpd_status,
+	},
+	{
+		.usb_port = 1,
+		.driver = &tcpci_tcpm_usb_mux_driver,
+		.hpd_update = &ps8xxx_tcpc_update_hpd_status,
+	}
+};
+
+const int usb_port_enable[USB_PORT_COUNT] = {
+	GPIO_EN_USB_A_5V,
+};
+
+/* BC1.2 */
+const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
+	{
+		.i2c_port = I2C_PORT_POWER,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+	},
+	{
+		.i2c_port = I2C_PORT_EEPROM,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+	},
+};
+
+__override int board_get_default_battery_type(void)
+{
+	/*
+	 * A 2S battery is set as default. If the board is configured to use
+	 * a 3S battery, according to its SKU_ID, return a 3S battery as
+	 * default. It helps to configure the charger to output a correct
+	 * voltage in case the battery is not attached.
+	 */
+	if (board_get_battery_cell_type() == BATTERY_CELL_TYPE_3S)
+		return BATTERY_LGC_AP18C8K;
+
+	return DEFAULT_BATTERY_TYPE;
+}
+
+/* Initialize board USC-C things */
+static void board_init_usbc(void)
+{
+	/* Enable BC1.2 interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L);
+	gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L);
+
+	/* Enable USB-A overcurrent interrupt */
+	gpio_enable_interrupt(GPIO_USB_A0_OC_ODL);
+	/*
+	 * The H1 SBU line for CCD are behind PPC chip. The PPC internal FETs
+	 * for SBU may be disconnected after DP alt mode is off. Should enable
+	 * the CCD_MODE_ODL interrupt to make sure the SBU FETs are connected.
+	 */
+	gpio_enable_interrupt(GPIO_CCD_MODE_ODL);
+}
+DECLARE_HOOK(HOOK_INIT, board_init_usbc, HOOK_PRIO_DEFAULT);
+
+void board_tcpc_init(void)
+{
+	/* Only reset TCPC if not sysjump */
+	if (!system_jumped_late()) {
+		/* TODO(crosbug.com/p/61098): How long do we need to wait? */
+		board_reset_pd_mcu();
+	}
+
+	/* Enable PPC interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_SWCTL_INT_ODL);
+
+	/* Enable TCPC interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL);
+
+	/*
+	 * Initialize HPD to low; after sysjump SOC needs to see
+	 * HPD pulse to enable video path
+	 */
+	for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port)
+		usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED |
+					 USB_PD_MUX_HPD_IRQ_DEASSERTED);
+}
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
+
+void board_reset_pd_mcu(void)
+{
+	cprints(CC_USB, "Resetting TCPCs...");
+	cflush();
+
+	gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
+	gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
+	msleep(PS8XXX_RESET_DELAY_MS);
+	gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
+	gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
+}
+
+void board_set_tcpc_power_mode(int port, int mode)
+{
+	/* Ignore the "mode" to turn the chip on.  We can only do a reset. */
+	if (mode)
+		return;
+
+	board_reset_pd_mcu();
+}
+
+int board_vbus_sink_enable(int port, int enable)
+{
+	/* Both ports are controlled by PPC SN5S330 */
+	return ppc_vbus_sink_enable(port, enable);
+}
+
+int board_is_sourcing_vbus(int port)
+{
+	/* Both ports are controlled by PPC SN5S330 */
+	return ppc_is_sourcing_vbus(port);
+}
+
+void board_overcurrent_event(int port, int is_overcurrented)
+{
+	/* TODO(b/120231371): Notify AP */
+	CPRINTS("p%d: overcurrent!", port);
+}
+
+int board_set_active_charge_port(int port)
+{
+	int is_real_port = (port >= 0 &&
+			    port < CONFIG_USB_PD_PORT_MAX_COUNT);
+	int i;
+
+	if (!is_real_port && port != CHARGE_PORT_NONE)
+		return EC_ERROR_INVAL;
+
+	if (port == CHARGE_PORT_NONE) {
+		CPRINTS("Disabling all charging port");
+
+		/* Disable all ports. */
+		for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
+			/*
+			 * Do not return early if one fails otherwise we can
+			 * get into a boot loop assertion failure.
+			 */
+			if (board_vbus_sink_enable(i, 0))
+				CPRINTS("Disabling p%d sink path failed.", i);
+		}
+
+		return EC_SUCCESS;
+	}
+
+	/* Check if the port is sourcing VBUS. */
+	if (board_is_sourcing_vbus(port)) {
+		CPRINTS("Skip enable p%d", port);
+		return EC_ERROR_INVAL;
+	}
+
+
+	CPRINTS("New charge port: p%d", port);
+
+	/*
+	 * Turn off the other ports' sink path FETs, before enabling the
+	 * requested charge port.
+	 */
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
+		if (i == port)
+			continue;
+
+		if (board_vbus_sink_enable(i, 0))
+			CPRINTS("p%d: sink path disable failed.", i);
+	}
+
+	/* Enable requested charge port. */
+	if (board_vbus_sink_enable(port, 1)) {
+		CPRINTS("p%d: sink path enable failed.", port);
+		return EC_ERROR_UNKNOWN;
+	}
+
+	return EC_SUCCESS;
+}
+
+void board_set_charge_limit(int port, int supplier, int charge_ma,
+			    int max_ma, int charge_mv)
+{
+	/*
+	 * Ignore lower charge ceiling on PD transition if our battery is
+	 * critical, as we may brownout.
+	 */
+	if (supplier == CHARGE_SUPPLIER_PD &&
+	    charge_ma < 1500 &&
+	    charge_get_percent() < CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON) {
+		CPRINTS("Using max ilim %d", max_ma);
+		charge_ma = max_ma;
+	}
+
+	charge_set_input_current_limit(MAX(charge_ma,
+					   CONFIG_CHARGER_INPUT_CURRENT),
+				       charge_mv);
+}
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+
+	if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL))
+		if (gpio_get_level(GPIO_USB_C0_PD_RST_L))
+			status |= PD_STATUS_TCPC_ALERT_0;
+	if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL))
+		if (gpio_get_level(GPIO_USB_C1_PD_RST_L))
+			status |= PD_STATUS_TCPC_ALERT_1;
+
+	return status;
+}