summaryrefslogtreecommitdiff
path: root/Makefile
diff options
context:
space:
mode:
authorMulin Chao <mlchao@nuvoton.com>2017-08-31 14:01:51 +0800
committerchrome-bot <chrome-bot@chromium.org>2017-09-05 02:23:00 -0700
commitebe3caeb69aeaa9144701415decc3e6647df01cd (patch)
tree88d7eec5f3559cf739c524ba72442ff1a94310f8 /Makefile
parent1cb04976bae11075ef9757fd0901e17fd80a2a66 (diff)
downloadchrome-ec-ebe3caeb69aeaa9144701415decc3e6647df01cd.tar.gz
npcx: bypass for CSAE issue if CONFIG_LOW_POWER_IDLE is disabled
In order to prevent keeping the CSAE bit at 1 forever impacts the eSPI performance, the npcx driver enables host access wakeup functionality before ec enters deep sleep or wfi. But this bypass also should be added in __idle() of core/cortex-m/task.c if CONFIG_LOW_POWER_IDLE is disabled. This CL also narrows the bypass only when host interface is eSPI. BRANCH=eve BUG=b:64730183 TEST=No build errors for make buildall. Disable CONFIG_LOW_POWER_IDLE functionality on poppy and use following script "count=0; while :; do echo "--- iteration --- $count"; time flashrom -p ec -r ec.bin; sleep 1; count=$((${count}+1)); done" to test eSPI performances over 300 times. No errors occur and all tests' efficiency are the same as removing CSAE bypass. Change-Id: I8b6b69e37318208c185747151c06b3e6bdfd2f4e Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/644967 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'Makefile')
0 files changed, 0 insertions, 0 deletions