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author | Simon Glass <sjg@chromium.org> | 2012-04-10 11:20:30 -0700 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2012-04-10 13:46:18 -0700 |
commit | ee753a7ed1b611ac21cdf5b47d11a012a1ac8198 (patch) | |
tree | d8d59b4e3ba46768e29ffd98a540cd5c2c4fcc1c /Makefile | |
parent | 1a9a415cf68c6e8e3b31972c072c81ed886290ab (diff) | |
download | chrome-ec-ee753a7ed1b611ac21cdf5b47d11a012a1ac8198.tar.gz |
Pass include directories to C preprocessor
If we include a header file within board/daisy/board.h then the code in the
top-level Makefile which transforms the configuration into make variables
cannot locate the header file. We get a warning:
$ make BOARD=daisy clean
board/daisy/board.h:11:20: fatal error: common.h: No such file or directory
compilation terminated.
To fix this, pass the include directories to the preprocessor also.
BUG=none
TEST=manual:
add common.h header to board/daisy/board.h; make BOARD=daisy clean;
see that no warning is issued
Change-Id: I04b718e014490a3f6008b7d03afce4d79a38eb56
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'Makefile')
-rw-r--r-- | Makefile | 8 |
1 files changed, 5 insertions, 3 deletions
@@ -18,11 +18,14 @@ include Makefile.toolchain include board/$(BOARD)/build.mk # Transform the configuration into make variables +includes=include core/$(CORE)/include $(dirs) $(out) _tsk_lst:=$(shell echo "CONFIG_TASK_LIST" | $(CPP) -P -Iboard/$(BOARD) -Itest \ -D"TASK(n, r, d)=n" -imacros $(PROJECT).tasklist) _tsk_cfg:=$(foreach t,$(_tsk_lst),CONFIG_TASK_$(t)) -_flag_cfg:=$(shell $(CPP) -P -dN chip/$(CHIP)/config.h | grep -o "CONFIG_.*") \ - $(shell $(CPP) -P -dN board/$(BOARD)/board.h | grep -o "CONFIG_.*") +_flag_cfg:=$(shell $(CPP) $(CFLAGS_INCLUDE) -P -dN chip/$(CHIP)/config.h | \ + grep -o "CONFIG_.*") \ + $(shell $(CPP) $(CFLAGS_INCLUDE) -P -dN board/$(BOARD)/board.h | \ + grep -o "CONFIG_.*") $(foreach c,$(_tsk_cfg) $(_flag_cfg),$(eval $(c)=y)) CPPFLAGS+=$(foreach t,$(_tsk_cfg),-D$(t)) @@ -45,6 +48,5 @@ all-y+=$(call objs_from_dir,private,$(private-y)) all-y+=$(call objs_from_dir,common,$(common-y)) all-y+=$(call objs_from_dir,test,$($(PROJECT)-y)) dirs=core/$(CORE) chip/$(CHIP) board/$(BOARD) private common test util -includes=include core/$(CORE)/include $(dirs) $(out) include Makefile.rules |