diff options
author | Tom Hughes <tomhughes@chromium.org> | 2022-09-21 14:10:01 -0700 |
---|---|---|
committer | Tom Hughes <tomhughes@chromium.org> | 2022-09-22 12:49:33 -0700 |
commit | 2bcf863b492fe7ed8105c853814dba6ed32ba719 (patch) | |
tree | fcf6ce5810f9ff9e3c8cce434812dd75492269ed /baseboard/brask | |
parent | e5fb0b9ba488614b5684e640530f00821ab7b943 (diff) | |
parent | 28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff) | |
download | chrome-ec-firmware-fpmcu-bloonchipper-release.tar.gz |
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper
--relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-
fpmcu-bloonchipper-release
Relevant changes:
git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh
ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dc3e9008b8 board/hatch_fp/board.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header
BRANCH=None
BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210
BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908
BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158
BUG=b:234781655 b:215613183 b:242720910
TEST=`make -j buildall`
TEST=./test/run_device_tests.py --board bloonchipper
Test "aes": PASSED
Test "cec": PASSED
Test "cortexm_fpu": PASSED
Test "crc": PASSED
Test "flash_physical": PASSED
Test "flash_write_protect": PASSED
Test "fpsensor_hw": PASSED
Test "fpsensor_spi_ro": PASSED
Test "fpsensor_spi_rw": PASSED
Test "fpsensor_uart_ro": PASSED
Test "fpsensor_uart_rw": PASSED
Test "mpu_ro": PASSED
Test "mpu_rw": PASSED
Test "mutex": PASSED
Test "pingpong": PASSED
Test "printf": PASSED
Test "queue": PASSED
Test "rollback_region0": PASSED
Test "rollback_region1": PASSED
Test "rollback_entropy": PASSED
Test "rtc": PASSED
Test "sha256": PASSED
Test "sha256_unrolled": PASSED
Test "static_if": PASSED
Test "stdlib": PASSED
Test "system_is_locked_wp_on": PASSED
Test "system_is_locked_wp_off": PASSED
Test "timer_dos": PASSED
Test "utils": PASSED
Test "utils_str": PASSED
Test "stm32f_rtc": PASSED
Test "panic_data_bloonchipper_v2.0.4277": PASSED
Test "panic_data_bloonchipper_v2.0.5938": PASSED
Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3
Diffstat (limited to 'baseboard/brask')
-rw-r--r-- | baseboard/brask/baseboard.c | 5 | ||||
-rw-r--r-- | baseboard/brask/baseboard.h | 24 | ||||
-rw-r--r-- | baseboard/brask/baseboard_usbc_config.h | 2 | ||||
-rw-r--r-- | baseboard/brask/build.mk | 2 | ||||
-rw-r--r-- | baseboard/brask/cbi.c | 6 | ||||
-rw-r--r-- | baseboard/brask/cbi.h | 2 | ||||
-rw-r--r-- | baseboard/brask/usb_pd_policy.c | 120 |
7 files changed, 91 insertions, 70 deletions
diff --git a/baseboard/brask/baseboard.c b/baseboard/brask/baseboard.c index 2e60b565f8..5a96ba49ca 100644 --- a/baseboard/brask/baseboard.c +++ b/baseboard/brask/baseboard.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,6 +9,5 @@ #include "gpio_signal.h" /* Wake up pins */ -const enum gpio_signal hibernate_wake_pins[] = { -}; +const enum gpio_signal hibernate_wake_pins[] = {}; const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); diff --git a/baseboard/brask/baseboard.h b/baseboard/brask/baseboard.h index 15a451473d..83a02bec2e 100644 --- a/baseboard/brask/baseboard.h +++ b/baseboard/brask/baseboard.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,16 +11,16 @@ /* * By default, enable all console messages excepted HC */ -#define CC_DEFAULT (CC_ALL & ~(BIT(CC_HOSTCMD))) +#define CC_DEFAULT (CC_ALL & ~(BIT(CC_HOSTCMD))) /* NPCX9 config */ -#define NPCX9_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ +#define NPCX9_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ /* * This defines which pads (GPIO10/11 or GPIO64/65) are connected to * the "UART1" (NPCX_UART_PORT0) controller when used for * CONSOLE_UART. */ -#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 for UART1 */ +#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 for UART1 */ /* CrOS Board Info */ #define CONFIG_CBI_EEPROM @@ -42,9 +42,9 @@ /* Host communication */ #define CONFIG_HOST_INTERFACE_ESPI -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S5 -#define CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S5 +#define CONFIG_HOST_INTERFACE_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST /* LED */ #define CONFIG_LED_COMMON @@ -59,7 +59,7 @@ /* Support Barrel Jack */ #undef CONFIG_DEDICATED_CHARGE_PORT_COUNT #define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 45000 +#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 45000 /* Chipset config */ #define CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540 @@ -86,8 +86,8 @@ /* ADL has new low-power features that requires extra-wide virtual wire * pulses. The EDS specifies 100 microseconds. */ -#undef CONFIG_ESPI_DEFAULT_VW_WIDTH_US -#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US 100 +#undef CONFIG_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US +#define CONFIG_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US 100 /* Buttons */ #define CONFIG_DEDICATED_RECOVERY_BUTTON @@ -137,7 +137,7 @@ #define CONFIG_USB_PD_TCPM_NCT38XX #define CONFIG_USB_PD_TCPM_MUX -#define CONFIG_HOSTCMD_PD_CONTROL /* Needed for TCPC FW update */ +#define CONFIG_HOSTCMD_PD_CONTROL /* Needed for TCPC FW update */ #define CONFIG_CMD_USB_PD_PE /* @@ -145,7 +145,7 @@ * with non-PD chargers. Override the default low-power mode exit delay. */ #undef CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE -#define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE (50*MSEC) +#define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE (50 * MSEC) /* Enable USB3.2 DRD */ #define CONFIG_USB_PD_USB32_DRD diff --git a/baseboard/brask/baseboard_usbc_config.h b/baseboard/brask/baseboard_usbc_config.h index 1b3d9e5d3f..8ebf4f9b6a 100644 --- a/baseboard/brask/baseboard_usbc_config.h +++ b/baseboard/brask/baseboard_usbc_config.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/baseboard/brask/build.mk b/baseboard/brask/build.mk index e29bcaf4ac..4b540d94ad 100644 --- a/baseboard/brask/build.mk +++ b/baseboard/brask/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/baseboard/brask/cbi.c b/baseboard/brask/cbi.c index 038a491f05..0dcfcca253 100644 --- a/baseboard/brask/cbi.c +++ b/baseboard/brask/cbi.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,8 +10,8 @@ #include "cros_board_info.h" #include "hooks.h" -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) static uint8_t board_id; diff --git a/baseboard/brask/cbi.h b/baseboard/brask/cbi.h index 5fa41feadd..219718763f 100644 --- a/baseboard/brask/cbi.h +++ b/baseboard/brask/cbi.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/baseboard/brask/usb_pd_policy.c b/baseboard/brask/usb_pd_policy.c index ddff378ae2..0503415a9d 100644 --- a/baseboard/brask/usb_pd_policy.c +++ b/baseboard/brask/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -15,6 +15,7 @@ #include "console.h" #include "ec_commands.h" #include "gpio.h" +#include "timer.h" #include "usbc_ppc.h" #include "usb_mux.h" #include "usb_pd.h" @@ -24,8 +25,8 @@ #include "usb_pd_vdo.h" #include "util.h" -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) int pd_check_vconn_swap(int port) { @@ -80,54 +81,44 @@ int board_vbus_source_enabled(int port) return ppc_is_sourcing_vbus(port); } +#ifdef CONFIG_USB_PD_TBT_COMPAT_MODE /* ----------------- Vendor Defined Messages ------------------ */ /* Responses specifically for the enablement of TBT mode in the role of UFP */ #define OPOS_TBT 1 -static const union tbt_mode_resp_device vdo_tbt_modes[1] = { - { - .tbt_alt_mode = 0x0001, - .tbt_adapter = TBT_ADAPTER_TBT3, - .intel_spec_b0 = 0, - .vendor_spec_b0 = 0, - .vendor_spec_b1 = 0, - } -}; - -static const uint32_t vdo_idh = VDO_IDH( - 1, /* Data caps as USB host */ - 0, /* Not a USB device */ - IDH_PTYPE_PERIPH, - 1, /* Supports alt modes */ - USB_VID_GOOGLE); - -static const uint32_t vdo_idh_rev30 = VDO_IDH_REV30( - 1, /* Data caps as USB host */ - 0, /* Not a USB device */ - IDH_PTYPE_PERIPH, - 1, /* Supports alt modes */ - IDH_PTYPE_DFP_HOST, - USB_TYPEC_RECEPTACLE, - USB_VID_GOOGLE); - -static const uint32_t vdo_product = VDO_PRODUCT(CONFIG_USB_PID, - CONFIG_USB_BCD_DEV); +static const union tbt_mode_resp_device vdo_tbt_modes[1] = { { + .tbt_alt_mode = 0x0001, + .tbt_adapter = TBT_ADAPTER_TBT3, + .intel_spec_b0 = 0, + .vendor_spec_b0 = 0, + .vendor_spec_b1 = 0, +} }; + +static const uint32_t vdo_idh = VDO_IDH(1, /* Data caps as USB host */ + 0, /* Not a USB device */ + IDH_PTYPE_PERIPH, 1, /* Supports alt + modes */ + USB_VID_GOOGLE); + +static const uint32_t vdo_idh_rev30 = + VDO_IDH_REV30(1, /* Data caps as USB host */ + 0, /* Not a USB device */ + IDH_PTYPE_PERIPH, 1, /* Supports alt modes */ + IDH_PTYPE_DFP_HOST, USB_TYPEC_RECEPTACLE, USB_VID_GOOGLE); + +static const uint32_t vdo_product = + VDO_PRODUCT(CONFIG_USB_PID, CONFIG_USB_BCD_DEV); /* TODO(b/168890624): add USB4 to capability once USB4 response implemented */ static const uint32_t vdo_ufp1 = VDO_UFP1( - (VDO_UFP1_CAPABILITY_USB20 - | VDO_UFP1_CAPABILITY_USB32), - USB_TYPEC_RECEPTACLE, - VDO_UFP1_ALT_MODE_TBT3, - USB_R30_SS_U40_GEN3); - -static const uint32_t vdo_dfp = VDO_DFP( - (VDO_DFP_HOST_CAPABILITY_USB20 - | VDO_DFP_HOST_CAPABILITY_USB32 - | VDO_DFP_HOST_CAPABILITY_USB4), - USB_TYPEC_RECEPTACLE, - 1 /* Port 1 */); + (VDO_UFP1_CAPABILITY_USB20 | VDO_UFP1_CAPABILITY_USB32), + USB_TYPEC_RECEPTACLE, VDO_UFP1_ALT_MODE_TBT3, USB_R30_SS_U40_GEN3); + +static const uint32_t vdo_dfp = + VDO_DFP((VDO_DFP_HOST_CAPABILITY_USB20 | VDO_DFP_HOST_CAPABILITY_USB32 | + VDO_DFP_HOST_CAPABILITY_USB4), + USB_TYPEC_RECEPTACLE, 1 /* Port 1 */); static int svdm_tbt_compat_response_identity(int port, uint32_t *payload) { @@ -166,8 +157,24 @@ static int svdm_tbt_compat_response_modes(int port, uint32_t *payload) } } -static int svdm_tbt_compat_response_enter_mode( - int port, uint32_t *payload) +/* Track whether we've been enabled to ACK TBT EnterModes requests */ +static bool tbt_ufp_ack_allowed[CONFIG_USB_PD_PORT_MAX_COUNT]; + +__override enum ec_status +board_set_tbt_ufp_reply(int port, enum typec_tbt_ufp_reply reply) +{ + /* Note: Host command has already bounds-checked port */ + if (reply == TYPEC_TBT_UFP_REPLY_ACK) + tbt_ufp_ack_allowed[port] = true; + else if (reply == TYPEC_TBT_UFP_REPLY_NAK) + tbt_ufp_ack_allowed[port] = false; + else + return EC_RES_INVALID_PARAM; + + return EC_RES_SUCCESS; +} + +static int svdm_tbt_compat_response_enter_mode(int port, uint32_t *payload) { mux_state_t mux_state = 0; @@ -175,20 +182,34 @@ static int svdm_tbt_compat_response_enter_mode( if (chipset_in_or_transitioning_to_state(CHIPSET_STATE_ANY_OFF)) return 0; /* NAK */ + /* Do not enter mode while policy disallows it */ + if (!tbt_ufp_ack_allowed[port]) + return 0; /* NAK */ + if ((PD_VDO_VID(payload[0]) != USB_VID_INTEL) || - (PD_VDO_OPOS(payload[0]) != OPOS_TBT)) + (PD_VDO_OPOS(payload[0]) != OPOS_TBT)) return 0; /* NAK */ mux_state = usb_mux_get(port); /* * Ref: USB PD 3.0 Spec figure 6-21 Successful Enter Mode sequence - * UFP (responder) should be in USB mode or safe mode before sending - * Enter Mode Command response. + * UFP (responder) should be in USB mode or safe mode before entering a + * Mode that requires the reconfiguring of any pins. */ if ((mux_state & USB_PD_MUX_USB_ENABLED) || - (mux_state & USB_PD_MUX_SAFE_MODE)) { + (mux_state & USB_PD_MUX_SAFE_MODE)) { pd_ufp_set_enter_mode(port, payload); set_tbt_compat_mode_ready(port); + + /* + * Ref: Above figure 6-21: UFP (responder) should be in the new + * mode before sending the ACK. However, our mux set sequence + * may exceed tVDMEnterMode, so wait as long as we can + * before sending the reply without violating that timer. + */ + if (!usb_mux_set_completed(port)) + usleep(PD_T_VDM_E_MODE / 2); + CPRINTS("UFP Enter TBT mode"); return 1; /* ACK */ } @@ -205,3 +226,4 @@ const struct svdm_response svdm_rsp = { .amode = NULL, .exit_mode = NULL, }; +#endif /* CONFIG_USB_PD_TBT_COMPAT_MODE */ |