diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-05-26 12:52:22 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-05-26 21:30:49 +0000 |
| commit | cee89411f54750269e92feb6115955fd0df91825 (patch) | |
| tree | df9eb9696bbb800c369ad30c713c169c3db50365 /baseboard/brask | |
| parent | fd945f793b5af12d8130ddd249c5fc8b91fadd8a (diff) | |
| download | chrome-ec-cee89411f54750269e92feb6115955fd0df91825.tar.gz | |
baseboard/{brya,brask,intelrvp}: Change eSPI VW pulse width to 100 us
Now that the NPCX eSPI code is waiting for the DIRTY bit to be cleared
after setting an SMI# or SCI#, this constant can be changed back to
what is specified in the EDS.
BUG=b:230366077
BRANCH=brya
TEST=attempt SCI-loss reproduction scenario from
b:227367177, and verify that no SCIs were noticed as missing.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I09ecee36beee3ba22a7993e858fe9a0da801be51
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3669816
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Diffstat (limited to 'baseboard/brask')
| -rw-r--r-- | baseboard/brask/baseboard.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/baseboard/brask/baseboard.h b/baseboard/brask/baseboard.h index a38606e351..15a451473d 100644 --- a/baseboard/brask/baseboard.h +++ b/baseboard/brask/baseboard.h @@ -85,9 +85,9 @@ #define CONFIG_HOSTCMD_AP_RESET /* ADL has new low-power features that requires extra-wide virtual wire - * pulses. */ + * pulses. The EDS specifies 100 microseconds. */ #undef CONFIG_ESPI_DEFAULT_VW_WIDTH_US -#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US 150 +#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US 100 /* Buttons */ #define CONFIG_DEDICATED_RECOVERY_BUTTON |