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authorScott Collyer <scollyer@google.com>2018-07-03 17:14:25 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-07-31 16:37:20 -0700
commitfa96abba710e10638d783e1c753c3dc523b0226c (patch)
treea77d354210d79baafa60ea3f336242258c596a8b /baseboard/dragonegg
parent10aa31c7bf2a6a9637a6c2a286df992b8510a4ba (diff)
downloadchrome-ec-fa96abba710e10638d783e1c753c3dc523b0226c.tar.gz
DragonEgg: Add support for Type C port 0, charging, and battery
BRANCH=none BUG=b:111281797 TEST=make buildall Change-Id: I2f4342f2c9ddfb4a6b2debbf94c1b0589227b58c Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1135928 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'baseboard/dragonegg')
-rw-r--r--baseboard/dragonegg/baseboard.c149
-rw-r--r--baseboard/dragonegg/baseboard.h71
-rw-r--r--baseboard/dragonegg/battery.c69
-rw-r--r--baseboard/dragonegg/build.mk2
-rw-r--r--baseboard/dragonegg/usb_pd_policy.c409
5 files changed, 700 insertions, 0 deletions
diff --git a/baseboard/dragonegg/baseboard.c b/baseboard/dragonegg/baseboard.c
index 42335d3902..9c5be6dfb5 100644
--- a/baseboard/dragonegg/baseboard.c
+++ b/baseboard/dragonegg/baseboard.c
@@ -4,8 +4,14 @@
*/
/* DragonEgg family-specific configuration */
+#include "charge_manager.h"
+#include "charge_state_v2.h"
#include "chipset.h"
#include "console.h"
+#include "driver/ppc/sn5s330.h"
+#include "driver/tcpm/it83xx_pd.h"
+#include "driver/tcpm/tcpci.h"
+#include "driver/tcpm/tcpm.h"
#include "espi.h"
#include "gpio.h"
#include "hooks.h"
@@ -13,10 +19,18 @@
#include "power.h"
#include "timer.h"
#include "util.h"
+#include "tcpci.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define USB_PD_PORT_ITE_0 0
#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args)
+#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
/******************************************************************************/
/* Wake up pins */
const enum gpio_signal hibernate_wake_pins[] = {
@@ -114,3 +128,138 @@ void board_hibernate(void)
CPRINTS("PP5000_PG didn't go low after 20 msec");
gpio_set_level(GPIO_EN_PP3300_TCPC, 0);
}
+/******************************************************************************/
+/* USB-C TPCP Configuration */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
+ [USB_PD_PORT_ITE_0] = {
+ /* TCPC is embedded within EC so no i2c config needed */
+ .drv = &it83xx_tcpm_drv,
+ .pol = TCPC_ALERT_ACTIVE_LOW,
+ },
+};
+
+/******************************************************************************/
+/* USB-C PPC Configuration */
+struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_COUNT] = {
+ [USB_PD_PORT_ITE_0] = {
+ .i2c_port = I2C_PORT_USBC0,
+ .i2c_addr = SN5S330_ADDR0,
+ .drv = &sn5s330_drv
+ },
+};
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
+ {
+ .port_addr = 0,
+ .driver = &virtual_usb_mux_driver,
+ .hpd_update = &virtual_hpd_update,
+ },
+};
+
+/* Power Delivery and charging functions */
+
+void baseboard_tcpc_init(void)
+{
+ /* Enable PPC interrupts. */
+ gpio_enable_interrupt(GPIO_USB_C0_TCPPC_INT_L);
+}
+DECLARE_HOOK(HOOK_INIT, baseboard_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
+
+uint16_t tcpc_get_alert_status(void)
+{
+ /*
+ * Since C0/C1 TCPC are embedded within EC, we don't need the PDCMD
+ * tasks.The (embedded) TCPC status since chip driver code will
+ * handles its own interrupts and forward the correct events to
+ * the PD_C0 task. See it83xx/intc.c
+ */
+ return 0;
+}
+
+/**
+ * Reset all system PD/TCPC MCUs -- currently only called from
+ * handle_pending_reboot() in common/power.c just before hard
+ * resetting the system. This logic is likely not needed as the
+ * PP3300_A rail should be dropped on EC reset.
+ */
+void board_reset_pd_mcu(void)
+{
+ /*
+ * C0 & C1: The internal TCPC on ITE EC does not have a reset signal,
+ * but it will get reset when the EC gets reset.
+ */
+}
+void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+{
+ /*
+ * We ignore the cc_pin because the polarity should already be set
+ * correctly in the PPC driver via the pd state machine.
+ */
+ if (ppc_set_vconn(port, enabled) != EC_SUCCESS)
+ cprints(CC_USBPD, "C%d: Failed %sabling vconn",
+ port, enabled ? "en" : "dis");
+}
+
+int board_set_active_charge_port(int port)
+{
+ int is_valid_port = (port >= 0 &&
+ port < CONFIG_USB_PD_PORT_COUNT);
+ int i;
+
+ if (!is_valid_port && port != CHARGE_PORT_NONE)
+ return EC_ERROR_INVAL;
+
+
+ if (port == CHARGE_PORT_NONE) {
+ CPRINTSUSB("Disabling all charger ports");
+
+ /* Disable all ports. */
+ for (i = 0; i < ppc_cnt; i++) {
+ /*
+ * Do not return early if one fails otherwise we can
+ * get into a boot loop assertion failure.
+ */
+ if (ppc_vbus_sink_enable(i, 0))
+ CPRINTSUSB("Disabling C%d as sink failed.", i);
+ }
+
+ return EC_SUCCESS;
+ }
+
+ /* Check if the port is sourcing VBUS. */
+ if (ppc_is_sourcing_vbus(port)) {
+ CPRINTFUSB("Skip enable C%d", port);
+ return EC_ERROR_INVAL;
+ }
+
+ CPRINTSUSB("New charge port: C%d", port);
+
+ /*
+ * Turn off the other ports' sink path FETs, before enabling the
+ * requested charge port.
+ */
+ for (i = 0; i < ppc_cnt; i++) {
+ if (i == port)
+ continue;
+
+ if (ppc_vbus_sink_enable(i, 0))
+ CPRINTSUSB("C%d: sink path disable failed.", i);
+ }
+
+ /* Enable requested charge port. */
+ if (ppc_vbus_sink_enable(port, 1)) {
+ CPRINTSUSB("C%d: sink path enable failed.", port);
+ return EC_ERROR_UNKNOWN;
+ }
+
+ return EC_SUCCESS;
+}
+
+void board_set_charge_limit(int port, int supplier, int charge_ma,
+ int max_ma, int charge_mv)
+{
+ charge_set_input_current_limit(MAX(charge_ma,
+ CONFIG_CHARGER_INPUT_CURRENT),
+ charge_mv);
+}
diff --git a/baseboard/dragonegg/baseboard.h b/baseboard/dragonegg/baseboard.h
index d2879607e1..565fab7707 100644
--- a/baseboard/dragonegg/baseboard.h
+++ b/baseboard/dragonegg/baseboard.h
@@ -17,7 +17,74 @@
/* #define CONFIG_POWER_S0IX */
/* #define CONFIG_POWER_TRACK_HOST_SLEEP_STATE */
+/* Common charger defines */
+#define CONFIG_CHARGE_MANAGER
+/* TODO (b/111309500): Enable this option when support for MAX14637 is added */
+/* #define CONFIG_CHARGE_RAMP_HW */
+#define CONFIG_CHARGER
+#define CONFIG_CHARGER_BQ25710
+#define CONFIG_CHARGER_DISCHARGE_ON_AC
+#define CONFIG_CHARGER_INPUT_CURRENT 512 /* Allow low-current USB charging */
+#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1
+#define CONFIG_CHARGER_SENSE_RESISTOR 10
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
+#define CONFIG_CHARGER_V2
+
+/* Common battery defines */
+#define CONFIG_BATTERY_CUT_OFF
+#define CONFIG_BATTERY_DEVICE_CHEMISTRY "LION"
+#define CONFIG_BATTERY_FUEL_GAUGE
+#define CONFIG_BATTERY_HW_PRESENT_CUSTOM
+#define CONFIG_BATTERY_PRESENT_CUSTOM
+#define CONFIG_BATTERY_REVIVE_DISCONNECT
+#define CONFIG_BATTERY_SMART
+
+/* USB Type C and USB PD defines */
+#undef CONFIG_USB_PD_TCPC_LOW_POWER
+#undef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+#define CONFIG_USB_PD_VBUS_DETECT_PPC
+#define CONFIG_USB_PD_TCPM_ITE83XX /* C0 & C1 TCPC: ITE EC */
+#define CONFIG_USB_POWER_DELIVERY
+/*
+ * TODO (b/111281797): DragonEgg has 3 ports. Only adding support for the port
+ * on the MLB for now. In addition, this config option will likely move to
+ * board.h as it likely board dependent and not same across all follower boards.
+ */
+#define CONFIG_USB_PD_PORT_COUNT 1
+#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0
+#define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_LOGGING
+#define CONFIG_USB_PD_ALT_MODE
+#define CONFIG_USB_PD_ALT_MODE_DFP
+#define CONFIG_USB_PD_DISCHARGE_PPC
+#define CONFIG_USB_PD_TRY_SRC
+#define CONFIG_USB_PD_VBUS_DETECT_PPC
+#define CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT
+#define CONFIG_USB_PD_TCPM_TCPCI
+#define CONFIG_USB_MUX_VIRTUAL
+#define CONFIG_USBC_PPC_SN5S330 /* C0 PPC */
+#define CONFIG_USBC_PPC_VCONN
+#define CONFIG_USBC_SS_MUX
+#define CONFIG_USBC_VCONN
+#define CONFIG_USBC_VCONN_SWAP
+
+#define CONFIG_CMD_PD_CONTROL
+#define CONFIG_CMD_PPC_DUMP
+
+/* TODO(b/111281797): Use correct PD delay values */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
+#define PD_VCONN_SWAP_DELAY 5000 /* us */
+
+/* TODO(b/111281797): Use correct PD power values */
+#define PD_OPERATING_POWER_MW 15000
+#define PD_MAX_POWER_MW 45000
+#define PD_MAX_CURRENT_MA 3000
+#define PD_MAX_VOLTAGE_MV 20000
+
/* I2C Bus Configuration */
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
#define I2C_PORT_BATTERY IT83XX_I2C_CH_F /* Shared bus */
#define I2C_PORT_CHARGER IT83XX_I2C_CH_F /* Shared bus */
#define I2C_PORT_SENSOR IT83XX_I2C_CH_B
@@ -38,6 +105,10 @@ enum power_signal {
/* Number of X86 signals */
POWER_SIGNAL_COUNT
};
+
+/* Forward declare common (within DragonEgg) board-specific functions */
+void board_reset_pd_mcu(void);
+
#endif /* !__ASSEMBLER__ */
#endif /* __CROS_EC_BASEBOARD_H */
diff --git a/baseboard/dragonegg/battery.c b/baseboard/dragonegg/battery.c
new file mode 100644
index 0000000000..c5f5c97a36
--- /dev/null
+++ b/baseboard/dragonegg/battery.c
@@ -0,0 +1,69 @@
+/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "battery.h"
+#include "battery_smart.h"
+#include "gpio.h"
+
+static enum battery_present batt_pres_prev = BP_NOT_SURE;
+
+enum battery_present battery_hw_present(void)
+{
+ /* The GPIO is low when the battery is physically present */
+ return gpio_get_level(GPIO_EC_BATT_PRES_ODL) ? BP_NO : BP_YES;
+}
+
+static int battery_init(void)
+{
+ int batt_status;
+
+ return battery_status(&batt_status) ? 0 :
+ !!(batt_status & STATUS_INITIALIZED);
+}
+
+/*
+ * Physical detection of battery.
+ */
+static enum battery_present battery_check_present_status(void)
+{
+ enum battery_present batt_pres;
+
+ /* Get the physical hardware status */
+ batt_pres = battery_hw_present();
+
+ /*
+ * If the battery is not physically connected, then no need to perform
+ * any more checks.
+ */
+ if (batt_pres != BP_YES)
+ return batt_pres;
+
+ /*
+ * If the battery is present now and was present last time we checked,
+ * return early.
+ */
+ if (batt_pres == batt_pres_prev)
+ return batt_pres;
+
+ /*
+ * Ensure that battery is:
+ * 1. Not in cutoff
+ * 2. Initialized
+ */
+ if (battery_is_cut_off() != BATTERY_CUTOFF_STATE_NORMAL ||
+ battery_init() == 0) {
+ batt_pres = BP_NO;
+ }
+
+ return batt_pres;
+}
+
+enum battery_present battery_is_present(void)
+{
+ batt_pres_prev = battery_check_present_status();
+ return batt_pres_prev;
+}
diff --git a/baseboard/dragonegg/build.mk b/baseboard/dragonegg/build.mk
index ff9ef6728f..7f3c8a3669 100644
--- a/baseboard/dragonegg/build.mk
+++ b/baseboard/dragonegg/build.mk
@@ -7,3 +7,5 @@
#
baseboard-y=baseboard.o
+baseboard-$(CONFIG_BATTERY_SMART)+=battery.o
+baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
diff --git a/baseboard/dragonegg/usb_pd_policy.c b/baseboard/dragonegg/usb_pd_policy.c
new file mode 100644
index 0000000000..bca4961d45
--- /dev/null
+++ b/baseboard/dragonegg/usb_pd_policy.c
@@ -0,0 +1,409 @@
+/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Shared USB-C policy for DragonEgg boards */
+
+#include "charge_manager.h"
+#include "common.h"
+#include "compile_time_macros.h"
+#include "console.h"
+#include "ec_commands.h"
+#include "gpio.h"
+#include "system.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
+ PDO_FIXED_COMM_CAP)
+
+const uint32_t pd_src_pdo[] = {
+ PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
+const uint32_t pd_src_pdo_max[] = {
+ PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max);
+
+const uint32_t pd_snk_pdo[] = {
+ PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
+ PDO_BATT(4750, 21000, 15000),
+ PDO_VAR(4750, 21000, 3000),
+};
+const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
+
+int pd_board_checks(void)
+{
+ return EC_SUCCESS;
+}
+
+int pd_check_data_swap(int port, int data_role)
+{
+ /*
+ * Allow data swap if we are a UFP, otherwise don't allow.
+ *
+ * When we are still in the Read-Only firmware, avoid swapping roles
+ * so we don't jump in RW as a SNK/DFP and potentially confuse the
+ * power supply by sending a soft-reset with wrong data role.
+ */
+ return (data_role == PD_ROLE_UFP) &&
+ (system_get_image_copy() != SYSTEM_IMAGE_RO) ? 1 : 0;
+}
+
+void pd_check_dr_role(int port, int dr_role, int flags)
+{
+ /* If UFP, try to switch to DFP */
+ if ((flags & PD_FLAGS_PARTNER_DR_DATA) &&
+ dr_role == PD_ROLE_UFP &&
+ system_get_image_copy() != SYSTEM_IMAGE_RO)
+ pd_request_data_swap(port);
+}
+
+int pd_check_power_swap(int port)
+{
+ /*
+ * Allow power swap as long as we are acting as a dual role device,
+ * otherwise assume our role is fixed (not in S0 or console command
+ * to fix our role).
+ */
+ return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0;
+}
+
+void pd_check_pr_role(int port, int pr_role, int flags)
+{
+ /*
+ * If partner is dual-role power and dualrole toggling is on, consider
+ * if a power swap is necessary.
+ */
+ if ((flags & PD_FLAGS_PARTNER_DR_POWER) &&
+ pd_get_dual_role() == PD_DRP_TOGGLE_ON) {
+ /*
+ * If we are a sink and partner is not externally powered, then
+ * swap to become a source. If we are source and partner is
+ * externally powered, swap to become a sink.
+ */
+ int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER;
+
+ if ((!partner_extpower && pr_role == PD_ROLE_SINK) ||
+ (partner_extpower && pr_role == PD_ROLE_SOURCE))
+ pd_request_power_swap(port);
+ }
+}
+
+int pd_check_vconn_swap(int port)
+{
+ /* Only allow vconn swap if pp5000_A rail is enabled */
+ return gpio_get_level(GPIO_EN_PP5000);
+}
+
+void pd_execute_data_swap(int port, int data_role)
+{
+ /* On DragonEgg, only the first port can act as OTG */
+ if (port == 0)
+ gpio_set_level(GPIO_CHG_VAP_OTG_EN, (data_role == PD_ROLE_UFP));
+}
+
+int pd_is_valid_input_voltage(int mv)
+{
+ return 1;
+}
+
+void pd_power_supply_reset(int port)
+{
+ int prev_en;
+
+ prev_en = ppc_is_sourcing_vbus(port);
+
+ /* Disable VBUS. */
+ ppc_vbus_source_enable(port, 0);
+
+ /* Enable discharge if we were previously sourcing 5V */
+ if (prev_en)
+ pd_set_vbus_discharge(port, 1);
+
+#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
+ /* Give back the current quota we are no longer using */
+ charge_manager_source_port(port, 0);
+#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
+
+ /* Notify host of power info change. */
+ pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+int pd_set_power_supply_ready(int port)
+{
+ int rv;
+
+ /* Disable charging. */
+ rv = ppc_vbus_sink_enable(port, 0);
+ if (rv)
+ return rv;
+
+ pd_set_vbus_discharge(port, 0);
+
+ /* Provide Vbus. */
+ rv = ppc_vbus_source_enable(port, 1);
+ if (rv)
+ return rv;
+
+#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
+ /* Ensure we advertise the proper available current quota */
+ charge_manager_source_port(port, 1);
+#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
+
+ /* Notify host of power info change. */
+ pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+ return EC_SUCCESS;
+}
+
+void pd_transition_voltage(int idx)
+{
+ /* No-operation: we are always 5V */
+}
+
+#ifdef CONFIG_USB_PD_VBUS_DETECT_PPC
+int pd_snk_is_vbus_provided(int port)
+{
+ return ppc_is_vbus_present(port);
+}
+#endif
+
+void typec_set_source_current_limit(int port, int rp)
+{
+ ppc_set_vbus_source_current_limit(port, rp);
+}
+
+int board_vbus_source_enabled(int port)
+{
+ return ppc_is_sourcing_vbus(port);
+}
+
+
+/* ----------------- Vendor Defined Messages ------------------ */
+const struct svdm_response svdm_rsp = {
+ .identity = NULL,
+ .svids = NULL,
+ .modes = NULL,
+};
+
+int pd_custom_vdm(int port, int cnt, uint32_t *payload,
+ uint32_t **rpayload)
+{
+ int cmd = PD_VDO_CMD(payload[0]);
+ uint16_t dev_id = 0;
+ int is_rw, is_latest;
+
+ /* make sure we have some payload */
+ if (cnt == 0)
+ return 0;
+
+ switch (cmd) {
+ case VDO_CMD_VERSION:
+ /* guarantee last byte of payload is null character */
+ *(payload + cnt - 1) = 0;
+ CPRINTF("version: %s\n", (char *)(payload+1));
+ break;
+ case VDO_CMD_READ_INFO:
+ case VDO_CMD_SEND_INFO:
+ /* copy hash */
+ if (cnt == 7) {
+ dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
+ is_rw = VDO_INFO_IS_RW(payload[6]);
+
+ is_latest = pd_dev_store_rw_hash(port,
+ dev_id,
+ payload + 1,
+ is_rw ?
+ SYSTEM_IMAGE_RW :
+ SYSTEM_IMAGE_RO);
+ /*
+ * Send update host event unless our RW hash is
+ * already known to be the latest update RW.
+ */
+ if (!is_rw || !is_latest)
+ pd_send_host_event(PD_EVENT_UPDATE_DEVICE);
+
+ CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
+ HW_DEV_ID_MAJ(dev_id),
+ HW_DEV_ID_MIN(dev_id),
+ VDO_INFO_SW_DBG_VER(payload[6]),
+ is_rw);
+ } else if (cnt == 6) {
+ /* really old devices don't have last byte */
+ pd_dev_store_rw_hash(port, dev_id, payload + 1,
+ SYSTEM_IMAGE_UNKNOWN);
+ }
+ break;
+ case VDO_CMD_CURRENT:
+ CPRINTF("Current: %dmA\n", payload[1]);
+ break;
+ case VDO_CMD_FLIP:
+ usb_mux_flip(port);
+ break;
+#ifdef CONFIG_USB_PD_LOGGING
+ case VDO_CMD_GET_LOG:
+ pd_log_recv_vdm(port, cnt, payload);
+ break;
+#endif /* CONFIG_USB_PD_LOGGING */
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_USB_PD_ALT_MODE_DFP
+static int dp_flags[CONFIG_USB_PD_PORT_COUNT];
+static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT];
+
+static void svdm_safe_dp_mode(int port)
+{
+ /* make DP interface safe until configure */
+ dp_flags[port] = 0;
+ dp_status[port] = 0;
+ usb_mux_set(port, TYPEC_MUX_NONE,
+ USB_SWITCH_CONNECT, pd_get_polarity(port));
+}
+
+static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
+{
+ /* Only enter mode if device is DFP_D capable */
+ if (mode_caps & MODE_DP_SNK) {
+ svdm_safe_dp_mode(port);
+ return 0;
+ }
+
+ return -1;
+}
+
+static int svdm_dp_status(int port, uint32_t *payload)
+{
+ int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+
+ payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+ CMD_DP_STATUS | VDO_OPOS(opos));
+ payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */
+ 0, /* HPD level ... not applicable */
+ 0, /* exit DP? ... no */
+ 0, /* usb mode? ... no */
+ 0, /* multi-function ... no */
+ (!!(dp_flags[port] & DP_FLAGS_DP_ON)),
+ 0, /* power low? ... no */
+ (!!(dp_flags[port] & DP_FLAGS_DP_ON)));
+ return 2;
+};
+
+static int svdm_dp_config(int port, uint32_t *payload)
+{
+ int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+ int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]);
+ int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]);
+
+ if (!pin_mode)
+ return 0;
+
+ usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP,
+ USB_SWITCH_CONNECT, pd_get_polarity(port));
+
+ payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+ CMD_DP_CONFIG | VDO_OPOS(opos));
+ payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */
+ 1, /* DPv1.3 signaling */
+ 2); /* UFP connected */
+ return 2;
+};
+
+
+static void svdm_dp_post_config(int port)
+{
+ const struct usb_mux *mux = &usb_muxes[port];
+
+ dp_flags[port] |= DP_FLAGS_DP_ON;
+ if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING))
+ return;
+ mux->hpd_update(port, 1, 0);
+}
+
+static int svdm_dp_attention(int port, uint32_t *payload)
+{
+ int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
+ int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
+ const struct usb_mux *mux = &usb_muxes[port];
+
+ dp_status[port] = payload[1];
+ if (!(dp_flags[port] & DP_FLAGS_DP_ON)) {
+ if (lvl)
+ dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING;
+ return 1;
+ }
+ mux->hpd_update(port, lvl, irq);
+
+ /* ack */
+ return 1;
+}
+
+static void svdm_exit_dp_mode(int port)
+{
+ const struct usb_mux *mux = &usb_muxes[port];
+
+ svdm_safe_dp_mode(port);
+ mux->hpd_update(port, 0, 0);
+}
+
+static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
+{
+ /* Always enter GFU mode */
+ return 0;
+}
+
+static void svdm_exit_gfu_mode(int port)
+{
+}
+
+static int svdm_gfu_status(int port, uint32_t *payload)
+{
+ /*
+ * This is called after enter mode is successful, send unstructured
+ * VDM to read info.
+ */
+ pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
+ return 0;
+}
+
+static int svdm_gfu_config(int port, uint32_t *payload)
+{
+ return 0;
+}
+
+static int svdm_gfu_attention(int port, uint32_t *payload)
+{
+ return 0;
+}
+
+const struct svdm_amode_fx supported_modes[] = {
+ {
+ .svid = USB_SID_DISPLAYPORT,
+ .enter = &svdm_enter_dp_mode,
+ .status = &svdm_dp_status,
+ .config = &svdm_dp_config,
+ .post_config = &svdm_dp_post_config,
+ .attention = &svdm_dp_attention,
+ .exit = &svdm_exit_dp_mode,
+ },
+ {
+ .svid = USB_VID_GOOGLE,
+ .enter = &svdm_enter_gfu_mode,
+ .status = &svdm_gfu_status,
+ .config = &svdm_gfu_config,
+ .attention = &svdm_gfu_attention,
+ .exit = &svdm_exit_gfu_mode,
+ }
+};
+const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
+#endif /* CONFIG_USB_PD_ALT_MODE_DFP */