diff options
| author | Diana Z <dzigterman@chromium.org> | 2021-06-28 15:58:13 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-07 16:44:02 +0000 |
| commit | 8fde798c826f4172f45cc86e773114010faf762e (patch) | |
| tree | fad7547f74dceb1d82ef2001055b907ebdcdc1c6 /baseboard/guybrush | |
| parent | 08fb59cd346692eea2391f3604c09cc7e9485aba (diff) | |
| download | chrome-ec-8fde798c826f4172f45cc86e773114010faf762e.tar.gz | |
Guybrush: Set both FRS signals as GPIO
Both PPCs require the FRS signal be set as soon as we've enabled FRS
swapping. Use the board FRS enable function to set these through the
TCPC ioexpander.
BRANCH=None
BUG=b:183586640
TEST=on guybrush, attach WooHubs to C0 and C1, and ensure FRS can
complete successfully
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I486b29c128e1d31f9d35e15df1e12a1eb3f2f3db
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993559
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Diffstat (limited to 'baseboard/guybrush')
| -rw-r--r-- | baseboard/guybrush/base_gpio.inc | 2 | ||||
| -rw-r--r-- | baseboard/guybrush/usb_pd_policy.c | 15 |
2 files changed, 17 insertions, 0 deletions
diff --git a/baseboard/guybrush/base_gpio.inc b/baseboard/guybrush/base_gpio.inc index 0964cbd8b5..24be8de795 100644 --- a/baseboard/guybrush/base_gpio.inc +++ b/baseboard/guybrush/base_gpio.inc @@ -135,6 +135,7 @@ GPIO(ESPI_EC_ALERT_SOC_L, PIN(5, 7), GPIO_DEFAULT) #endif /* TCPC C0 */ +IOEX(USB_C0_TCPC_FASTSW_CTL_EN, EXPIN(USBC_PORT_C0, 0, 4), GPIO_OUT_LOW) IOEX(USB_C0_PPC_EN_L, EXPIN(USBC_PORT_C0, 1, 0), GPIO_OUT_LOW) IOEX(USB_C0_PPC_ILIM_3A_EN, EXPIN(USBC_PORT_C0, 1, 1), GPIO_OUT_LOW) IOEX_INT(USB_C0_SBU_FAULT_ODL, EXPIN(USBC_PORT_C0, 1, 2), GPIO_INT_FALLING, sbu_fault_interrupt) @@ -146,6 +147,7 @@ IOEX(USB_C0_SBU_FLIP, EXPIN(USBC_PORT_C0, 1, 7), GPIO_OUT_LOW) IOEX(USB_A1_RETIMER_EN, EXPIN(USBC_PORT_C1, 0, 0), GPIO_OUT_LOW) IOEX(USB_A1_RETIMER_RST, EXPIN(USBC_PORT_C1, 0, 1), GPIO_OUT_LOW) IOEX(USB_C1_IN_HPD, EXPIN(USBC_PORT_C1, 0, 3), GPIO_OUT_LOW) +IOEX(USB_C1_TCPC_FASTSW_CTL_EN, EXPIN(USBC_PORT_C1, 0, 4), GPIO_OUT_LOW) IOEX(USB_C1_PPC_EN_L, EXPIN(USBC_PORT_C1, 1, 0), GPIO_OUT_LOW) IOEX(USB_C1_PPC_ILIM_3A_EN, EXPIN(USBC_PORT_C1, 1, 1), GPIO_OUT_LOW) IOEX_INT(USB_C1_SBU_FAULT_ODL, EXPIN(USBC_PORT_C1, 1, 2), GPIO_INT_FALLING, sbu_fault_interrupt) diff --git a/baseboard/guybrush/usb_pd_policy.c b/baseboard/guybrush/usb_pd_policy.c index 86e4400b63..79725e827a 100644 --- a/baseboard/guybrush/usb_pd_policy.c +++ b/baseboard/guybrush/usb_pd_policy.c @@ -12,6 +12,7 @@ #include "console.h" #include "ec_commands.h" #include "gpio.h" +#include "ioexpander.h" #include "system.h" #include "usb_mux.h" #include "usb_pd.h" @@ -64,6 +65,20 @@ int pd_set_power_supply_ready(int port) return EC_SUCCESS; } +__override int board_pd_set_frs_enable(int port, int enable) +{ + /* + * Both PPCs require the FRS GPIO to be set as soon as FRS capability + * is established. + */ + if (port == 0) + ioex_set_level(IOEX_USB_C0_TCPC_FASTSW_CTL_EN, enable); + else if (port == 1) + ioex_set_level(IOEX_USB_C1_TCPC_FASTSW_CTL_EN, enable); + + return EC_SUCCESS; +} + /* Used by Vbus discharge common code with CONFIG_USB_PD_DISCHARGE */ int board_vbus_source_enabled(int port) { |