npcx7: UART: wait for Tx empty before enabling deep-sleep

In the original firmware (in the uart_buffering.c), it clears the
SLEEP_MASK_UART immediately after it pushes all characters from its Tx
buffer to UART's FIFO without checking the status of transmission. It
may break the transmission because EC goes to deep sleep before UART TX
(FIFO or shift register) becomes empty. This CL fixes it by:
(1) Don't clear SLEEP_MASK_UART immediately when uart_tx_stop is called.
(2) Enable the NXMIP (No Transmit in Progress) interrupt.
(3) Clear SLEEP_MASK_UART in the UART interrupt handler when NXMIP is
    set.
This fix only needs to apply to NPCX7 chips which have UART FIFO support.

BRANCH=none
BUG=b:137143640
TEST=No error for "make buildall"
TEST=run 10 iterations of uart_stress_tester on yorp with command:
./util/uart_stress_tester.py /dev/ttyUSB2 -t 360;
make sure no character lost in each iteration as below:
...
INFO   | UartSerial| /dev/ttyUSB2  | Detected as EC UART
INFO   | UartSerial| EC            | Ready to test
INFO   | ChargenTest               | Ports are ready to test
INFO   | ChargenTest               | Test starts
INFO   | UartSerial| EC            | Test thread starts
INFO   | UartSerial| EC            | Test thread is done
INFO   | UartSerial| EC            |        0 char lost /    4147200 (0.0 %)
INFO   | ChargenTest               | PASS: lost 0 character(s) from the test
INFO   | ChargenTest               | Test is done

Change-Id: I97b1f572e8b9ebdb5102aa3e98ae2963d768b5b3
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1703944
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>

0 files changed, 0 insertions, 0 deletions