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| author | Tom Hughes <tomhughes@chromium.org> | 2021-01-26 10:38:55 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-28 16:38:57 +0000 |
| commit | 2f40b71b625bcd826fd0cb4a005985abef0b8903 (patch) | |
| tree | 1f67563e6de1dc64fd4d40bb50ea70d2a17d18a7 /baseboard/intelrvp/README.md | |
| parent | 4e950b9fde9e5d7197d2558f7a36bc809e193a49 (diff) | |
| download | chrome-ec-2f40b71b625bcd826fd0cb4a005985abef0b8903.tar.gz | |
docs: Run mdformat on all .md files
BRANCH=none
BUG=b:178648877
TEST=view in gitiles
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I0ac5581ba7bc512234d40dbf34222422afa9c725
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2650551
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'baseboard/intelrvp/README.md')
| -rw-r--r-- | baseboard/intelrvp/README.md | 55 |
1 files changed, 26 insertions, 29 deletions
diff --git a/baseboard/intelrvp/README.md b/baseboard/intelrvp/README.md index 2ecad4dd0c..21e30ee417 100644 --- a/baseboard/intelrvp/README.md +++ b/baseboard/intelrvp/README.md @@ -1,39 +1,36 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - This folder is for the baseboard for the board specific files which use Intel Reference Validation Platform (RVP) for developing the EC and other peripherals which can be hooked on EC or RVP. This baseboard follows the Intel Modular Embedded Controller Card (MECC) -specification for pinout and these pin definitions remain same on all the -RVPs. Chrome MECC spec is standardized for Icelake and successor RVPs hence -this baseboard code is applicable to Icelake and its successors only. +specification for pinout and these pin definitions remain same on all the RVPs. +Chrome MECC spec is standardized for Icelake and successor RVPs hence this +baseboard code is applicable to Icelake and its successors only. Following hardware features are supported on MECC header by RVP and can be validated by software by MECC. -MECC version 0.9 features -1. Power to MECC is provide by RVP (battery + DC Jack + Type C) -2. Power control pins for Intel SOC are added -3. Servo V2 header need to be added by MECC -4. Google H1 chip need to be added by MECC (optional for EC vendors) -5. 2 Type-C port support (SRC/SNK/BC1.2/MUX/Rerimer) -6. 6 Temperature sensors -7. 4 ADC -8. 4 I2C Channels -9. 1 Fan control +## MECC version 0.9 features + +1. Power to MECC is provide by RVP (battery + DC Jack + Type C) +2. Power control pins for Intel SOC are added +3. Servo V2 header need to be added by MECC +4. Google H1 chip need to be added by MECC (optional for EC vendors) +5. 2 Type-C port support (SRC/SNK/BC1.2/MUX/Rerimer) +6. 6 Temperature sensors +7. 4 ADC +8. 4 I2C Channels +9. 1 Fan control + +## MECC version 1.0 features -MECC version 1.0 features -1. Power to MECC is provide by RVP (battery + DC Jack + Type C) -2. Power control pins for Intel SOC are added -3. Servo V2 header need to be added by MECC -4. Google H1 chip need to be added by MECC (optional for EC vendors) -5. 4 Type-C port support (SRC/SNK/BC1.2/MUX/Rerimer) as Add In Card (AIC) - on RVP -6. Optional 2 Type-C port routed to MECC for integrated TCPC support -7. 6 I2C Channels -8. 2 SMLINK Channels -9. 2 I3C channels +1. Power to MECC is provide by RVP (battery + DC Jack + Type C) +2. Power control pins for Intel SOC are added +3. Servo V2 header need to be added by MECC +4. Google H1 chip need to be added by MECC (optional for EC vendors) +5. 4 Type-C port support (SRC/SNK/BC1.2/MUX/Rerimer) as Add In Card (AIC) on + RVP +6. Optional 2 Type-C port routed to MECC for integrated TCPC support +7. 6 I2C Channels +8. 2 SMLINK Channels +9. 2 I3C channels |