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| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2021-03-29 11:35:32 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-04-29 20:35:48 +0000 |
| commit | de1b38abb4d61d430ff76e2c4587eed4be5582d6 (patch) | |
| tree | 7c225cae7b79e77a150690362937bf504b3f952b /baseboard/intelrvp/adlrvp.h | |
| parent | 0ef0f5524e81f9a96f2bb9fd8d1517e8b0f19cb6 (diff) | |
| download | chrome-ec-de1b38abb4d61d430ff76e2c4587eed4be5582d6.tar.gz | |
adlrvp: Add TBT & USB4 overridable function
Type-C ports are not symmetrical on RVP to test various combinations.
ADL-P-LP5 RVP doesn't have a platform level AUX & LSx MUX on port-2
hence do not perform USB4 & TBT operations on port-2.
BUG=none
BRANCH=none
TEST=Connected TBT3 device on Port-2 of ADLRVP_P_LP5 board,
only DP+USB is selected as expected.
Change-Id: I52bbd4b8518d040cad637559cad0fd3533fcd5ea
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2791780
Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'baseboard/intelrvp/adlrvp.h')
| -rw-r--r-- | baseboard/intelrvp/adlrvp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/baseboard/intelrvp/adlrvp.h b/baseboard/intelrvp/adlrvp.h index f2e264e181..0c9ffb546e 100644 --- a/baseboard/intelrvp/adlrvp.h +++ b/baseboard/intelrvp/adlrvp.h @@ -15,6 +15,7 @@ /* RVP Board ids */ #define ADLP_LP5_T4_RVP_SKU_BOARD_ID 0x13 +#define ADL_RVP_BOARD_ID(id) ((id) & 0x3F) /* MECC config */ #define CONFIG_INTEL_RVP_MECC_VERSION_1_0 |