intelrvp: update usb_pd files to indicate MECC version compliance

Add new configuration for MECC-0.9 version and update JSL,TGL RVP boards
to use this config option. Support for new version of MECC-1.0 will
be required for ADL-RVP.

BRANCH=None
BUG=b:169551130
TEST=make buildall -j

Signed-off-by: pandeyan <anshuman.pandey@intel.com>
Change-Id: Ic1118c460a7052ffd0141a45c9153dbdac421d1b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435175
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: Poornima Tom <poornima.tom@intel.com>

1 files changed, 112 insertions, 0 deletions

diff --git a/baseboard/intelrvp/chg_usb_pd_mecc_0_9.c b/baseboard/intelrvp/chg_usb_pd_mecc_0_9.c
new file mode 100644
index 0000000000..aafc6eeb44
--- /dev/null
+++ b/baseboard/intelrvp/chg_usb_pd_mecc_0_9.c
@@ -0,0 +1,112 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Intel-RVP family-specific configuration */
+
+#include "console.h"
+#include "hooks.h"
+#include "tcpci.h"
+#include "system.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+int board_vbus_source_enabled(int port)
+{
+	int src_en = 0;
+
+	/* Only Type-C ports can source VBUS */
+	if (is_typec_port(port)) {
+		src_en = gpio_get_level(tcpc_gpios[port].src.pin);
+
+		src_en = tcpc_gpios[port].src.pin_pol ? src_en : !src_en;
+	}
+
+	return src_en;
+}
+
+void board_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp)
+{
+	int ilim_en;
+
+	/* Only Type-C ports can source VBUS */
+	if (is_typec_port(port)) {
+		/* Enable SRC ILIM if rp is MAX single source current */
+		ilim_en = (rp == CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT &&
+			board_vbus_source_enabled(port));
+
+		gpio_set_level(tcpc_gpios[port].src_ilim.pin,
+				tcpc_gpios[port].src_ilim.pin_pol ?
+				ilim_en : !ilim_en);
+	}
+}
+
+void board_charging_enable(int port, int enable)
+{
+	gpio_set_level(tcpc_gpios[port].snk.pin,
+		tcpc_gpios[port].snk.pin_pol ? enable : !enable);
+
+}
+
+void board_vbus_enable(int port, int enable)
+{
+	gpio_set_level(tcpc_gpios[port].src.pin,
+		tcpc_gpios[port].src.pin_pol ? enable : !enable);
+}
+
+int pd_snk_is_vbus_provided(int port)
+{
+	int vbus_intr;
+
+	if (port == DEDICATED_CHARGE_PORT)
+		return 1;
+
+	vbus_intr = gpio_get_level(tcpc_gpios[port].vbus.pin);
+
+	return tcpc_gpios[port].vbus.pin_pol ? vbus_intr : !vbus_intr;
+}
+
+void tcpc_alert_event(enum gpio_signal signal)
+{
+	int i;
+
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
+		if (tcpc_gpios[i].vbus.pin == signal) {
+			schedule_deferred_pd_interrupt(i);
+			break;
+		}
+	}
+}
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+	int i;
+
+	/* Check which port has the ALERT line set */
+	for (i = 0; i < CHARGE_PORT_COUNT; i++) {
+		/* No alerts for embdeded TCPC */
+		if (tcpc_config[i].bus_type == EC_BUS_TYPE_EMBEDDED)
+			continue;
+
+		/* Add TCPC alerts if present */
+	}
+
+	return status;
+}
+
+void board_tcpc_init(void)
+{
+	int i;
+
+	/* Only reset TCPC if not sysjump */
+	if (!system_jumped_late())
+		board_reset_pd_mcu();
+
+	/* Enable TCPCx interrupt */
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++)
+		gpio_enable_interrupt(tcpc_gpios[i].vbus.pin);
+}
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);