Intelrvp: Add baseboard for Intel RVPs

Intel-RVP supports Chrome EC via an Add In Card called as MECC
(Modular Embedded Controller Card). MECC has a standard spec
which defines pin routing and purpose of these pins. These MECC
pins are same across all the platforms hence we can have a baseboard
for Intel-RVPs and reuse the code for RVP board specific codes.

Chrome MECC spec is standardized for Icelake and successor RVPs hence
this baseboard code is applicable to Icelake and its successors only.

BUG=b:132061907
TEST=Using this baseboard implemented board code for ICLRVP, and
     it can boot all the way to Chrome OS.
BRANCH=none

Change-Id: I4de891d4720e8cad83888caf9635f61f2ca11b8b
Signed-off-by: Daniel Gonzalez <daniel.d.gonzalez@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1594171
Commit-Ready: Jett Rink <jettrink@chromium.org>
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>

1 files changed, 90 insertions, 0 deletions

diff --git a/baseboard/intelrvp/ite_ec.c b/baseboard/intelrvp/ite_ec.c
new file mode 100644
index 0000000000..d6640bf10f
--- /dev/null
+++ b/baseboard/intelrvp/ite_ec.c
@@ -0,0 +1,90 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Intel BASEBOARD-RVP ITE EC specific configuration */
+
+#include "common.h"
+#include "it83xx_pd.h"
+#include "keyboard_scan.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "timer.h"
+#include "usb_pd_tcpm.h"
+
+/* USB-C TPCP Configuration */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
+	[TYPE_C_PORT_0] = {
+		/* TCPC is embedded within EC so no i2c config needed */
+		.drv = &it83xx_tcpm_drv,
+	},
+#ifdef HAS_TASK_PD_C1
+	[TYPE_C_PORT_1] = {
+		/* TCPC is embedded within EC so no i2c config needed */
+		.drv = &it83xx_tcpm_drv,
+	},
+#endif /* HAS_TASK_PD_C1 */
+};
+BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_COUNT);
+
+/* Reset PD MCU */
+void board_reset_pd_mcu(void)
+{
+	/* Not applicable for ITE TCPC */
+}
+
+uint16_t tcpc_get_alert_status(void)
+{
+	/*
+	 * Since C0/C1 TCPC are embedded within EC, we don't need the
+	 * PDCMD tasks. The (embedded) TCPC status since chip driver
+	 * code handles its own interrupts and forward the correct
+	 * events to the PD_C0 task. See it83xx/intc.c
+	 */
+
+	return 0;
+}
+
+/* Keyboard scan setting */
+struct keyboard_scan_config keyscan_config = {
+	.output_settle_us = 35,
+	.debounce_down_us = 5 * MSEC,
+	.debounce_up_us = 40 * MSEC,
+	.scan_period_us = 3 * MSEC,
+	.min_post_scan_delay_us = 1000,
+	.poll_timeout_us = 100 * MSEC,
+	.actual_key_mask = {
+		0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
+		0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca  /* full set */
+	},
+};
+
+/*
+ * PWM HW channelx binding tachometer channelx for fan control.
+ * Four tachometer input pins but two tachometer modules only,
+ * so always binding [TACH_CH_TACH0A | TACH_CH_TACH0B] and/or
+ * [TACH_CH_TACH1A | TACH_CH_TACH1B]
+ */
+const struct fan_tach_t fan_tach[] = {
+	{TACH_CH_NULL,  -1, -1, -1},
+	{TACH_CH_NULL,  -1, -1, -1},
+	{TACH_CH_NULL,  -1, -1, -1},
+	{TACH_CH_NULL,  -1, -1, -1},
+	{TACH_CH_NULL,  -1, -1, -1},
+	{TACH_CH_NULL,  -1, -1, -1},
+	{TACH_CH_NULL,  -1, -1, -1},
+	{TACH_CH_TACH1A, 2, 50, 30},
+};
+BUILD_ASSERT(ARRAY_SIZE(fan_tach) == PWM_HW_CH_TOTAL);
+
+/* PWM channels */
+const struct pwm_t pwm_channels[] = {
+	[PWM_CH_FAN] = {
+		.channel = PWM_HW_CH_DCR2,
+		.flags = PWM_CONFIG_ACTIVE_LOW,
+		.freq_hz = 30000,
+		.pcfsr_sel = PWM_PRESCALER_C4,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);