diff options
| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2021-06-18 11:38:33 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-06-19 00:02:04 +0000 |
| commit | 60241e8d8db585c949aafb330c178012773ad640 (patch) | |
| tree | a23e9b8a75019b312128ed55c8bda831958003b4 /baseboard/intelrvp | |
| parent | bbd967de266e4c615d3e34ed8ae5425f175bf7e0 (diff) | |
| download | chrome-ec-60241e8d8db585c949aafb330c178012773ad640.tar.gz | |
adlrvp: Cache BB retimer's power state
Ports with cascaded retimers share common load switch and reset pin
hence no need to set the power state of retimer again if the 1st
retimer's power status has already changed. Otherwise, it will add
additional delay to enable the 2nd retimer. Thus, added code to
cache the power state of the retimer per port instead of individual
retimer.
BUG=none
BRANCH=none
TEST=Tested on ADL-P-DDR5 board that has cascaded retimer topology,
no delay added when enabling SOC side retimer.
Change-Id: I4b67b6aca96bf20776424b3e56f382b021d4084d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954730
Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'baseboard/intelrvp')
| -rw-r--r-- | baseboard/intelrvp/adlrvp.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/baseboard/intelrvp/adlrvp.c b/baseboard/intelrvp/adlrvp.c index f0f2cb92ad..d7840fd9f4 100644 --- a/baseboard/intelrvp/adlrvp.c +++ b/baseboard/intelrvp/adlrvp.c @@ -197,6 +197,9 @@ const struct bb_usb_control bb_controls[] = { }; BUILD_ASSERT(ARRAY_SIZE(bb_controls) == CONFIG_USB_PD_PORT_MAX_COUNT); +/* Cache BB retimer power state */ +static bool cache_bb_enable[CONFIG_USB_PD_PORT_MAX_COUNT]; + /* Each TCPC have corresponding IO expander and are available in pair */ struct ioexpander_config_t ioex_config[] = { [IOEX_C0_PCA9675] = { @@ -249,6 +252,17 @@ void board_overcurrent_event(int port, int is_overcurrented) __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) { + /* + * ADL-P-DDR5 RVP SKU has cascaded retimer topology. + * Ports with cascaded retimers share common load switch and reset pin + * hence no need to set the power state again if the 1st retimer's power + * status has already changed. + */ + if (cache_bb_enable[me->usb_port] == enable) + return EC_SUCCESS; + + cache_bb_enable[me->usb_port] = enable; + /* Handle retimer's power domain.*/ if (enable) { ioex_set_level(bb_controls[me->usb_port].usb_ls_en_gpio, 1); |