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authorCraig Hesling <hesling@chromium.org>2020-02-14 14:42:38 -0800
committerCommit Bot <commit-bot@chromium.org>2020-02-25 22:58:08 +0000
commit14a23fb197983a0066fb95199f3a5120447b7169 (patch)
tree53f934899dabb4d8145805f7fefd346288101344 /baseboard/nucleo-h743zi
parent5ee54edfd520ce1a447cf0b04d1fcdf3f618188e (diff)
downloadchrome-ec-14a23fb197983a0066fb95199f3a5120447b7169.tar.gz
nucleo-h743zi: Separated into baseboard
This allows for creating multiple projects on top of the nucleo-h743zi platform. The intended use for this is to have a fingerprint board/project that pulls in all FPMCU specific config and libraries, while still maintaining another pure nucleo-h743zi board/project that can be used for platform testing and tuning. I suspect there will be more test boards/projects that use the nucleo-h743zi baseboard in the future. A project/board would be used as a way to create a specific test platform that can isolate an individual feature. Note, this does make use of recursively including the basboard gpio table. This requires the use of https://crrev.com/c/2056498 (gpio: Free gpio.inc from oppressive order). This also removes malloc support. BRANCH=none BUG=none TEST=make BOARD=nucleo-h743zi # Copy binary to mass storage # Connect to console and change clock sources Change-Id: I455274e0efb8ec374443314d351e254f1347a1a9 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057498 Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'baseboard/nucleo-h743zi')
-rw-r--r--baseboard/nucleo-h743zi/base-board.c11
-rw-r--r--baseboard/nucleo-h743zi/base-board.h180
-rw-r--r--baseboard/nucleo-h743zi/base-ec.tasklist13
-rw-r--r--baseboard/nucleo-h743zi/base-gpio.inc30
-rw-r--r--baseboard/nucleo-h743zi/build.mk14
-rw-r--r--baseboard/nucleo-h743zi/openocd-flash.cfg14
-rw-r--r--baseboard/nucleo-h743zi/openocd.cfg9
7 files changed, 271 insertions, 0 deletions
diff --git a/baseboard/nucleo-h743zi/base-board.c b/baseboard/nucleo-h743zi/base-board.c
new file mode 100644
index 0000000000..15e46f006e
--- /dev/null
+++ b/baseboard/nucleo-h743zi/base-board.c
@@ -0,0 +1,11 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "common.h"
+#include "gpio.h"
+
+__overridable void button_event(enum gpio_signal signal)
+{
+}
diff --git a/baseboard/nucleo-h743zi/base-board.h b/baseboard/nucleo-h743zi/base-board.h
new file mode 100644
index 0000000000..0bf91efd83
--- /dev/null
+++ b/baseboard/nucleo-h743zi/base-board.h
@@ -0,0 +1,180 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Nucleo-H743ZI baseboard configuration */
+
+#ifndef __CROS_EC_BASE_BOARD_H
+#define __CROS_EC_BASE_BOARD_H
+
+/*
+ * Flash layout:
+ *
+ * +++++++++++++
+ * | RO | Bank 1
+ * | |
+ * | |
+ * | ......... |
+ * | Rollback | (last two sectors)
+ * +-----------+
+ * | RW | Bank 2
+ * | |
+ * | |
+ * | |
+ * | |
+ * +++++++++++++
+ *
+ * We adjust the following macros to accommodate a rollback region
+ * and RO/RW regions of different sizes.
+ */
+
+#undef _IMAGE_SIZE
+#undef CONFIG_ROLLBACK_OFF
+#undef CONFIG_ROLLBACK_SIZE
+#undef CONFIG_FLASH_PSTATE
+#undef CONFIG_FW_PSTATE_SIZE
+#undef CONFIG_FW_PSTATE_OFF
+#undef CONFIG_RO_MEM_OFF
+#undef CONFIG_RO_STORAGE_OFF
+#undef CONFIG_RO_SIZE
+#undef CONFIG_RW_MEM_OFF
+#undef CONFIG_RW_STORAGE_OFF
+#undef CONFIG_RW_SIZE
+#undef CONFIG_EC_PROTECTED_STORAGE_OFF
+#undef CONFIG_EC_PROTECTED_STORAGE_SIZE
+#undef CONFIG_EC_WRITABLE_STORAGE_OFF
+#undef CONFIG_EC_WRITABLE_STORAGE_SIZE
+#undef CONFIG_WP_STORAGE_OFF
+#undef CONFIG_WP_STORAGE_SIZE
+
+/*
+ * EC rollback protection block
+ *
+ * We need 2 independently erasable blocks, at a minimum.
+ */
+#define CONFIG_ROLLBACK_SIZE (2 * CONFIG_FLASH_BANK_SIZE)
+#define CONFIG_ROLLBACK_OFF ((CONFIG_FLASH_SIZE / 2) - CONFIG_ROLLBACK_SIZE)
+
+#define CONFIG_RO_MEM_OFF 0
+#define CONFIG_RO_SIZE CONFIG_ROLLBACK_OFF
+#define CONFIG_RW_MEM_OFF (CONFIG_FLASH_SIZE / 2)
+#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE / 2)
+
+#define CONFIG_RO_STORAGE_OFF 0
+#define CONFIG_RW_STORAGE_OFF 0
+
+#define CONFIG_EC_PROTECTED_STORAGE_OFF CONFIG_RO_MEM_OFF
+#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RO_SIZE
+#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF
+#define CONFIG_EC_WRITABLE_STORAGE_SIZE CONFIG_RW_SIZE
+
+#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
+#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
+
+/* Disabled features */
+
+#undef CONFIG_ADC
+#undef CONFIG_HIBERNATE
+#undef CONFIG_I2C
+#undef CONFIG_LID_SWITCH
+#undef CONFIG_TASK_PROFILING
+
+/* Enabled features */
+
+#define CONFIG_AES
+#define CONFIG_AES_GCM
+#define CONFIG_DMA
+#define CONFIG_FORCE_CONSOLE_RESUME
+#define CONFIG_FPU
+#define CONFIG_HOST_COMMAND_STATUS
+#define CONFIG_LOW_POWER_IDLE
+#define CONFIG_MKBP_EVENT
+#define CONFIG_MKBP_USE_GPIO
+#define CONFIG_PRINTF_LEGACY_LI_FORMAT
+#define CONFIG_RNG
+#define CONFIG_RWSIG_TYPE_RWSIG
+#define CONFIG_SHA256
+#define CONFIG_SHA256_UNROLLED
+#undef CONFIG_SHAREDLIB_SIZE
+#define CONFIG_SHAREDLIB_SIZE 0
+#define CONFIG_STM_HWTIMER32
+#define CONFIG_SUPPRESSED_HOST_COMMANDS \
+ EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_PD_GET_LOG_ENTRY
+#define CONFIG_WATCHDOG_HELP
+#define CONFIG_WP_ACTIVE_HIGH
+
+#ifndef TEST_BUILD
+ /* TODO(hesling): Fix the illogical dependency between spi.c
+ * and host_command.c
+ *
+ * Currently, the chip/stm32/spi.c depends on functions defined in
+ * common/host_command.c. When unit test builds use their own tasklist
+ * without the HOSTCMD task, host_command.c is excluded from the build,
+ * but chip/stm32/spi.c remains (because of CONFIG_SPI).
+ * This triggers an undefined reference linker error.
+ * The reproduce case:
+ * - Allow CONFIG_SPI in TEST_BUILDs
+ * - make BOARD=nucleo-h743zi tests
+ */
+# define CONFIG_SPI
+#endif
+
+/*
+ * We want to prevent flash readout, and use it as indicator of protection
+ * status.
+ */
+#define CONFIG_FLASH_READOUT_PROTECTION_AS_PSTATE
+
+/*
+ * RW does slow compute, RO does slow flash erase.
+ */
+#undef CONFIG_WATCHDOG_PERIOD_MS
+#define CONFIG_WATCHDOG_PERIOD_MS 10000
+
+/* Setup UART console */
+
+#undef CONFIG_UART_CONSOLE
+#define CONFIG_UART_CONSOLE 3 /* The UART console is on USART3 */
+#define CONFIG_UART_TX_DMA
+#define CONFIG_UART_TX_DMA_PH DMAMUX1_REQ_USART3_TX
+#undef CONFIG_UART_TX_BUF_SIZE
+#define CONFIG_UART_TX_BUF_SIZE 2048
+
+/* Console commands */
+
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IDLE_STATS
+
+#ifdef SECTION_IS_RO
+ /* RO verifies the RW partition signature */
+# define CONFIG_RSA
+# define CONFIG_RWSIG
+#endif /* SECTION_IS_RO */
+
+#define CONFIG_RSA_KEY_SIZE 3072
+#define CONFIG_RSA_EXPONENT_3
+
+/*
+ * We do not use any "locally" generated entropy: this is normally used
+ * to add local entropy when the main source of entropy is remote.
+ */
+#undef CONFIG_ROLLBACK_SECRET_LOCAL_ENTROPY_SIZE
+#ifdef SECTION_IS_RW
+# undef CONFIG_ROLLBACK_UPDATE
+#endif
+/*
+ * Add rollback protection
+ */
+#define CONFIG_ROLLBACK
+#define CONFIG_ROLLBACK_MPU_PROTECT
+
+#ifndef __ASSEMBLER__
+ /* Timer selection */
+# define TIM_CLOCK32 2
+# define TIM_WATCHDOG 16
+# include "gpio_signal.h"
+ void button_event(enum gpio_signal signal);
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __CROS_EC_BASE_BOARD_H */
diff --git a/baseboard/nucleo-h743zi/base-ec.tasklist b/baseboard/nucleo-h743zi/base-ec.tasklist
new file mode 100644
index 0000000000..fae8952113
--- /dev/null
+++ b/baseboard/nucleo-h743zi/base-ec.tasklist
@@ -0,0 +1,13 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * See CONFIG_TASK_LIST in config.h for details.
+ */
+#define BASEBOARD_CONFIG_TASK_LIST \
+ TASK_ALWAYS_RO(RWSIG, rwsig_task, NULL, 1280) \
+ TASK_ALWAYS(HOOKS, hook_task, NULL, 1024) \
+ TASK_NOTEST(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
+ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE)
diff --git a/baseboard/nucleo-h743zi/base-gpio.inc b/baseboard/nucleo-h743zi/base-gpio.inc
new file mode 100644
index 0000000000..ef224cbaf1
--- /dev/null
+++ b/baseboard/nucleo-h743zi/base-gpio.inc
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * Note that these pins map to the Nucleo-H743ZI V2 and are only slightly
+ * compatible with the original version.
+ *
+ * The V2 is denoted by "Nucleo-H743ZI2" vs. "Nucleo-H743ZI".
+ */
+
+/* Inputs ands Interrupts */
+GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INPUT, spi_event)
+GPIO_INT(BTN1, PIN(C, 13), GPIO_INT_BOTH, button_event)
+GPIO(WP, PIN(B, 7), GPIO_INPUT)
+
+/* Outputs */
+GPIO(EC_INT_L, PIN(A, 1), GPIO_OUT_HIGH)
+GPIO(LED1, PIN(B, 0), GPIO_OUT_LOW) /* Green */
+GPIO(LED2, PIN(E, 1), GPIO_OUT_LOW) /* Yellow */
+GPIO(LED3, PIN(B, 14), GPIO_OUT_LOW) /* Red */
+
+UNIMPLEMENTED(ENTERING_RW)
+
+/* USART3: PD8/PD9 */
+ALTERNATE(PIN_MASK(D, 0x0300), GPIO_ALT_USART, MODULE_UART, GPIO_PULL_UP)
+/* SPI1 slave from the AP: PA4/5/6/7 */
+ALTERNATE(PIN_MASK(A, 0x00f0), GPIO_ALT_SPI, MODULE_SPI, 0)
diff --git a/baseboard/nucleo-h743zi/build.mk b/baseboard/nucleo-h743zi/build.mk
new file mode 100644
index 0000000000..e9f9ae3faa
--- /dev/null
+++ b/baseboard/nucleo-h743zi/build.mk
@@ -0,0 +1,14 @@
+# -*- makefile -*-
+# Copyright 2020 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Nucleo-H743ZI baseboard specific files build
+#
+
+# the IC is STmicro STM32H743
+CHIP:=stm32
+CHIP_FAMILY:=stm32h7
+CHIP_VARIANT:=stm32h7x3
+
+baseboard-y=base-board.o \ No newline at end of file
diff --git a/baseboard/nucleo-h743zi/openocd-flash.cfg b/baseboard/nucleo-h743zi/openocd-flash.cfg
new file mode 100644
index 0000000000..4517266d7b
--- /dev/null
+++ b/baseboard/nucleo-h743zi/openocd-flash.cfg
@@ -0,0 +1,14 @@
+# Copyright 2019 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+source [find board/st_nucleo_h743zi.cfg]
+
+gdb_port 0
+tcl_port 0
+telnet_port 0
+init
+reset halt
+flash write_image erase $BUILD_DIR/ec.bin 0x08000000
+reset
+shutdown
diff --git a/baseboard/nucleo-h743zi/openocd.cfg b/baseboard/nucleo-h743zi/openocd.cfg
new file mode 100644
index 0000000000..528e8d6cab
--- /dev/null
+++ b/baseboard/nucleo-h743zi/openocd.cfg
@@ -0,0 +1,9 @@
+# Copyright 2019 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+source [find board/st_nucleo_h743zi.cfg]
+
+# Enabled EC task context support
+# This is supported by the upstream OpenOCD
+$_TARGETNAME configure -rtos Chromium-EC