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authorJett Rink <jettrink@chromium.org>2018-05-02 10:34:13 -0600
committerchrome-bot <chrome-bot@chromium.org>2018-05-02 22:20:31 -0700
commitf24dc485fef065ef6298d8b94fdee11a982e8564 (patch)
treeeceb4233e074743b0b3e5d4bb26f0e7414b79ab8 /baseboard/octopus/baseboard.c
parente47daed322ef8fa6aa9dd0396d55d9b5a99a9c3b (diff)
downloadchrome-ec-f24dc485fef065ef6298d8b94fdee11a982e8564.tar.gz
octopus: move common function to baseboard
Move common variables and functions to baseboard from yorp and bip BRANCH=none BUG=none TEST=builds Change-Id: Ic74bec45f4ff6c833e4ef0620380f21b2ed6a041 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1040107 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
Diffstat (limited to 'baseboard/octopus/baseboard.c')
-rw-r--r--baseboard/octopus/baseboard.c94
1 files changed, 92 insertions, 2 deletions
diff --git a/baseboard/octopus/baseboard.c b/baseboard/octopus/baseboard.c
index 55d9f635fb..38c2dc2e3f 100644
--- a/baseboard/octopus/baseboard.c
+++ b/baseboard/octopus/baseboard.c
@@ -5,16 +5,70 @@
/* Octopus family-specific configuration */
-#include "common.h"
-#include "console.h"
#include "charge_manager.h"
#include "charge_state.h"
+#include "common.h"
+#include "console.h"
+#include "driver/tcpm/ps8xxx.h"
+#include "gpio.h"
+#include "keyboard_scan.h"
+#include "power.h"
#include "usbc_ppc.h"
#include "util.h"
#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args)
#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+/******************************************************************************/
+/* Wake up pins */
+const enum gpio_signal hibernate_wake_pins[] = {
+ GPIO_LID_OPEN,
+ GPIO_AC_PRESENT,
+ GPIO_POWER_BUTTON_L,
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
+
+/******************************************************************************/
+/* Power signal list. Must match order of enum power_signal. */
+const struct power_signal_info power_signal_list[] = {
+#ifdef CONFIG_POWER_S0IX
+ {GPIO_PCH_SLP_S0_L,
+ POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT,
+ "SLP_S0_DEASSERTED"},
+#endif
+ {GPIO_PCH_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S3_DEASSERTED"},
+ {GPIO_PCH_SLP_S4_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S4_DEASSERTED"},
+ {GPIO_SUSPWRDNACK, POWER_SIGNAL_ACTIVE_HIGH,
+ "SUSPWRDNACK_DEASSERTED"},
+
+ {GPIO_ALL_SYS_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "ALL_SYS_PGOOD"},
+ {GPIO_RSMRST_L_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "RSMRST_L"},
+ {GPIO_PP3300_PG, POWER_SIGNAL_ACTIVE_HIGH, "PP3300_PG"},
+ {GPIO_PP5000_PG, POWER_SIGNAL_ACTIVE_HIGH, "PP5000_PG"},
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
+
+/******************************************************************************/
+/* Keyboard scan setting */
+struct keyboard_scan_config keyscan_config = {
+ /*
+ * F3 key scan cycle completed but scan input is not
+ * charging to logic high when EC start scan next
+ * column for "T" key, so we set .output_settle_us
+ * to 80us from 50us.
+ */
+ .output_settle_us = 80,
+ .debounce_down_us = 9 * MSEC,
+ .debounce_up_us = 30 * MSEC,
+ .scan_period_us = 3 * MSEC,
+ .min_post_scan_delay_us = 1000,
+ .poll_timeout_us = 100 * MSEC,
+ .actual_key_mask = {
+ 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
+ 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */
+ },
+};
+
int board_set_active_charge_port(int port)
{
int is_valid_port = (port >= 0 &&
@@ -77,3 +131,39 @@ void board_set_charge_limit(int port, int supplier, int charge_ma,
CONFIG_CHARGER_INPUT_CURRENT),
charge_mv);
}
+
+/**
+ * Reset all system PD/TCPC MCUs -- currently only called from
+ * handle_pending_reboot() in common/power.c just before hard
+ * resetting the system. This logic is likely not needed as the
+ * PP3300_A rail should be dropped on EC reset.
+ */
+void board_reset_pd_mcu(void)
+{
+#if defined(OCTOPUS_USBC_STANDALONE_TCPCS)
+ /* C0: ANX7447 does not have a reset pin. */
+
+ /* C1: Assert reset to TCPC1 (PS8751) for required delay (1ms) */
+ gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0);
+ msleep(PS8XXX_RESET_DELAY_MS);
+ gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
+#elif defined(OCTOPUS_USBC_ITE_EC_TCPCS)
+ /*
+ * C0 & C1: The internal TCPC on ITE EC does not have a reset signal,
+ * but it will get reset when the EC gets reset.
+ */
+#endif
+}
+
+#ifdef OCTOPUS_USBC_ITE_EC_TCPCS
+void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+{
+ /*
+ * We ignore the cc_pin because the polarity should already be set
+ * correctly in the PPC driver via the pd state machine.
+ */
+ if (ppc_set_vconn(port, enabled) != EC_SUCCESS)
+ cprints(CC_USBPD, "C%d: Failed %sabling vconn",
+ port, enabled ? "en" : "dis");
+}
+#endif