diff options
| author | Patryk Duda <pdk@semihalf.com> | 2021-01-05 15:45:46 +0100 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-28 02:12:40 +0000 |
| commit | b7308fdff1300bb4bf0362e71ed022b2dbf92c25 (patch) | |
| tree | f7f6cfaa46c4866ab9c2e5157f5ecee53bd87614 /baseboard/octopus | |
| parent | f70199129b2a48e0071ac684b2c1a1e321ff43c1 (diff) | |
| download | chrome-ec-b7308fdff1300bb4bf0362e71ed022b2dbf92c25.tar.gz | |
ps8xxx: Set RP during LPM enter if TCPC acts as mux only
Some boards (eg. ampton) uses TCPC/MUX chips (eg. PS8751) as muxers
only. In this case CC lines are simply not connected. Nevertheless
setting CC lines to approptiate value can decrease power consumption.
This patch implements custom PS8xxx MUX driver which is responsible for
setting RP on both CC lines on Low Power Mode enter when this TCPC is
used as muxer only (USB_MUX_FLAG_NOT_TCPC flag is set). Due to flash
size constraints, this driver is only available when appropriate config
is defined.
Unfortunately, RP can't be set once during initialization because
after switching mux appropriately there is no connection. To work
properly RD should be set on both CC lines. Changing RD -> RP after
switching mux doesn't work (breaks connection), even with some delay
before switching to RP again.
Moreover, when PS8751 is in standby mode, first I2C transaction always
fails. Documentation suggests that device could be woken up by
performing I2C read from PS8XXX_REG_I2C_DEBUGGING_ENABLE register.
For more information about purpose of this change please refer to
b:113830171#comment18 and further.
BUG=b:151155658
BRANCH=none
TEST=Flash EC ToT on Ampton. Check if power consumption is lower.
Don't connect devices to tested USB-C port.
Issue 'i2cxfer r 2 0xB 0x1A' 2 times within 2 seconds and check
if it returns 0x05 (DRP disabled, RP default, CC1, CC2 set to RP).
Repeat above with command 'i2cxfer r 4 0xB 0x1A'.
NOTE: PS8751 goes to Low Power Mode automatically after 2 seconds
when RP is set that is why we need to read register 2 times, first
to wake up device, second to read value.
TEST=Connect device to USB-C port, check in dmesg that device is
recognised as SuperSpeed device. Repeat this test 10 times. Check
also different rotation.
Change-Id: Ie1bac6caa9912c024c87792536d7a35863fa96a0
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2614618
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
Diffstat (limited to 'baseboard/octopus')
| -rw-r--r-- | baseboard/octopus/baseboard.h | 1 | ||||
| -rw-r--r-- | baseboard/octopus/variant_usbc_ec_tcpcs.c | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index c342e48687..420f6f6715 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -184,6 +184,7 @@ #define CONFIG_USB_PD_TCPM_ITE_ON_CHIP /* C0 & C1 TCPC: ITE EC */ #define CONFIG_USB_MUX_IT5205 /* C0 MUX: IT5205 */ #define CONFIG_USB_PD_TCPM_PS8751 /* C1 Mux: PS8751 */ + #define CONFIG_USB_PD_TCPM_PS8751_CUSTOM_MUX_DRIVER #define CONFIG_USBC_PPC_SN5S330 /* C0 & C1 PPC: each SN5S330 */ #define CONFIG_USBC_PPC_VCONN #define CONFIG_USBC_PPC_DEDICATED_INT diff --git a/baseboard/octopus/variant_usbc_ec_tcpcs.c b/baseboard/octopus/variant_usbc_ec_tcpcs.c index c9d191438a..fa34ffaf18 100644 --- a/baseboard/octopus/variant_usbc_ec_tcpcs.c +++ b/baseboard/octopus/variant_usbc_ec_tcpcs.c @@ -80,7 +80,7 @@ struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { .i2c_port = I2C_PORT_USBC1, .i2c_addr_flags = PS8751_I2C_ADDR1_FLAGS, .flags = USB_MUX_FLAG_NOT_TCPC, - .driver = &tcpci_tcpm_usb_mux_driver, + .driver = &ps8xxx_usb_mux_driver, .hpd_update = &ps8xxx_tcpc_update_hpd_status, } }; |