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authorCHLin <CHLIN56@nuvoton.com>2019-08-05 16:23:26 +0800
committerCommit Bot <commit-bot@chromium.org>2019-08-21 04:58:23 +0000
commitac780ae08f9cc880b8606937e03e4d8193e1022a (patch)
treec14d70ba0fabb070f8dd50f1496d6a308d770fcc /baseboard/zork/baseboard.c
parent2fb1836646a1f4edcea1f22408535872b833d14e (diff)
downloadchrome-ec-ac780ae08f9cc880b8606937e03e4d8193e1022a.tar.gz
driver: IO expander: nct38xx: add the interrupt support
The IO pins of Nuvoton TCPC NCT38XX chips have the ability to support the interrupt function. This commit adds the driver to support it. However, please note that if the system needs to use an IO on NCT38XX to support the interrupt, the following two consideration should be taken into account. 1. Interrupt latency: Because it requires to access the registers of NCT38XX via I2C transaction to know the interrupt event, there is some added latency for the interrupt handling. If the interrupt requires short latency, we do not recommend to connect such a signal to the NCT38XX. 2. Shared ALERT pin: Because the ALERT pin is shared also with the TCPC ALERT, we do not recommend to connect any signal that may generate a high rate of interrupts so it will not interfere with the normal work of the TCPC. BRANCH=none BUG=none TEST=No error for "make buildall" TEST=Apply this and related CLs, manually test each IO pins; make sure each pin's interrupt handler is correctly executed. Change-Id: I72d835557913d87097b2e0d82165e40fe132ca77 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1734948 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com>
Diffstat (limited to 'baseboard/zork/baseboard.c')
-rw-r--r--baseboard/zork/baseboard.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/baseboard/zork/baseboard.c b/baseboard/zork/baseboard.c
index e160c7b38d..1505405071 100644
--- a/baseboard/zork/baseboard.c
+++ b/baseboard/zork/baseboard.c
@@ -315,7 +315,7 @@ const struct tcpc_config_t tcpc_config[] = {
.bus_type = EC_BUS_TYPE_I2C,
.i2c_info = {
.port = I2C_PORT_TCPC0,
- .addr_flags = NCT38xx_I2C_ADDR1_1_FLAGS,
+ .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
},
.drv = &nct38xx_tcpm_drv,
},
@@ -323,7 +323,7 @@ const struct tcpc_config_t tcpc_config[] = {
.bus_type = EC_BUS_TYPE_I2C,
.i2c_info = {
.port = I2C_PORT_TCPC1,
- .addr_flags = NCT38xx_I2C_ADDR1_1_FLAGS,
+ .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
},
.drv = &nct38xx_tcpm_drv,
},
@@ -453,14 +453,12 @@ BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
struct ioexpander_config_t ioex_config[] = {
[USBC_PORT_C0] = {
.i2c_host_port = I2C_PORT_TCPC0,
- .i2c_slave_addr = NCT38xx_I2C_ADDR1_1_FLAGS,
- .chip_info = -1,
+ .i2c_slave_addr = NCT38XX_I2C_ADDR1_1_FLAGS,
.drv = &nct38xx_ioexpander_drv,
},
[USBC_PORT_C1] = {
.i2c_host_port = I2C_PORT_TCPC1,
- .i2c_slave_addr = NCT38xx_I2C_ADDR1_1_FLAGS,
- .chip_info = -1,
+ .i2c_slave_addr = NCT38XX_I2C_ADDR1_1_FLAGS,
.drv = &nct38xx_ioexpander_drv,
},
};