diff options
author | Diana Z <dzigterman@chromium.org> | 2021-07-21 15:08:46 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-07-21 22:42:27 +0000 |
commit | 9dde9ca48b4dceb0ea2155c87a83fe691d61f8be (patch) | |
tree | 668b9cd1c9392937b5d62baad851814a14c92e3d /baseboard | |
parent | c91ff73a105877676698d0331846742ce59008f8 (diff) | |
download | chrome-ec-9dde9ca48b4dceb0ea2155c87a83fe691d61f8be.tar.gz |
Guybrush: Add EC_ENTERING_RW signal
Add this signal as it is present on more recent board versions. This
should be fine on older board versions since it was a TP pin previously.
BRANCH=None
BUG=b:194320972
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I839027fecaac8d47992ae262f334c88c8a7311a7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044406
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Commit-Queue: Rob Barnes <robbarnes@google.com>
Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Diffstat (limited to 'baseboard')
-rw-r--r-- | baseboard/guybrush/base_gpio.inc | 2 | ||||
-rw-r--r-- | baseboard/guybrush/baseboard.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/baseboard/guybrush/base_gpio.inc b/baseboard/guybrush/base_gpio.inc index 24be8de795..8f96a65600 100644 --- a/baseboard/guybrush/base_gpio.inc +++ b/baseboard/guybrush/base_gpio.inc @@ -31,7 +31,7 @@ ALTERNATE(/*LID_OPEN*/ PIN_MASK(0, BIT(2)), 0, MODULE_PMU, 0) /* PSL - Lid ALTERNATE(/*ACOK_OD*/ PIN_MASK(0, BIT(0)), 0, MODULE_PMU, 0) /* PSL - AC Power Present */ /* SOC Signals */ -UNIMPLEMENTED(ENTERING_RW) /* GPIO_ENTERING_RW */ +GPIO(EC_ENTERING_RW, PIN(6, 6), GPIO_OUT_LOW) /* Tell SOC we entered RW */ GPIO(EC_SYS_RST_L, PIN(7, 6), GPIO_ODR_HIGH) /* Cold Reset SOC */ GPIO(EC_SOC_RSMRST_L, PIN(C, 5), GPIO_OUT_LOW) /* Resume Reset SOC */ GPIO(EC_CLR_CMOS, PIN(A, 1), GPIO_OUT_LOW) /* Clear SOC CMOS */ diff --git a/baseboard/guybrush/baseboard.h b/baseboard/guybrush/baseboard.h index 9bdb2f36fa..f9bdf8e8c0 100644 --- a/baseboard/guybrush/baseboard.h +++ b/baseboard/guybrush/baseboard.h @@ -28,6 +28,7 @@ #define CONFIG_VBOOT_HASH #define CONFIG_VSTORE #define CONFIG_VSTORE_SLOT_COUNT 1 +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW #define GPIO_PACKET_MODE_EN GPIO_EC_GSC_PACKET_MODE /* CBI Config */ |